Al2ed chapter15

Real-Mode Interrupts Chapter 15 S. Dandamudi

Outline Interrupt processing in the real mode Software interrupts Keyboard services int 21H DOS services int 16H BIOS services Text output Exceptions Single-step example Direct I/O device control Accessing I/O ports Peripheral support chips Programmable interrupt controller chip Programmable peripheral interface chip I/O data transfer Programmed I/O Interrupt-driven I/O

Interrupt Processing in Real Mode Uses an interrupt vector table that stores pointers to the associated interrupt handlers. This table is located at base address zero. Each entry in this table consists of a CS:IP pointer to the associated ISRs Each entry or vector requires four bytes: Two bytes for specifying CS Two bytes for the offset Up to 256 interrupts are supported (0 to 255).

Interrupt Number to Vector Translation Interrupt numbers range from 0 to 255 Interrupt number acts as an index into the interrupt vector table Since each vector takes 4 bytes, interrupt number is multiplied by 4 to get the corresponding ISR pointer Example For interrupt 2, the memory address is 2  4 = 8H The first two bytes at 8H are taken as the offset value The next two bytes (i.e., at address AH) are used as the CS value

What Happens When An Interrupt Occurs? Push flags register onto the stack Clear interrupt enable and trap flags This disables further interrupts Use sti to enable interrupts Push CS and IP registers onto the stack Load CS with the 16-bit data at memory address interrupt-type  4 + 2 Load IP with the 16-bit data at memory address interrupt-type  4

Returning From An ISR As in procedures, the last instruction in an ISR should be iret The actions taken on iret are: pop the 16-bit value on top of the stack into IP register pop the 16-bit value on top of the stack into CS register pop the 16-bit value on top of the stack into the flags register As in procedures, make sure that your ISR does not leave any data on the stack (i.e., match your push and pop operations within the ISR)

A Typical ISR Structure Just like procedures, ISRs should end with a return statement to return control back The interrupt return ( iret ) is used of this purpose ;save the registers used in the ISR sti ;enable further interrupts . . . ISR body . . . ;restore the saved registers iret ;return to interrupted program

Software Interrupts Initiated by executing an interrupt instruction int interrupt-type interrupt-type is an integer in the range 0 to 255 Each interrupt type can be parameterized to provide several services. For example, DOS interrupt service int 21H provides more than 80 different services AH register is used to identify the required service under int 21H .

Keyboard Services DOS provides several interrupt services to interact with the keyboard AH register should be loaded with the desired function under int 21H. Seven functions are provided by DOS to read a character or get the status of the keyboard. We look at one function to read a string of characters from the keyboard.

A DOS Keyboard Function Function 0AH --- Buffered Keyboard Input Inputs: AH = 0AH DS:DX = pointer to the input buffer (first byte should be buffer size) Returns: character string in the input buffer Input string is terminated by CR Input string starts at the third byte of the buffer Second byte gives the actual number of characters read (excluding the CR)

Input Buffer Details l = maximum number of characters (given as input to the function) m = actual number of characters in the buffer excluding CR (returned by the function)

A Keyboard Example GetStr procedure to read a string from the keyboard (see io.mac) Expects buffer pointer in AX and buffer length in CX Uses DOScall macro: DOScall MACRO fun_num mov AH, fun_num int 21H ENDM Proc_GetStr () Save registers used in proc. if (CX < 2) then CX := 2 if (CX > 81) then CX := 81 Use function 0AH to read input string into temp. buffer str_buffer Copy input string from str_buffer to user buffer and append NULL Restore registers

BIOS Keyboard Services BIOS provides keyboard services under int 16H We focus on three functions provided by int 16H Function 00H --- To read a character Function 01H --- To check keyboard buffer Function 02H --- To check keyboard status As with DOS functions, AH is used to identify the required service DOS services are flexible in that the keyboard input can be redirected (BIOS does not allow it)

BIOS Character Read Function Function 00H --- Read a char. from the keyboard Inputs: AH = 00H Returns: if AL is not zero AL = ASCII code of the key AH = Scan code of the key if AL is zero AH = Scan code of the extended key If keyboard buffer is empty, this function waits for a key to be entered

BIOS Keyboard Buffer Check Function Function 01H --- Check keyboard buffer Inputs: AH = 01H Returns: ZF = 1 if keyboard buffer is empty ZF = 0 if not empty ASCII and Scan codes are placed in AL and AH as in Function 00H The character is not removed from the keyboard buffer

BIOS Keyboard Status Check Function Function 02H --- Check keyboard status Inputs: AH = 02H Returns: AL = status of shift and toggle keys Bit assignment is shown on the right Bit# Key assignment 0 Right SHIFT down 1 Left SHIFT down 2 CONTROL down 3 ALT down 4 SCROLL LOCK down 5 NUMBER LOCK down 6 CAPS LOCK down 7 INS LOCK down

A BIOS Keyboard Example BIOS, being a lower-level service, provides more flexibility FUNNYSTR.ASM reads a character string from the keyboard and displays it along with its length The input string can be terminated either by pressing both SHIFT keys simultaneously, or by entering 80 characters, whichever occurs first. We use BIOS function 02H to detect the first termination condition.

Text Output DOS provides support to display characters on the screen An example DOS int 21H character display function Function 02H --- Display a char. on the screen Inputs: AH = 02H DL = ASCII code of the character to be displayed Returns: nothing See proc_nwln procedure for usage

A Single-Step Interrupt Example Objectives: To demonstrate how ISRs can be defined and installed (i.e., user defined ISRs) How trap flag can be manipulated There are no instruction to set/clear the trap flag unlike the interrupt enable flag sti/cli We write our own type 1 ISR that displays the contents of AX and BX registers after each instruction has been executed

Two Services of int 21H Function 35H --- Get interrupt vector Inputs: AH = 35H AL = interrupt type number Returns: ES:BX = address of the specified ISR Function 25H --- Set interrupt vector Inputs: AH = 25H AL = interrupt type number DS:DX = address of the ISR Returns: nothing

Direct Control of I/O Devices Two ways of mapping I/O ports: Memory-mapped I/O (e.g., Motorola 68000) I/O port is treated as a memory address (I/O port is mapped to a location in memory address space (MAS)) Accessing an I/O port (read/write) is similar to accessing a memory location (all memory access instructions can be used) Isolated I/O (e.g., Pentium) I/O address space is separate from the memory address space leaves the complete MAS for memory Separate I/O instructions and I/O signals are needed Can’t use memory access instructions Can also use memory-mapped I/O and use all memory access instructions

Pentium I/O Address Space Pentium provides 64 KB of I/O address space Can be used for 8-, 16-, and 32-bit I/O ports Combination cannot exceed the total I/O space 64K 8-bit I/O ports Used for 8-bit devices, which transfer 8-bit data Can be located anywhere in the I/O space 32K 16-bit I/O ports (used for 16-bit devices) 16-bit ports should be aligned to an even address 16K 32-bit I/O ports (used for 32-bit devices) Should be aligned to addresses that are multiples of four Pentium supports unaligned ports, but with performance penalty A combination of these for a total of 64 KB

Pentium I/O Instructions Pentium provides two types of I/O instructions: Register I/O instructions used to transfer data between a register (accumulator) and an I/O port in - to read from an I/O port out - to write to an I/O port Block I/O instructions used to transfer a block of data between memory and an I/O port ins - to read from an I/O port outs - to write to an I/O port

Register I/O Instructions Can take one of two forms depending on whether a port is directly addressable or not A port is said to be directly addressable if it is within the first 256 ports (so that one byte can be used specify it) To read from an I/O port in accumulator,port8 -- direct addressing format port8 is 8-bit port number in accumulator,DX -- indirect addressing format port number should be loaded into DX accumulator can be AL, AX, or EAX (depending on I/O port) To write to an I/O port out port8,accumulator -- direct addressing format out DX,accumulator -- indirect addressing format

Block I/O Instructions Similar to string instructions ins and outs do not take any operands I/O port address should be in DX No direct addressing format is allowed ins instruction to read from an I/O port ES:(E)DI should point to memory buffer outs instruction to write to an I/O port DS:(E)SI should point to memory buffer rep prefix can be used for block transfer of data as in the string instructions

8259 Programmable Interrupt Controller 8259 can service up to eight hardware devices Interrupts are received on IRQ0 through IRQ7 8259 can be programmed to assign priorities in several ways Fixed priority scheme is used in the PC IRQ0 has the highest priority and IRQ7 lowest 8259 has two registers Interrupt Command Register (ICR) Used to program 8259 Interrupt Mask Register (IMR)

8259 PIC (cont’d) Mapping in a single 8259 PIC systems IRQ# Interrupt type Device 0 08H System timer 1 09H Keyboard 2 0AH reserved (2nd 8259) 3 0BH Serial port (COM1) 4 0CH Serial port (COM2) 5 0DH Hard disk 6 0EH Floppy disk 7 0FH Printer (LPT1)

8259 PIC (cont’d) Interrupt Mask Register (IMR) is an 8-bit register Used to enable or disable individual interrupts on lines IRQ0 through IRQ7 Bit 0 is associated with IRQ0, bit 1 to IRQ1, . . . A bit value of 0 enables the corresponding interrupt (1 disables) Processor recognizes external interrupts only when the IF is set Port addresses: ICR: 20H IMR:21H

8259 PIC (cont’d) Example: Disable all 8259 interrupts except the system timer mov AL,0FEH out 21H,AL 8259 needs to know when an ISR is done (so that it can forward other pending interrupt requests) End-of-interrupt (EOI) is signaled to 8259 by writing 20H into ICR mov AL,20H out 20H,AL This code fragment should be used before iret

8255 Programmable Peripheral Interface Chip Provides three 8-bit registers (PA, PB, PC) that can be used to interface with I/O devices These three ports are configures as follows: PA -- Input port PB -- Output port PC -- Input port 8255 also has a command register 8255 port address mapping PA --- 60H PB --- 61H PC --- 62H Command register --- 63H

Keyboard Interface PA and PB7 are used for keyboard interface PA0 -- PA6 = key scan code PA7 = 0 if a key is depressed PA7 = 1 if a key is released Keyboard provides the scan code on PA and waits for an acknowledgement Scan code read acknowledge signal is provided by momentarily setting and clearing PB7 Normal state of PB7 is 0 Keyboard generates IRQ1 IRQ1 generates a type 9 interrupt

I/O Data Transfer Three ways Programmed I/O Repeatedly checks the status of an I/O device (through a status register of the associated I/O controller) until the desired condition is met This process is called polling Example: KBRD_PIO.ASM Interrupt-driven I/O Processor gets interrupted when a specified event occurs Example: KEYBOARD.ASM Direct memory access (DMA) Relieves the processor of low-level data transfer chore A DMA controller oversees this task

I/O Data Transfer (cont’d) Polling Versus Interrupt-driven I/O Interrupt-driven I/O Very efficient Can be used to handle unanticipated events Programmed I/O Polling involves overhead Repeated testing of condition Can be used to handle only anticipated event Last slide

Al2ed chapter15

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Al2ed chapter15