Overview of Assembly Language Chapter 4 S. Dandamudi
Outline Assembly language statements Data allocation Where are the operands? Addressing modes Register Immediate Direct Indirect Data transfer instructions mov ,  xchg , and  xlat Ambiguous moves Overview of assembly language instructions Arithmetic Conditional Iteration Logical Shift/Rotate Defining constants EQU ,  %assign ,   %define Macros Illustrative examples Performance: When to use the  xlat  instruction
Assembly Language Statements Three different classes Instructions Tell CPU what to do Executable instructions with an op-code Directives (or pseudo-ops) Provide information to assembler on various aspects of the assembly process Non-executable Do not generate machine language instructions Macros A shorthand notation for a group of statements A sophisticated text substitution mechanism with parameters
Assembly Language Statements (cont’d) Assembly language statement format: [label]  mnemonic  [operands]  [;comment] Typically one statement per line Fields in [ ] are optional label  serves two distinct purposes: To label an instruction  Can transfer program execution to the labeled instruction To label an identifier or constant mnemonic   identifies the operation (e.g.  add ,  or ) operands  specify the data required by the operation Executable instructions can have zero to three operands
Assembly Language Statements (cont’d) comments Begin with a semicolon (;) and extend to the end of the line Examples repeat:  inc  [result]   ; increment  result CR  EQU  0DH   ; carriage return character White space can be used to improve readability repeat: inc  [result]   ; increment  result
Data Allocation Variable declaration in a high-level language such as C char  response int  value float  total double  average_value specifies Amount storage required (1 byte, 2 bytes, …) Label to identify the storage allocated (response, value, …) Interpretation of the bits stored (signed, floating point, …) Bit pattern  1000 1101 1011 1001  is interpreted as  29,255 as a signed number 36,281 as an unsigned number
Data Allocation (cont’d) In assembly language, we use the  define  directive Define directive can be used To reserve storage space To label the storage space To initialize But  no interpretation  is attached to the bits stored Interpretation is up to the program code Define directive goes into the .DATA part of the assembly language program  Define directive format for initialized data [var-name]  D?  init-value [,init-value],...
Data Allocation (cont’d) Five define directives for initialized data DB  Define Byte  ;allocates 1 byte DW  Define Word  ;allocates 2 bytes DD  Define Doubleword  ;allocates 4 bytes DQ  Define Quadword  ;allocates 8 bytes DT  Define Ten bytes  ;allocates 10 bytes Examples sorted  DB  ’y’ value  DW  25159 Total  DD  542803535 float1  DD  1.234
Data Allocation (cont’d) Directives for uninitialized data Five reserve directives RESB  Reserve a Byte  ;allocates 1 byte RESW  Reserve a Word  ;allocates 2 bytes RESD  Reserve a Doubleword ;allocates 4 bytes RESQ  Reserve a Quadword  ;allocates 8 bytes REST  Reserve a Ten bytes  ;allocates 10 bytes Examples response  resb  1 buffer  resw  100 Total  resd  1
Data Allocation (cont’d) Multiple definitions can be abbreviated Example message  DB  ’B’ DB  ’y’  DB  ’e’  DB  0DH  DB  0AH can be written as message  DB  ’B’,’y’,’e’,0DH,0AH More compactly as message  DB  ’Bye’,0DH,0AH
Data Allocation (cont’d) Multiple definitions can be cumbersome to initialize data structures such as arrays  Example To declare and initialize an integer array of 8 elements marks  DW  0,0,0,0,0,0,0,0 What if we want to declare and initialize to zero an array of 200 elements? There is a better way of doing this than repeating zero 200 times in the above statement Assembler provides a directive to do this (DUP directive)
Data Allocation (cont’d) Multiple initializations The TIMES assembler directive allows multiple initializations to the same value Examples Previous marks array  marks  DW  0,0,0,0,0,0,0,0   can be compactly declared as marks  TIMES  8  DW  0
Data Allocation (cont’d) Symbol Table Assembler builds a symbol table so we can refer to the allocated storage space by the associated label Example .DATA name   offset value  DW  0 value   0 sum  DD  0 sum   2 marks  DW  10 DUP (?) marks   6 message  DB  ‘The grade is:’,0 message  26 char1  DB  ? char1  40
Data Allocation (cont’d) Correspondence to C Data Types Directive C data type DB char DW int, unsigned DD float, long DQ double DT internal intermediate   float value
Where Are the Operands? Operands required by an operation can be specified in a variety of ways A few basic ways are: operand is in a register register addressing mode operand is in the instruction itself immediate addressing mode operand is in the memory variety of addressing modes direct and indirect addressing modes operand is at an I/O port
Where Are the Operands? (cont’d) Register Addressing Mode Most efficient way of specifying an operand operand is in an internal register Examples mov  EAX,EBX mov  BX,CX The  mov  instruction mov  destination,source copies data from  source  to  destination
Where Are the Operands? (cont’d) Immediate Addressing Mode Data is part of the instruction operand is located in the code segment along with the instruction Efficient as no separate operand fetch is needed Typically used to specify a constant Example mov  AL,75 This instruction uses register addressing mode for specifying the  destination  and immediate addressing mode to specify the  source
Where Are the Operands? (cont’d) Direct Addressing Mode Data is in the data segment Need a logical address to access data Two components: segment:offset Various addressing modes to specify the offset component offset part is referred to as the  effective address The offset is specified directly as part of the instruction We write assembly language programs using memory labels (e.g., declared using DB, DW, ...) Assembler computes the offset value for the label Uses symbol table to compute the offset of a label
Where Are the Operands? (cont’d) Direct Addressing Mode (cont’d) Examples mov  AL,[response] Assembler replaces  response  by its effective address (i.e., its offset value from the symbol table) mov  [table1],56 table1  is declared as table1  TIMES  20  DW  0 Since the assembler replaces  table1  by its effective address, this instruction refers to the first element of  table1   In C, it is equivalent to table1[0] = 56
Where Are the Operands? (cont’d) Direct Addressing Mode (cont’d) Problem with direct addressing Useful only to specify simple variables Causes serious problems in addressing data types such as arrays As an example, consider adding elements of an array Direct addressing does not facilitate using a loop structure to iterate through the array We have to write an instruction to add each element of the array Indirect addressing mode remedies this problem
Where Are the Operands? (cont’d) Indirect Addressing Mode The offset is specified indirectly via a register Sometimes called  register indirect  addressing mode For 16-bit addressing, the offset value can be in one of the three registers: BX, SI, or DI For 32-bit addressing, all 32-bit registers can be used Example mov  AX,[EBX] Square brackets [ ] are used to indicate that EBX is holding an offset value EBX contains a pointer to the operand, not the operand itself
Where Are the Operands? (cont’d) Using indirect addressing mode, we can process arrays using loops Example:  Summing array elements Load the starting address (i.e., offset) of the array into EBX Loop for each element in the array Get the value using the offset in EBX Use indirect addressing Add the value to the running total Update the offset in EBX to point to the next element of the array
Where Are the Operands? (cont’d) Loading offset value into a register Suppose we want to load EBX with the offset value of  table1 We can simply write mov  EBX,table1 It resolves offset at the assembly time Another way of loading offset value Using the  lea  instruction This is a processor instruction Resolves offset at run time
Where Are the Operands? (cont’d) Loading offset value into a register Using  lea  (load effective address) instruction The format of  lea  instruction is lea  register,source The previous example can be written as lea  EBX,[table1] May have to use  lea  in some instances When the needed data is available at run time only An index passed as a parameter to a procedure We can write lea  EBX,[table1+ESI] to load EBX with the address of an element of  table1  whose index is in the ESI register We cannot use the  mov  instruction to do this
Data Transfer Instructions We will look at three instructions mov   (move) Actually copy xchg  (exchange) Exchanges two operands xlat  (translate) Translates byte values using a translation table Other data transfer instructions such as movsx  (move sign extended) movzx  (move zero extended) are discussed in Chapter 7
Data Transfer Instructions (cont’d) The  mov  instruction The format is mov  destination,source Copies the value from  source  to  destination source  is not altered as a result of copying Both operands should be of same size source  and  destination  cannot both be in memory Most Pentium instructions do not allow both operands to be located in memory Pentium provides special instructions to facilitate memory-to-memory block copying of data
Data Transfer Instructions (cont’d) The  mov  instruction Five types of operand combinations are allowed: Instruction type   Example mov  register,register   mov  DX,CX mov  register,immediate   mov  BL,100 mov  register,memory   mov  EBX,[count] mov  memory,register   mov  [count],ESI mov  memory,immediate   mov  [count],23 The operand combinations are valid for all instructions that require two operands
Data Transfer Instructions (cont’d) Ambiguous moves: PTR directive For the following data definitions .DATA table1  TIMES  20 DW  0 status  TIMES  7  DB  1 the last two  mov  instructions are ambiguous mov  EBX, table1 mov  ESI, status mov  [EBX],100 mov  [ESI],100 Not clear whether the assembler should use byte or word equivalent of 100
Data Transfer Instructions (cont’d) Ambiguous moves: PTR directive A type specifier can be used to clarify The last two  mov  instructions can be written as mov  WORD [EBX],100 mov  BYTE [ESI],100 WORD and BYTE are called  type specifiers We can also write these statements as mov  [EBX], WORD 100 mov  [ESI], BYTE 100
Data Transfer Instructions (cont’d) Ambiguous moves: PTR directive We can use the following type specifiers: Type specifier Bytes addressed BYTE 1 WORD  2 DWORD 4 QWORD  8 TWORD 10
Data Transfer Instructions (cont’d) The  xchg  instruction The syntax is xchg  operand1,operand2 Exchanges the values of  operand1  and  operand2 Examples xchg  EAX,EDX xchg  [response],CL xchg  [total],DX Without the  xchg  instruction, we need a temporary register to exchange values using only the  mov  instruction
Data Transfer Instructions (cont’d) The  xchg  instruction The  xchg   instruction is useful for conversion of 16-bit data between little endian and big endian forms Example: mov  AL,AH converts the data in AX into the other endian form Pentium provides  bswap  instruction to do similar conversion on 32-bit data bswap  32-bit register bswap  works only on data located in a 32-bit register
Data Transfer Instructions (cont’d) The  xlat  instruction The  xlat   instruction translates bytes The format is xlatb   To use  xlat  instruction EBX should be loaded with the starting address of the translation table AL must contain an index in to the table Index value starts at zero The  instruction reads the byte at this index in the translation table and stores this value in AL The index value in AL is lost Translation table can have at most 256 entries (due to AL)
Data Transfer Instructions (cont’d) The  xlat  instruction Example:  Encrypting digits Input digits:  0 1 2 3 4 5 6 7 8 9 Encrypted digits:  4 6 9 5 0 3 1 8 7 2 .DATA xlat_table  DB  ’4695031872’ ... .CODE mov  EBX, xlat_table GetCh  AL sub  AL,’0’ ;   converts input character to index xlatb  ;   AL = encrypted digit character PutCh  AL  ...
Overview of Assembly Instructions Pentium provides several types of instructions Brief overview of some basic instructions: Arithmetic instructions Jump instructions Loop instruction Logical instructions Shift instructions Rotate instructions These sample instructions allows you to write reasonable assembly language programs
Overview of Assembly Instructions (cont’d) Arithmetic Instructions INC and DEC instructions Format: inc  destination  dec  destination Semantics: destination = destination +/- 1 destination  can be 8-, 16-, or 32-bit operand, in memory or register No immediate operand Examples inc  BX  ; BX = BX+1 dec  [value[  ; value = value-1
Overview of Assembly Instructions (cont’d) Arithmetic Instructions ADD instruction Format: add  destination,source Semantics: destination = (destination)+(source) Examples add  EBX,EAX  add  [value],10H inc  EAX   is better than  add EAX,1 inc  takes less space Both execute at about the same speed
Overview of Assembly Instructions (cont’d) Arithmetic Instructions SUB instruction Format: sub  destination,source Semantics: destination := (destination)-(source) Examples sub  EBX,EAX  sub  [value],10H dec  EAX   is better than  sub EAX,1 dec  takes less space Both execute at about the same speed
Overview of Assembly Instructions (cont’d) Arithmetic Instructions CMP instruction Format: cmp  destination,source Semantics: (destination)-(source) destination  and  source  are not altered Useful to test relationship (>, =) between two operands Used in conjunction with conditional jump instructions for decision making purposes Examples cmp  EBX,EAX  cmp  [count],100
Overview of Assembly Instructions (cont’d) Jump Instructions Unconditional Jump Format: jmp  label Semantics: Execution is transferred to the instruction identified by  label Examples:  Infinite loop mov  EAX,1 inc_again: inc  EAX jmp  inc_again mov  EBX,EAX  ; never executes this
Overview of Assembly Instructions (cont’d) Jump Instructions Conditional Jump Format: j<cond>  label Semantics: Execution is transferred to the instruction identified by  label  only if  <cond>  is met Examples:  Testing for carriage return GetCh  AL cmp  AL,0DH  ;  0DH = ASCII carriage return je  CR_received inc  CL ... CR_received:
Overview of Assembly Instructions (cont’d) Jump Instructions Conditional Jump Some conditional jump instructions Treats operands of the CMP instruction as signed numbers je jump if equal jg jump if greater jl jump if less jge jump if greater or equal jle jump if less or equal jne jump if not equal
Overview of Assembly Instructions (cont’d) Jump Instructions Conditional Jump Conditional jump instructions can also test values of the individual flags jz jump if zero  (i.e., if ZF = 1) jnz jump if not zero  (i.e., if ZF = 0)   jc jump if carry  (i.e., if CF = 1) jnc jump if not carry  (i.e., if CF = 0) jz  is synonymous for  je jnz   is synonymous for  jne
Overview of Assembly Instructions (cont’d) Loop Instruction LOOP Instruction Format: loop  target Semantics: Decrements ECX and jumps to target if ECX    0 ECX should be loaded with a loop count value Example:  Executes   loop body 50 times mov  ECX,50 repeat: <loop body> loop  repeat ...
Overview of Assembly Instructions (cont’d) Loop Instruction The previous example is equivalent to mov  ECX,50 repeat: <loop body> dec  ECX jnz  repeat ... Surprisingly,  dec  ECX jnz  repeat   executes faster than  loop  repeat
Overview of Assembly Instructions (cont’d) Logical Instructions Format: and  destination,source or  destination,source xor  destination,source not  destination Semantics: Performs the standard bitwise logical operations result goes to  destination  TEST is a non-destructive AND instruction test  destination,source Performs logical AND but the result is not stored in  destination  (like the CMP instruction)
Overview of Assembly Instructions (cont’d) Logical Instructions Example: Testing the value in AL for odd/even number test  AL,01H  ;  test the least significant bit je  even_number odd_number: <process odd number> jmp  skip1 even_number: <process even number> skip1: . . .
Overview of Assembly Instructions (cont’d) Shift Instructions Format: Shift left shl  destination,count  shl  destination,CL Shift right shr  destination,count  shr  destination,CL Semantics: Performs left/right shift of  destination  by the value in  count  or  CL  register CL  register contents are not altered
Overview of Assembly Instructions (cont’d) Shift Instructions Bit shifted out goes into the carry flag Zero bit is shifted in at the other end
Overview of Assembly Instructions (cont’d) Shift Instructions count  is an immediate value shl  AX,5 Specification of  count  greater than 31 is not allowed If a greater value is specified, only the least significant 5 bits are used CL version is useful if shift count is known at run time E.g. when the shift count value is passed as a parameter in a procedure call Only the CL register can be used Shift count value should be loaded into CL mov  CL,5 shl  AX,CL
Overview of Assembly Instructions (cont’d) Rotate Instructions Two types of ROTATE instructions Rotate without carry rol  (ROtate Left) ror  (ROtate Right) Rotate with carry rcl  (Rotate through Carry Left) rcr  (Rotate through Carry Right) Format of ROTATE instructions is similar to the SHIFT instructions Supports two versions Immediate count value Count value in CL register
Overview of Assembly Instructions (cont’d) Rotate Instructions Rotate without carry
Overview of Assembly Instructions (cont’d) Rotate Instructions Rotate with carry
Defining Constants NASM provides three directives: EQU  directive No reassignment Only numeric constants are allowed %assign  directive Allows redefinition Only numeric constants are allowed %define  directive Allows redefinition Can be used for both numeric and string constants
Defining Constants Defining constants has two main advantages Improves program readability NUM_OF_STUDENTS  EQU  90 . . . . . . . . mov  ECX,NUM_OF_STUDENTS is more readable than  mov  ECX,90 Helps in software maintenance Multiple occurrences can be changed from a single place Convention We use all upper-case letters for names of constants
Defining Constants The EQU directive Syntax: name  EQU  expression Assigns the result of  expression  to  name The  expression  is evaluated  at assembly time Examples NUM_OF_ROWS  EQU  50 NUM_OF_COLS  EQU  10 ARRAY_SIZE  EQU  NUM_OF_ROWS * NUM_OF_COLS
Defining Constants The  %assign  directive Syntax: %assign name expression Similar to EQU directive A key difference Redefinition is allowed %assign  i  j+1 . . . %assign  i  j+2 is valid Case-sensitive Use  %iassign  for case-insensitive definition
Defining Constants The  %define  directive Syntax: %define name constant Both numeric and strig constants can be defined Redefinition is allowed %define  X1  [EBP+4] . . . %assign  X1  [EBP+20] is valid Case-sensitive Use  %idefine  for case-insensitive definition
Macros Macros are defined using  %macro  and  %endmacro  directives Typical macro definition %macro  macro_name  para_count <macro_body> %endmacro Example 1: A parameterless macro %macro  multEAX_by_16 sal  EAX,4 %endmacro Specifies number  of parameters
Macros (cont’d) Example 2: A parameterized macro %macro  mult_by_16  1 sal  %1,4 %endmacro Example 3: Memory-to-memory data transfer %macro  mxchg  2 xchg  EAX,%1  xchg  EAX,%2 xchg  EAX,%1 %endmacro one parameter two parameters
Illustrative Examples Five examples are presented: Conversion of ASCII to binary representation (BINCHAR.ASM) Conversion of ASCII to hexadecimal by character manipulation (HEX1CHAR.ASM)  Conversion of ASCII to hexadecimal using the XLAT instruction (HEX2CHAR.ASM) Conversion of lowercase letters to uppercase by character manipulation (TOUPPER.ASM) Sum of individual digits of a number (ADDIGITS.ASM)
Performance: When to Use XLAT Lowercase to uppercase conversion XLAT is bad for this application with XLAT without XLAT
Performance: When to Use XLAT (cont’d) Hex conversion XLAT is better for this application with XLAT without XLAT Last slide

More Related Content

PPT
8086 assembly language
PDF
Cpprm
PDF
Assembly Language Programming By Ytha Yu, Charles Marut Chap 10 ( Arrays and ...
PDF
Doscommands
PDF
Assembler directives and basic steps ALP of 8086
PPTX
C++ language
PPTX
Chapter 2 programming concepts - I
8086 assembly language
Cpprm
Assembly Language Programming By Ytha Yu, Charles Marut Chap 10 ( Arrays and ...
Doscommands
Assembler directives and basic steps ALP of 8086
C++ language
Chapter 2 programming concepts - I

What's hot (18)

PPTX
[ASM]Lab8
PPTX
Chapter 4 programming concepts III
PDF
N_Asm Assembly addressing modes (sol)
DOC
'C' language notes (a.p)
DOCX
Class notes(week 5) on command line arguments
PPTX
Chapter 5 programming concepts iv
PDF
Functions, Strings ,Storage classes in C
PPT
Assembly Language String Chapter
PPTX
[ASM]Lab6
PPTX
Introduction to C Unit 1
PPTX
C Theory
PDF
Module 4 Arithmetic Coding
PPT
Chapter Eight(2)
PPTX
C presentation! BATRA COMPUTER CENTRE
PDF
Tutorial on c language programming
PPTX
Overview of c++ language
DOCX
C tutorials
PDF
Structures-2
[ASM]Lab8
Chapter 4 programming concepts III
N_Asm Assembly addressing modes (sol)
'C' language notes (a.p)
Class notes(week 5) on command line arguments
Chapter 5 programming concepts iv
Functions, Strings ,Storage classes in C
Assembly Language String Chapter
[ASM]Lab6
Introduction to C Unit 1
C Theory
Module 4 Arithmetic Coding
Chapter Eight(2)
C presentation! BATRA COMPUTER CENTRE
Tutorial on c language programming
Overview of c++ language
C tutorials
Structures-2
Ad

Similar to Al2ed chapter4 (20)

POT
Arrays and addressing modes
PPTX
CHAPTER 4and answer equation and cf.pptx
PPT
Wk1to4
PPTX
PPTX
[ASM]Lab4
PPTX
Chapter 3 programming concepts-ii
PPTX
8086 Assembly Language and Serial Monitor Operation of 8086 Trainer Kit
PPTX
Microprocessor Miscellaneous datatrans+directives
PPTX
Module 3 Computer Organization Data Hazards.pptx
PPTX
Assembly language.pptx
PPT
11 instruction sets addressing modes
PPTX
Assembly Language for as level computer science
PPT
11 instruction sets addressing modes
PPTX
micro chapter 3jjgffffyeyhhuyerfftfgggffgjj
PPT
11_ Instruction Sets addressing modes .ppt
PDF
Intel8086_Flags_Addr_Modes_sample_pgms.pdf
PPTX
Co&amp;al lecture-05
PPTX
Introduction to Assembly Language & various basic things
PPT
11_ Instruction Sets addressing modes -1.ppt
PPT
ch 3_The CPU_modified.ppt of central processing unit
Arrays and addressing modes
CHAPTER 4and answer equation and cf.pptx
Wk1to4
[ASM]Lab4
Chapter 3 programming concepts-ii
8086 Assembly Language and Serial Monitor Operation of 8086 Trainer Kit
Microprocessor Miscellaneous datatrans+directives
Module 3 Computer Organization Data Hazards.pptx
Assembly language.pptx
11 instruction sets addressing modes
Assembly Language for as level computer science
11 instruction sets addressing modes
micro chapter 3jjgffffyeyhhuyerfftfgggffgjj
11_ Instruction Sets addressing modes .ppt
Intel8086_Flags_Addr_Modes_sample_pgms.pdf
Co&amp;al lecture-05
Introduction to Assembly Language & various basic things
11_ Instruction Sets addressing modes -1.ppt
ch 3_The CPU_modified.ppt of central processing unit
Ad

More from Abdullelah Al-Fahad (17)

PPT
Al2ed chapter17
PPT
Al2ed chapter16
PPT
Al2ed chapter15
PPT
Al2ed chapter14
PPT
Al2ed chapter13
PPT
Al2ed chapter12
PPT
Al2ed chapter11
PPT
Al2ed chapter10
PPT
Al2ed chapter9
PPT
Al2ed chapter8
PPT
Al2ed chapter7
PPT
Al2ed chapter6
PPT
Al2ed chapter5
PPT
Al2ed chapter3
PPT
Al2ed chapter2
PPT
Al2ed chapter1
PPT
Al2ed chapter18
Al2ed chapter17
Al2ed chapter16
Al2ed chapter15
Al2ed chapter14
Al2ed chapter13
Al2ed chapter12
Al2ed chapter11
Al2ed chapter10
Al2ed chapter9
Al2ed chapter8
Al2ed chapter7
Al2ed chapter6
Al2ed chapter5
Al2ed chapter3
Al2ed chapter2
Al2ed chapter1
Al2ed chapter18

Al2ed chapter4

  • 1. Overview of Assembly Language Chapter 4 S. Dandamudi
  • 2. Outline Assembly language statements Data allocation Where are the operands? Addressing modes Register Immediate Direct Indirect Data transfer instructions mov , xchg , and xlat Ambiguous moves Overview of assembly language instructions Arithmetic Conditional Iteration Logical Shift/Rotate Defining constants EQU , %assign , %define Macros Illustrative examples Performance: When to use the xlat instruction
  • 3. Assembly Language Statements Three different classes Instructions Tell CPU what to do Executable instructions with an op-code Directives (or pseudo-ops) Provide information to assembler on various aspects of the assembly process Non-executable Do not generate machine language instructions Macros A shorthand notation for a group of statements A sophisticated text substitution mechanism with parameters
  • 4. Assembly Language Statements (cont’d) Assembly language statement format: [label] mnemonic [operands] [;comment] Typically one statement per line Fields in [ ] are optional label serves two distinct purposes: To label an instruction Can transfer program execution to the labeled instruction To label an identifier or constant mnemonic identifies the operation (e.g. add , or ) operands specify the data required by the operation Executable instructions can have zero to three operands
  • 5. Assembly Language Statements (cont’d) comments Begin with a semicolon (;) and extend to the end of the line Examples repeat: inc [result] ; increment result CR EQU 0DH ; carriage return character White space can be used to improve readability repeat: inc [result] ; increment result
  • 6. Data Allocation Variable declaration in a high-level language such as C char response int value float total double average_value specifies Amount storage required (1 byte, 2 bytes, …) Label to identify the storage allocated (response, value, …) Interpretation of the bits stored (signed, floating point, …) Bit pattern 1000 1101 1011 1001 is interpreted as  29,255 as a signed number 36,281 as an unsigned number
  • 7. Data Allocation (cont’d) In assembly language, we use the define directive Define directive can be used To reserve storage space To label the storage space To initialize But no interpretation is attached to the bits stored Interpretation is up to the program code Define directive goes into the .DATA part of the assembly language program Define directive format for initialized data [var-name] D? init-value [,init-value],...
  • 8. Data Allocation (cont’d) Five define directives for initialized data DB Define Byte ;allocates 1 byte DW Define Word ;allocates 2 bytes DD Define Doubleword ;allocates 4 bytes DQ Define Quadword ;allocates 8 bytes DT Define Ten bytes ;allocates 10 bytes Examples sorted DB ’y’ value DW 25159 Total DD 542803535 float1 DD 1.234
  • 9. Data Allocation (cont’d) Directives for uninitialized data Five reserve directives RESB Reserve a Byte ;allocates 1 byte RESW Reserve a Word ;allocates 2 bytes RESD Reserve a Doubleword ;allocates 4 bytes RESQ Reserve a Quadword ;allocates 8 bytes REST Reserve a Ten bytes ;allocates 10 bytes Examples response resb 1 buffer resw 100 Total resd 1
  • 10. Data Allocation (cont’d) Multiple definitions can be abbreviated Example message DB ’B’ DB ’y’ DB ’e’ DB 0DH DB 0AH can be written as message DB ’B’,’y’,’e’,0DH,0AH More compactly as message DB ’Bye’,0DH,0AH
  • 11. Data Allocation (cont’d) Multiple definitions can be cumbersome to initialize data structures such as arrays Example To declare and initialize an integer array of 8 elements marks DW 0,0,0,0,0,0,0,0 What if we want to declare and initialize to zero an array of 200 elements? There is a better way of doing this than repeating zero 200 times in the above statement Assembler provides a directive to do this (DUP directive)
  • 12. Data Allocation (cont’d) Multiple initializations The TIMES assembler directive allows multiple initializations to the same value Examples Previous marks array marks DW 0,0,0,0,0,0,0,0 can be compactly declared as marks TIMES 8 DW 0
  • 13. Data Allocation (cont’d) Symbol Table Assembler builds a symbol table so we can refer to the allocated storage space by the associated label Example .DATA name offset value DW 0 value 0 sum DD 0 sum 2 marks DW 10 DUP (?) marks 6 message DB ‘The grade is:’,0 message 26 char1 DB ? char1 40
  • 14. Data Allocation (cont’d) Correspondence to C Data Types Directive C data type DB char DW int, unsigned DD float, long DQ double DT internal intermediate float value
  • 15. Where Are the Operands? Operands required by an operation can be specified in a variety of ways A few basic ways are: operand is in a register register addressing mode operand is in the instruction itself immediate addressing mode operand is in the memory variety of addressing modes direct and indirect addressing modes operand is at an I/O port
  • 16. Where Are the Operands? (cont’d) Register Addressing Mode Most efficient way of specifying an operand operand is in an internal register Examples mov EAX,EBX mov BX,CX The mov instruction mov destination,source copies data from source to destination
  • 17. Where Are the Operands? (cont’d) Immediate Addressing Mode Data is part of the instruction operand is located in the code segment along with the instruction Efficient as no separate operand fetch is needed Typically used to specify a constant Example mov AL,75 This instruction uses register addressing mode for specifying the destination and immediate addressing mode to specify the source
  • 18. Where Are the Operands? (cont’d) Direct Addressing Mode Data is in the data segment Need a logical address to access data Two components: segment:offset Various addressing modes to specify the offset component offset part is referred to as the effective address The offset is specified directly as part of the instruction We write assembly language programs using memory labels (e.g., declared using DB, DW, ...) Assembler computes the offset value for the label Uses symbol table to compute the offset of a label
  • 19. Where Are the Operands? (cont’d) Direct Addressing Mode (cont’d) Examples mov AL,[response] Assembler replaces response by its effective address (i.e., its offset value from the symbol table) mov [table1],56 table1 is declared as table1 TIMES 20 DW 0 Since the assembler replaces table1 by its effective address, this instruction refers to the first element of table1 In C, it is equivalent to table1[0] = 56
  • 20. Where Are the Operands? (cont’d) Direct Addressing Mode (cont’d) Problem with direct addressing Useful only to specify simple variables Causes serious problems in addressing data types such as arrays As an example, consider adding elements of an array Direct addressing does not facilitate using a loop structure to iterate through the array We have to write an instruction to add each element of the array Indirect addressing mode remedies this problem
  • 21. Where Are the Operands? (cont’d) Indirect Addressing Mode The offset is specified indirectly via a register Sometimes called register indirect addressing mode For 16-bit addressing, the offset value can be in one of the three registers: BX, SI, or DI For 32-bit addressing, all 32-bit registers can be used Example mov AX,[EBX] Square brackets [ ] are used to indicate that EBX is holding an offset value EBX contains a pointer to the operand, not the operand itself
  • 22. Where Are the Operands? (cont’d) Using indirect addressing mode, we can process arrays using loops Example: Summing array elements Load the starting address (i.e., offset) of the array into EBX Loop for each element in the array Get the value using the offset in EBX Use indirect addressing Add the value to the running total Update the offset in EBX to point to the next element of the array
  • 23. Where Are the Operands? (cont’d) Loading offset value into a register Suppose we want to load EBX with the offset value of table1 We can simply write mov EBX,table1 It resolves offset at the assembly time Another way of loading offset value Using the lea instruction This is a processor instruction Resolves offset at run time
  • 24. Where Are the Operands? (cont’d) Loading offset value into a register Using lea (load effective address) instruction The format of lea instruction is lea register,source The previous example can be written as lea EBX,[table1] May have to use lea in some instances When the needed data is available at run time only An index passed as a parameter to a procedure We can write lea EBX,[table1+ESI] to load EBX with the address of an element of table1 whose index is in the ESI register We cannot use the mov instruction to do this
  • 25. Data Transfer Instructions We will look at three instructions mov (move) Actually copy xchg (exchange) Exchanges two operands xlat (translate) Translates byte values using a translation table Other data transfer instructions such as movsx (move sign extended) movzx (move zero extended) are discussed in Chapter 7
  • 26. Data Transfer Instructions (cont’d) The mov instruction The format is mov destination,source Copies the value from source to destination source is not altered as a result of copying Both operands should be of same size source and destination cannot both be in memory Most Pentium instructions do not allow both operands to be located in memory Pentium provides special instructions to facilitate memory-to-memory block copying of data
  • 27. Data Transfer Instructions (cont’d) The mov instruction Five types of operand combinations are allowed: Instruction type Example mov register,register mov DX,CX mov register,immediate mov BL,100 mov register,memory mov EBX,[count] mov memory,register mov [count],ESI mov memory,immediate mov [count],23 The operand combinations are valid for all instructions that require two operands
  • 28. Data Transfer Instructions (cont’d) Ambiguous moves: PTR directive For the following data definitions .DATA table1 TIMES 20 DW 0 status TIMES 7 DB 1 the last two mov instructions are ambiguous mov EBX, table1 mov ESI, status mov [EBX],100 mov [ESI],100 Not clear whether the assembler should use byte or word equivalent of 100
  • 29. Data Transfer Instructions (cont’d) Ambiguous moves: PTR directive A type specifier can be used to clarify The last two mov instructions can be written as mov WORD [EBX],100 mov BYTE [ESI],100 WORD and BYTE are called type specifiers We can also write these statements as mov [EBX], WORD 100 mov [ESI], BYTE 100
  • 30. Data Transfer Instructions (cont’d) Ambiguous moves: PTR directive We can use the following type specifiers: Type specifier Bytes addressed BYTE 1 WORD 2 DWORD 4 QWORD 8 TWORD 10
  • 31. Data Transfer Instructions (cont’d) The xchg instruction The syntax is xchg operand1,operand2 Exchanges the values of operand1 and operand2 Examples xchg EAX,EDX xchg [response],CL xchg [total],DX Without the xchg instruction, we need a temporary register to exchange values using only the mov instruction
  • 32. Data Transfer Instructions (cont’d) The xchg instruction The xchg instruction is useful for conversion of 16-bit data between little endian and big endian forms Example: mov AL,AH converts the data in AX into the other endian form Pentium provides bswap instruction to do similar conversion on 32-bit data bswap 32-bit register bswap works only on data located in a 32-bit register
  • 33. Data Transfer Instructions (cont’d) The xlat instruction The xlat instruction translates bytes The format is xlatb To use xlat instruction EBX should be loaded with the starting address of the translation table AL must contain an index in to the table Index value starts at zero The instruction reads the byte at this index in the translation table and stores this value in AL The index value in AL is lost Translation table can have at most 256 entries (due to AL)
  • 34. Data Transfer Instructions (cont’d) The xlat instruction Example: Encrypting digits Input digits: 0 1 2 3 4 5 6 7 8 9 Encrypted digits: 4 6 9 5 0 3 1 8 7 2 .DATA xlat_table DB ’4695031872’ ... .CODE mov EBX, xlat_table GetCh AL sub AL,’0’ ; converts input character to index xlatb ; AL = encrypted digit character PutCh AL ...
  • 35. Overview of Assembly Instructions Pentium provides several types of instructions Brief overview of some basic instructions: Arithmetic instructions Jump instructions Loop instruction Logical instructions Shift instructions Rotate instructions These sample instructions allows you to write reasonable assembly language programs
  • 36. Overview of Assembly Instructions (cont’d) Arithmetic Instructions INC and DEC instructions Format: inc destination dec destination Semantics: destination = destination +/- 1 destination can be 8-, 16-, or 32-bit operand, in memory or register No immediate operand Examples inc BX ; BX = BX+1 dec [value[ ; value = value-1
  • 37. Overview of Assembly Instructions (cont’d) Arithmetic Instructions ADD instruction Format: add destination,source Semantics: destination = (destination)+(source) Examples add EBX,EAX add [value],10H inc EAX is better than add EAX,1 inc takes less space Both execute at about the same speed
  • 38. Overview of Assembly Instructions (cont’d) Arithmetic Instructions SUB instruction Format: sub destination,source Semantics: destination := (destination)-(source) Examples sub EBX,EAX sub [value],10H dec EAX is better than sub EAX,1 dec takes less space Both execute at about the same speed
  • 39. Overview of Assembly Instructions (cont’d) Arithmetic Instructions CMP instruction Format: cmp destination,source Semantics: (destination)-(source) destination and source are not altered Useful to test relationship (>, =) between two operands Used in conjunction with conditional jump instructions for decision making purposes Examples cmp EBX,EAX cmp [count],100
  • 40. Overview of Assembly Instructions (cont’d) Jump Instructions Unconditional Jump Format: jmp label Semantics: Execution is transferred to the instruction identified by label Examples: Infinite loop mov EAX,1 inc_again: inc EAX jmp inc_again mov EBX,EAX ; never executes this
  • 41. Overview of Assembly Instructions (cont’d) Jump Instructions Conditional Jump Format: j<cond> label Semantics: Execution is transferred to the instruction identified by label only if <cond> is met Examples: Testing for carriage return GetCh AL cmp AL,0DH ; 0DH = ASCII carriage return je CR_received inc CL ... CR_received:
  • 42. Overview of Assembly Instructions (cont’d) Jump Instructions Conditional Jump Some conditional jump instructions Treats operands of the CMP instruction as signed numbers je jump if equal jg jump if greater jl jump if less jge jump if greater or equal jle jump if less or equal jne jump if not equal
  • 43. Overview of Assembly Instructions (cont’d) Jump Instructions Conditional Jump Conditional jump instructions can also test values of the individual flags jz jump if zero (i.e., if ZF = 1) jnz jump if not zero (i.e., if ZF = 0) jc jump if carry (i.e., if CF = 1) jnc jump if not carry (i.e., if CF = 0) jz is synonymous for je jnz is synonymous for jne
  • 44. Overview of Assembly Instructions (cont’d) Loop Instruction LOOP Instruction Format: loop target Semantics: Decrements ECX and jumps to target if ECX  0 ECX should be loaded with a loop count value Example: Executes loop body 50 times mov ECX,50 repeat: <loop body> loop repeat ...
  • 45. Overview of Assembly Instructions (cont’d) Loop Instruction The previous example is equivalent to mov ECX,50 repeat: <loop body> dec ECX jnz repeat ... Surprisingly, dec ECX jnz repeat executes faster than loop repeat
  • 46. Overview of Assembly Instructions (cont’d) Logical Instructions Format: and destination,source or destination,source xor destination,source not destination Semantics: Performs the standard bitwise logical operations result goes to destination TEST is a non-destructive AND instruction test destination,source Performs logical AND but the result is not stored in destination (like the CMP instruction)
  • 47. Overview of Assembly Instructions (cont’d) Logical Instructions Example: Testing the value in AL for odd/even number test AL,01H ; test the least significant bit je even_number odd_number: <process odd number> jmp skip1 even_number: <process even number> skip1: . . .
  • 48. Overview of Assembly Instructions (cont’d) Shift Instructions Format: Shift left shl destination,count shl destination,CL Shift right shr destination,count shr destination,CL Semantics: Performs left/right shift of destination by the value in count or CL register CL register contents are not altered
  • 49. Overview of Assembly Instructions (cont’d) Shift Instructions Bit shifted out goes into the carry flag Zero bit is shifted in at the other end
  • 50. Overview of Assembly Instructions (cont’d) Shift Instructions count is an immediate value shl AX,5 Specification of count greater than 31 is not allowed If a greater value is specified, only the least significant 5 bits are used CL version is useful if shift count is known at run time E.g. when the shift count value is passed as a parameter in a procedure call Only the CL register can be used Shift count value should be loaded into CL mov CL,5 shl AX,CL
  • 51. Overview of Assembly Instructions (cont’d) Rotate Instructions Two types of ROTATE instructions Rotate without carry rol (ROtate Left) ror (ROtate Right) Rotate with carry rcl (Rotate through Carry Left) rcr (Rotate through Carry Right) Format of ROTATE instructions is similar to the SHIFT instructions Supports two versions Immediate count value Count value in CL register
  • 52. Overview of Assembly Instructions (cont’d) Rotate Instructions Rotate without carry
  • 53. Overview of Assembly Instructions (cont’d) Rotate Instructions Rotate with carry
  • 54. Defining Constants NASM provides three directives: EQU directive No reassignment Only numeric constants are allowed %assign directive Allows redefinition Only numeric constants are allowed %define directive Allows redefinition Can be used for both numeric and string constants
  • 55. Defining Constants Defining constants has two main advantages Improves program readability NUM_OF_STUDENTS EQU 90 . . . . . . . . mov ECX,NUM_OF_STUDENTS is more readable than mov ECX,90 Helps in software maintenance Multiple occurrences can be changed from a single place Convention We use all upper-case letters for names of constants
  • 56. Defining Constants The EQU directive Syntax: name EQU expression Assigns the result of expression to name The expression is evaluated at assembly time Examples NUM_OF_ROWS EQU 50 NUM_OF_COLS EQU 10 ARRAY_SIZE EQU NUM_OF_ROWS * NUM_OF_COLS
  • 57. Defining Constants The %assign directive Syntax: %assign name expression Similar to EQU directive A key difference Redefinition is allowed %assign i j+1 . . . %assign i j+2 is valid Case-sensitive Use %iassign for case-insensitive definition
  • 58. Defining Constants The %define directive Syntax: %define name constant Both numeric and strig constants can be defined Redefinition is allowed %define X1 [EBP+4] . . . %assign X1 [EBP+20] is valid Case-sensitive Use %idefine for case-insensitive definition
  • 59. Macros Macros are defined using %macro and %endmacro directives Typical macro definition %macro macro_name para_count <macro_body> %endmacro Example 1: A parameterless macro %macro multEAX_by_16 sal EAX,4 %endmacro Specifies number of parameters
  • 60. Macros (cont’d) Example 2: A parameterized macro %macro mult_by_16 1 sal %1,4 %endmacro Example 3: Memory-to-memory data transfer %macro mxchg 2 xchg EAX,%1 xchg EAX,%2 xchg EAX,%1 %endmacro one parameter two parameters
  • 61. Illustrative Examples Five examples are presented: Conversion of ASCII to binary representation (BINCHAR.ASM) Conversion of ASCII to hexadecimal by character manipulation (HEX1CHAR.ASM) Conversion of ASCII to hexadecimal using the XLAT instruction (HEX2CHAR.ASM) Conversion of lowercase letters to uppercase by character manipulation (TOUPPER.ASM) Sum of individual digits of a number (ADDIGITS.ASM)
  • 62. Performance: When to Use XLAT Lowercase to uppercase conversion XLAT is bad for this application with XLAT without XLAT
  • 63. Performance: When to Use XLAT (cont’d) Hex conversion XLAT is better for this application with XLAT without XLAT Last slide