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ANALOG
CIRCUITS
andDEVICES
© 2003 by CRC Press LLC

CRC PR ESS
Boca Raton London New York Washington, D.C.
Editor-in-Chief
Wai-Kai Chen
ANALOG
CIRCUITS
andDEVICES

This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with
permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish
reliable data and information, but the authors and the publisher cannot assume responsibility for the validity of all materials
or for the consequences of their use.
Neither this book nor any part may be reproduced or transmitted in any form or by any means, electronic or mechanical,
including photocopying, microfilming, and recording, or by any information storage or retrieval system, without prior
permission in writing from the publisher.
All rights reserved. Authorization to photocopy items for internal or personal use, or the personal or internal use of specific
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ISBN 0-8493-1736-3/03/$0.00+$1.50. The fee is subject to change without notice. For organizations that have been granted
a photocopy license by the CCC, a separate system of payment has been arranged.
The consent of CRC Press LLC does not extend to copying for general distribution, for promotion, for creating new works,
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Direct all inquiries to CRC Press LLC, 2000 N.W. Corporate Blvd., Boca Raton, Florida 33431.
Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for
identification and explanation, without intent to infringe.
The material included here first appeared in The VLSI Handbook (CRC Press, 2000), Wai-Kai Chen, editor.
No claim to original U.S. Government works
International Standard Book Number 0-8493-1736-3
Printed in the United States of America 1 2 3 4 5 6 7 8 9 0
Printed on acid-free paper
Library of Congress Cataloging-in-Publication Data
Catalog record is available from the Library of Congress
Visit the CRC Press Web site at www.crcpress.com

v
Preface
The purpose of Analog Circuits and Devices is to provide, in a single volume, a comprehensive reference
covering the broad spectrum of devices and their models, amplifiers, analog circuits and filters, and
compound semiconductor digital integrated circuit technology. The book has been written and developed
for practicing electrical engineers in industry, government, and academia. The goal is to provide the most
up-to-date information in the field.
Over the years, the fundamentals of the field have evolved to include a wide range of topics and a
broad range of practice. To encompass such a wide range of knowledge, the book focuses on the key
concepts, models, and equations that enable the design engineer to analyze, design, and predict the
behavior of large-scale systems. While design formulas and tables are listed, emphasis is placed on the
key concepts and theories underlying the processes.
The book stresses fundamental theory behind professional applications. In order to do so, the text is
reinforced with frequent examples. Extensive development of theory and details of proofs have been
omitted. The reader is assumed to have a certain degree of sophistication and experience. However, brief
reviews of theories, principles, and mathematics of some subject areas are given.
The compilation of this book would not have been possible without the dedication and efforts of John
Choma, Jr., Rolf Schaumann, Bang-Sup Song, Stephen I. Long, and, most of all, the contributing authors.
I wish to thank them all.
Wai-Kai Chen
Editor-in-Chief

vii
Editor-in-Chief
Wai-Kai Chen is Professor and Head Emeritus of the Department of
Electrical Engineering and Computer Science at the University of
Illinois at Chicago. He is now serving as Academic Vice President at
International Technological University. He received his B.S. and M.S.
in electrical engineering at Ohio University, where he was later rec-
ognized as a Distinguished Professor. He earned his Ph.D. in electrical
engineering at University of Illinois at Urbana/Champaign.
Professor Chen has extensive experience in education and industry
and is very active professionally in the fields of circuits and systems.
He has served as visiting professor at Purdue University, University
of Hawaii at Manoa, and Chuo University in Tokyo, Japan. He was
editor of the IEEE Transactions on Circuits and Systems, Series I and
II, president of the IEEE Circuits and Systems Society, and is the
founding editor and editor-in-chief of the Journal of Circuits, Systems
and Computers. He received the Lester R. Ford Award from the Math-
ematical Association of America, the Alexander von Humboldt Award from Germany, the JSPS Fellowship
Award from Japan Society for the Promotion of Science, the Ohio University Alumni Medal of Merit for
Distinguished Achievement in Engineering Education, the Senior University Scholar Award and the 2000
Faculty Research Award from the University of Illinois at Chicago, and the Distinguished Alumnus Award
from the University of Illinois at Urbana/Champaign. He is the recipient of the Golden Jubilee Medal,
the Education Award, and the Meritorious Service Award from IEEE Circuits and Systems Society, and the
Third Millennium Medal from the IEEE. He has also received more than a dozen honorary professorship
awards from major institutions in China.
A fellow of the Institute of Electrical and Electronics Engineers and the American Association for the
Advancement of Science, Professor Chen is widely known in the profession for his Applied Graph Theory
(North-Holland), Theory and Design of Broadband Matching Networks (Pergamon Press), Active Network
and Feedback Amplifier Theory (McGraw-Hill), Linear Networks and Systems (Brooks/Cole), Passive and
Active Filters: Theory and Implements (John Wiley),Theory of Nets: Flows in Networks (Wiley-Interscience),
and The VLSI Handbook and The Circuits and Filters Handbook (CRC Press).

ix
Contributors
R. Jacob Baker
University of Idaho
Boise, Idaho
Andrea Baschirotto
Università di Pavia
Pavia, Italy
Marc Borremans
Katholieke Universiteit Leuven
Leuven-Heverlee, Belgium
Charles E. Chang
Conexant Systems, Inc.
Newbury Park, California
David J. Comer
Brigham Young University
Provo, Utah
Donald T. Comer
Provo, Utah
Bram De Muer
Katholieke Universiteit Leaven
Geert A. De Veirman
Silicon Systems, Inc.
Tustin, California
Maria del MarHershenson
Stanford University
Stanford, California
Donald B. Estreich
Hewlett-Parkard Company
Santa Rosa, California
John W. Fattaruso
Texas Instruments, Incorporated
Dallas, Texas
Mohammed Ismail
The Ohio State University
Columbus, Ohio
Johan Janssens
John M. Khoury
Lucent Technologies
Murray Hill, New Jersey
Thomas H. Lee
Stanford University
Harry W. Li
University of Idaho
Moscow, Idaho
Chi-Hung Lin
The Ohio State University
Columbus, Ohio
Stephen I. Long
University of California
Santa Barbara, California

x
Sunderarajan S. Mohan
Stanford University
Alison Payne
Imperial College
University of London
London, England
Hirad Samavati
Stanford University
Bang-Sup Song
University of California
La Jolla, California
Michiel Steyaert
Donald C. Thelen
Analog Interfaces
Bozeman, Montana
Chris Toumazou
Imperial College
University of London
London, England
Meera Venkataraman
Troika Networks, Inc.
Calabasas Hills, California
Chorng-kuang Wang
National Taiwan University
Taipei, Taiwan
R.F. Wassenaar
University of Twente
Enschede, The Netherlands
Louis A. Williams, III
Texas Instruments, Inc.
Dallas, Texas
Min-shueh Yuan
National Taiwan University
Taipei, Taiwan
C. Patrick Yue
Stanford University

xi
Contents
1.1 Introduction .........................................................................................................................1-1
1.2 Physical Characteristics and Properties of the BJT ..............................................................1-2
1.3 Basic Operation of the BJT....................................................................................................1-2
1.4 Use of the BJT as an Amplifier .............................................................................................1-5
1.5 Representing the Major BJT Effects by an Electronic Model ..............................................1-6
1.6 Other Physical Effects in the BJT .........................................................................................1-6
1.7 More Accurate BJT Models ..................................................................................................1-8
1.8 Heterojunction Bipolar Junction Transistors ......................................................................1-8
1.9 Integrated Circuit Biasing Using Current Mirrors ..............................................................1-9
1.10 The Basic BJT Switch ..........................................................................................................1-14
1.11 High-Speed BJT Switching .................................................................................................1-16
1.12 Simple Logic Gates ..............................................................................................................1-19
1.13 Emitter-Coupled Logic .......................................................................................................1-19
Sunderarajan S. Mohan, Hirad Samavati, and C. Patrick Yue
2.1 Introduction .........................................................................................................................2-1
2.2 Fractal Capacitors .................................................................................................................2-1
2.3 Spiral Inductors ....................................................................................................................2-8
2.4 On-Chip Transformers .......................................................................................................2-14
3
3.1 Introduction ..........................................................................................................................3-1
3.2 Biasing Circuits .....................................................................................................................3-7
3.3 Amplifiers ...........................................................................................................................3-15
4
4.1 Introduction .........................................................................................................................4-1
4.2 Single-Transistor Amplifiers ................................................................................................4-1
4.3 Differential Amplifiers ........................................................................................................4-22
4.4 Output Stages ......................................................................................................................4-40
4.5 Bias Reference .....................................................................................................................4-45
4.6 Operational Amplifiers .......................................................................................................4-49
4.7 Conclusion ..........................................................................................................................4-56
Bipolar Junction Transistor (BJT) Circuits David J. Comer and Donald T. Comer
1
RF Passive IC Components Thomas H. Lee, Maria del MarHershenson,
2
CMOS Amplifier Design Harry W. Li, R. Jacob Baker, and Donald C. Thelen
Bipolar Amplifier Design Geert A. De Veirman

xii
5
5.1 Introduction .........................................................................................................................5-1
5.2 The Current Feedback Op-Amp ..........................................................................................5-2
5.3 RF Low-Noise Amplifiers ...................................................................................................5-12
5.4 Optical Low-Noise Preamplifiers .......................................................................................5-18
5.5 Fundamentals of RF Power Amplifier Design ...................................................................5-24
5.6 Applications of High-Q Resonators in IF-Sampling Receiver Architectures ....................5-29
5.7 Log-Domain Processing .....................................................................................................5-36
6
Chi-Hung Lin
6.1 Introduction .........................................................................................................................6-1
6.2 Noise Behavior of the OTA ..................................................................................................6-1
6.3 An OTA with an Improved Output Swing ..........................................................................6-4
6.4 OTAs with High Drive Capability.........................................................................................6-6
6.5 Common-Mode Feedback .................................................................................................6-14
6.6 Filter Applications with Low-Voltage OTAs ......................................................................6-16
7
7.1 Introduction ..........................................................................................................................7-1
7.2 ADC Design Arts ...................................................................................................................7-5
7.3 ADC Architectures ................................................................................................................7-7
7.4 ADC Design Considerations ...............................................................................................7-18
7.5 DAC Design Arts .................................................................................................................7-22
7.6 DAC Architectures ..............................................................................................................7-23
7.7 DAC Design Considerations ...............................................................................................7-27
8
John W. Fattaruso and Louis A. Williams, III
8.1 Introduction ..........................................................................................................................8-1
8.2 Basic Theory of Operation ....................................................................................................8-2
8.3 Alternative Sigma-Delta Architectures ...............................................................................8-14
8.4 Filtering for Sigma-Delta Modulators.................................................................................8-19
8.5 Circuit Building Blocks .......................................................................................................8-21
8.6 Practical Design Issues.........................................................................................................8-30
8.7 Summary..............................................................................................................................8-36
9
Bram De Muer
9.1 Introduction ..........................................................................................................................9-1
9.2 Technology ............................................................................................................................9-2
9.3 The Receiver ..........................................................................................................................9-4
9.4 The Synthesizer....................................................................................................................9-12
9.5 The Transmitter...................................................................................................................9-17
High-Frequency Amplifiers Chris Toumazou and Alison Payne
Operational Transconductance Amplifiers R.F. Wassenaar, Mohammed Ismail, and
Nyquist-Rate ADC and DAC Bang-Sup Song
Oversampled Analog-to-Digital and Digital-to-Analog Converters
RF Communication Circuits Michiel Steyaert, Marc Borremans, Johan Janssens, and

xiii
9.6 Toward Fully Integrated Transceivers.................................................................................9-25
9.7 Conclusions .........................................................................................................................9-25
10
10.1 Introduction ........................................................................................................................10-1
10.2 PLL Techniques ...................................................................................................................10-2
10.3 Building Blocks of the PLL Circuit....................................................................................10-18
10.4 PLL Applications ...............................................................................................................10-22
11
11.1 Introduction ........................................................................................................................11-1
11.2 State-Variable Synthesis Techniques...................................................................................11-2
11.3 Realization of VLSI Integrators...........................................................................................11-9
11.4 Filter Tuning Circuits........................................................................................................11-25
11.5 Conclusion.........................................................................................................................11-30
12
12.1 Introduction ........................................................................................................................12-1
12.2 Sampled-Data Analog Filters...............................................................................................12-2
12.3 The Principle of the SC Technique .....................................................................................12-4
12.4 First-Order SC Stages ..........................................................................................................12-6
12.5 Second-Order SC Circuit ....................................................................................................12-9
12.6 Implementation Aspects....................................................................................................12-14
12.7 Performance Limitations...................................................................................................12-18
12.8 Compensation Technique (Performance Improvements)...............................................12-22
12.9 Advanced SC Filter Solutions............................................................................................12-27
13
13.1 Introduction ........................................................................................................................13-1
13.2 Compound Semiconductor Materials ................................................................................13-1
13.3 Why III-V Semiconductors?................................................................................................13-2
13.4 Heterojunctions...................................................................................................................13-3
14
14.1 Introduction ........................................................................................................................14-1
14.2 Unifying Principle for Active Devices: Charge Control Principle......................................14-1
14.3 Comparing Unipolar and Bipolar Transistors....................................................................14-6
14.4 Typical Device Structures..................................................................................................14-13
15
15.1 Introduction ........................................................................................................................15-1
15.2 Static Logic Design ..............................................................................................................15-1
15.3 Transient Analysis and Design for Very-High-Speed Logic...............................................15-8
PLL Circuits Min-shueh Yuan and Chorng-kuang Wang
Continuous-Time Filters John M. Khoury
Switched-Capacitor Filters Andrea Baschirotto
Materials Stephen I. Long
Compound Semiconductor Devices for Digital Circuits Donald B. Estreich
Logic Design Principles and Examples Stephen I. Long

xiv
16
16.1 Design of MESFET and HEMT Logic Circuits...................................................................16-1
16.2 HBT Logic Design Examples.............................................................................................16-10
Logic Design Examples Charles E. Chang, Meera Venkataraman, and Stephen I. Long

1-1
1
Bipolar Junction
Transistor (BJT) Circuits
1.1 Introduction ........................................................................1-1
1.2 Physical Characteristics and Properties of the BJT ..........1-2
1.3 Basic Operation of the BJT ................................................1-2
1.4 Use of the BJT as an Amplifier ..........................................1-5
1.5 Representing the Major BJT Effects
by an Electronic Model.......................................................1-6
1.6 Other Physical Effects in the BJT.......................................1-6
Ohmic Effects • Base-Width Modulation (Early
Effect) • Reactive Effects
1.7 More Accurate BJT Models ................................................1-8
1.8 Heterojunction Bipolar Junction Transistors....................1-8
1.9 Integrated Circuit Biasing Using Current Mirrors ...........1-9
Current Source Operating Voltage Range • Current Mirror
Analysis • Current Mirror with Reduced Error • The Wilson
Current Mirror
1.10 The Basic BJT Switch........................................................1-14
1.11 High-Speed BJT Switching...............................................1-16
Overall Transient Response
1.12 Simple Logic Gates............................................................1-19
1.13 Emitter-Coupled Logic .....................................................1-19
A Closer Look at the Differential Stage
1.1 Introduction
The bipolar junction transistor (or BJT) was the workhorse of the electronics industry from the 1950s
through the 1990s. This device was responsible for enabling the computer age as well as the modern era
of communications. Although early systems that demonstrated the feasibility of electronic computers
used the vacuum tube, the element was too unreliable for dependable, long-lasting computers. The
invention of the BJT in 19471 and the rapid improvement in this device led to the development of highly
reliable electronic computers and modern communication systems.
Integrated circuits, based on the BJT, became commercially available in the mid-1960s and further
improved the dependability of the computer and other electronic systems while reducing the size and
cost of the overall system. Ultimately, the microprocessor chip was developed in the early 1970s and the
age of small, capable, personal computers was ushered in. While the metal-oxide-semiconductor (or
MOS) device is now more prominent than the BJT in the personal computer arena, the BJT is still
important in larger high-speed computers. This device also continues to be important in communication
systems and power control systems.
David J. Comer
Donald T. Comer

1-2 Analog Circuits and Devices
Because of the continued improvement in BJT performance and the development of the heterojunction
BJT, this device remains very important in the electronics field, even as the MOS device becomes more
significant.
1.2 Physical Characteristics and Properties of the BJT
Although present BJT technology is used to make both discrete component devices as well as integrated
circuit chips, the basic construction techniques are similar in both cases, with primary differences arising
in size and packaging. The following description is provided for the BJT constructed as integrated circuit
devices on a silicon substrate. These devices are referred to as “junction-isolated” devices.
The cross-sectional view of a BJT is shown in Fig. 1.1.2
This device can occupy a surface area of less than 1000 mm2. There are three physical regions comprising
the BJT. These are the emitter, the base, and the collector. The thickness of the base region between
emitter and collector can be a small fraction of a micron, while the overall vertical dimension of a device
may be a few microns.
Thousands of such devices can be fabricated within a silicon wafer. They may be interconnected on
the wafer using metal deposition techniques to form a system such as a microprocessor chip or they may
be separated into thousands of individual BJTs, each mounted in its own case. The photolithographic
methods that make it possible to simultaneously construct thousands of BJTs have led to continually
decreasing size and cost of the BJT.
Electronic devices, such as the BJT, are governed by current–voltage relationships that are typically
nonlinear and rather complex. In general, it is difficult to analyze devices that obey nonlinear equations,
much less develop design methods for circuits that include these devices. The basic concept of modeling
an electronic device is to replace the device in the circuit with linear components that approximate the
voltage–current characteristics of the device. A model can then be defined as a collection of simple
components or elements used to represent a more complex electronic device. Once the device is replaced
in the circuit by the model, well-known circuit analysis methods can be applied.
There are generally several different models for a given device. One may be more accurate than others,
another may be simpler than others, another may model the dc voltage–current characteristics of the
device, while still another may model the ac characteristics of the device.
Models are developed to be used for manual analysis or to be used by a computer. In general, the
models for manual analysis are simpler and less accurate, while the computer models are more complex
and more accurate. Essentially, all models for manual analysis and most models for the computer include
only linear elements. Nonlinear elements are included in some computer models, but increase the
computation times involved in circuit simulation over the times in simulation of linear models.
1.3 Basic Operation of the BJT
In order to understand the origin of the elements used to model the BJT, we will discuss a simplified
FIGURE 1.1 An integrated npn BJT.
version of the device as shown in Fig. 1.2. The device shown is an npn device that consists of a p-doped

Bipolar Junction Transistor (BJT) Circuits 1-3
material interfacing on opposite sides to n-doped material. A pnp device can be created using an n-doped
central region with p-doped interfacing regions. Since the npn type of BJT is more popular in present
construction processes, the following discussion will center on this device.
The geometry of the device implied in Fig. 1.2 is physically more like the earlier alloy transistor. This
to both geometries. Normally, some sort of load would appear in either the collector or emitter circuit;
however, this is not important to the initial discussion of BJT operation.
The circuit of Fig. 1.2 is in the active region, that is, the emitter–base junction is forward-biased, while
the collector–base junction is reverse-biased. The current flow is controlled by the profile of electrons in
the p-type base region. It is proportional to the slope or gradient of the free electron density in the base
region. The well-known diffusion equation can be expressed as:3
(1.1)
where q is the electronic charge, Dn is the diffusion constant for electrons, A is the cross-sectional area
of the base region, W is the width or thickness of the base region, and n(0) is the density of electrons at
the left edge of the base region. The negative sign reflects the fact that conventional current flow is
opposite to the flow of the electrons.
The concentration of electrons at the left edge of the base region is given by:
(1.2)
where q is the charge on an electron, k is Boltzmann’s constant, T is the absolute temperature, and nbo
is the equilibrium concentration of electrons in the base region. While nbo is a small number, n(0) can
FIGURE 1.2 Distribution of electrons in the active region.
I qDnA
dn
dx
-----
-
qDnAn 0
( )
W
------------------------
-
–
= =
n 0
( ) nboe
qVBE kT
§
=
geometry is also capable of modeling the modern BJT (Fig. 1.1) as the theory applies almost equally well

be large for values of applied base to emitter voltages of 0.6 to 0.7 V. At room temperature, this equation
can be written as:
(1.3)
EB = –VBE.
A component of hole current also flows across the base–emitter junction from base to emitter. This
component is rendered negligible compared to the electron component by doping the emitter region
much more heavily than the base region.
As the concentration of electrons at the left edge of the base region increases, the gradient increases
and the current flow across the base region increases. The density of electrons at x = 0 can be controlled
by the voltage applied from emitter to base. Thus, this voltage controls the current flowing through the
base region. In fact, the density of electrons varies exponentially with the applied voltage from emitter
to base, resulting in an exponential variation of current with voltage.
The reservoir of electrons in the emitter region is unaffected by the applied emitter-to-base voltage as
this voltage drops across the emitter–base depletion region. This applied voltage lowers the junction
voltage as it opposes the built-in barrier voltage of the junction. This leads to the increase in electrons
flowing from emitter to base.
The electrons injected into the base region represent electrons that were originally in the emitter. As
these electrons leave the emitter, they are replaced by electrons from the voltage source, VEB. This current
is called emitter current and its value is determined by the voltage applied to the junction. Of course,
conventional current flows in the opposite direction to the electron flow.
The emitter electrons flow through the emitter, across the emitter–base depletion region, and into
the base region. These electrons continue across the base region, across the collector–base depletion
region, and through the collector. If no electrons were “lost” in the base region and if the hole flow
from base to emitter were negligible, the current flow through the emitter would equal that through
the collector. Unfortunately, there is some recombination of carriers in the base region. When electrons
are injected into the base region from the emitter, space charge neutrality is upset, pulling holes into
the base region from the base terminal. These holes restore space charge neutrality if they take on the
same density throughout the base as the electrons. Some of these holes recombine with the free
electrons in the base and the net flow of recombined holes into the base region leads to a small, but
finite, value of base current. The electrons that recombine in the base region reduce the total electron
flow to the collector. Because the base region is very narrow, only a small percentage of electrons
traversing the base region recombine and the emitter current is reduced by a small percentage as it
becomes collector current.
In a typical low-power BJT, the collector current might be 0.995IE. The current gain from emitter to
collector, IC /IE, is called a and is a function of the construction process for the BJT. Using Kirchhoff’s
current law, the base current is found to equal the emitter current minus the collector current. This gives:
(1.4)
If a = 0.995, then IB = 0.005IE. Base current is very small compared to emitter or collector current. A
parameter b is defined as the ratio of collector current to base current resulting in:
(1.5)
This parameter represents the current gain from base to collector and can be quite high. For the value
of a cited earlier, the value of b is 199.
n 0
( ) nboe
VBE 0.026
§
=
IB IE IC
– 1 a
–
( )IE
= =
b
a
1 a
–
------------
=
In Fig. 1.2, the voltage V

1.4 Use of the BJT as an Amplifier
Figure 1.3 shows a simple configuration of a BJT amplifier. This circuit is known as the common emitter
configuration.
A voltage source is not typically used to forward-bias the base–emitter junction in an actual circuit,
but we will assume that VBB is used for this purpose. A value of VBB or VBE near 0.6 to 0.7 V would be
appropriate for this situation. The collector supply would be a large voltage, such as 12 V. We will assume
that the value of VBB sets the dc emitter current to a value of 1 mA for this circuit. The collector current
entering the BJT will be slightly less than 1 mA, but we will ignore this difference and assume that IC =
1 mA also. With a 4-kW collector resistance, a 4-V drop will appear across RC , leading to a dc output
voltage of 8 V. The distribution of electrons across the base region for the steady-state or quiescent
conditions is shown by the solid line of Fig. 1.3(a).
If a small ac voltage now appears in series with VBB, the injected electron density at the left side
of the base region will be modulated. Since this density varies exponentially with the applied voltage
(see Eq. 1.2), a small ac voltage can cause considerable changes in density. The dashed lines in Fig.
1.3(a) show the distributions at the positive and negative peak voltages. The collector current may
change from its quiescent level of 1 mA to a maximum of 1.1 mA as ein reaches its positive peak, and
to a minimum of 0.9 mA when ein reaches its negative peak. The output collector voltage will drop
to a minimum value of 7.6 V as the collector current peaks at 1.1 mA, and will reach a maximum
voltage of 8.4 V as the collector current drops to 0.9 mA. The peak-to-peak ac output voltage is then
0.8 V. The peak-to-peak value of ein to cause this change might be 5 mV, giving a voltage gain of A
= –0.8/0.005 = –160. The negative sign occurs because when ein increases, the collector current
increases, but the collector voltage decreases. This represents a phase inversion in the amplifier of
Fig. 1.3.
In summary, a small change in base-to-emitter voltage causes a large change in emitter current. This
current is channeled across the collector, through the load resistance, and can develop a larger incremental
voltage across this resistance.
FIGURE 1.3 A BJT amplifier.

1.5 Representing the Major BJT Effects by an Electronic Model
The two major effects of the BJT in the active region are the diode characteristics of the base–emitter
junction and the collector current that is proportional to the emitter current. These effects can be modeled
by the circuit of Fig. 1.4.
The simple diode equation represents the relationship between applied emitter-to-base voltage and
emitter current. This equation can be written as
(1.6)
where q is the charge on an electron, k is Boltzmann’s constant, T is the absolute temperature of the
diode, and I1 is a constant at a given temperature that depends on the doping and geometry of the emitter-
base junction.
The collector current is generated by a dependent current source of value IC = aIE.
resistance, rd, is the dynamic resistance of the emitter-base diode and is given by:
(1.7)
where IE is the dc emitter current.
1.6 Other Physical Effects in the BJT
The preceding section pertains to the basic operation of the BJT in the dc and midband frequency range.
Several other effects must be included to model the BJT with more accuracy. These effects will now be
described.
Ohmic Effects
The metal connections to the semiconductor regions exhibit some ohmic resistance. The emitter contact
resistance and collector contact resistance is often in the ohm range and does not affect the BJT operation
in most applications. The base region is very narrow and offers little area for a metal contact. Furthermore,
because this region is narrow and only lightly doped compared to the emitter, the ohmic resistance of
the base region itself is rather high. The total resistance between the contact and the intrinsic base region
can be 100 to 200 W. This resistance can become significant in determining the behavior of the BJT,
especially at higher frequencies.
FIGURE 1.4 Large-signal model of the BJT.
IE I1 e
qVBE kT
§
1
–
( )
=
rd
kT
qIE
------
-
=
A small-signal model based on the large-signal model of Fig. 1.4 is shown in Fig. 1.5. In this case, the

Base-Width Modulation (Early Effect)
The widths of the depletion regions are functions of the applied voltages. The collector voltage generally
exhibits the largest voltage change and, as this voltage changes, so also does the collector–base depletion
region width. As the depletion layer extends further into the base region, the slope of the electron
distribution in the base region becomes greater since the width of the base region is decreased. A slightly
steeper slope leads to slightly more collector current. As reverse-bias decreases, the base width becomes
greater and the current decreases. This effect is called base-width modulation and can be expressed in
terms of the Early voltage,4 VA, by the expression:
(1.8)
The Early voltage will be constant for a given device and is typically in the range of 60 to 100 V.
Reactive Effects
Changing the voltages across the depletion regions results in a corresponding change in charge. This
leads to an effective capacitance since
(1.9)
This depletion region capacitance is a function of voltage applied to the junction and can be written as:4
(1.10)
where CJo is the junction capacitance at zero bias, f is the built-in junction barrier voltage, Vapp is the
applied junction voltage, and m is a constant. For modern BJTs, m is near 0.33. The applied junction
voltage has a positive sign for a forward-bias and a negative sign for a reverse-bias. The depletion region
capacitance is often called the junction capacitance.
An increase in forward base–emitter voltage results in a higher density of electrons injected into the
base region. The charge distribution in the base region changes with this voltage change, and this leads
to a capacitance called the diffusion capacitance. This capacitance is a function of the emitter current and
can be written as:
FIGURE 1.5 A small-signal model of the BJT.
IC bIB 1
VCE
VA
-------
-
+
Ë ¯
Ê ˆ
=
C
dQ
dV
------
-
=
Cdr
CJo
f Vapp
–
( )
m
--------------------------
=

(1.11)
where k2 is a constant for a given device.
1.7 More Accurate BJT Models
Figure 1.6 shows a large-signal BJT model used in some versions of the popular simulation program
known as SPICE.5 The equations for the parameters are listed in other texts5 and will not be given here.
5
tance, Cp, accounts for the diffusion capacitance and the emitter–base junction capacitance. The collec-
tor–base junction capacitance is designated Cm. The resistance, rp, is equal to (b + 1)rd. The transductance,
gm, is given by:
(1.12)
The impedance, ro, is related to the Early voltage by:
(1.13)
RB, RE, and RC are the base, emitter, and collector resistances, respectively. For hand analysis, the ohmic
resistances RE and RC are neglected along with CCS, the collector-to-substrate capacitance.
1.8 Heterojunction Bipolar Junction Transistors
In an npn device, all electrons injected from emitter to base are collected by the collector, except for a
small number that recombine in the base region. The holes injected from base to emitter contribute to
FIGURE 1.6 A more accurate large-signal model of the BJT.
CD k2IE
=
gm
a
rd
---
-
=
ro
VA
IC
-----
-
=
Figure 1.7 shows a small-signal SPICE model often called the hybrid-p equivalent circuit. The capaci-

emitter junction current, but do not contribute to collector current. This hole component of the emitter
current must be minimized to achieve a near-unity current gain from emitter to collector.As a approaches
unity, the current gain from base to collector, b, becomes larger.
In order to produce high-b BJTs, the emitter region must be doped much more heavily than the base
region, as explained earlier. While this approach allows the value of b to reach several hundred, it also
leads to some effects that limit the frequency of operation of the BJT. The lightly doped base region
causes higher values of base resistance, as well as emitter–base junction capacitance. Both of these effects
are minimized in the heterojunction BJT (or HBJT). This device uses a different material for the base
region than that used for the emitter and collector regions. One popular choice of materials is silicon
for the emitter and collector regions,and a silicon/germanium material for the base region.6 The difference
in energy gap between the silicon emitter material and the silicon/germanium base material results in
an asymmetric barrier to current flow across the junction. The barrier for electron injection from emitter
to base is smaller than the barrier for hole injection from base to emitter. The base can then be doped
more heavily than a conventional BJT to achieve lower base resistance, but the hole flow across the
junction remains negligible due to the higher barrier voltage. The emitter of the HBJT can be doped
more lightly to lower the junction capacitance. Large values of b are still possible in the HBJT while
minimizing frequency limitations. Current gain-bandwidth figures exceeding 60 GHz have been achieved
with present industrial HBJTs.
From the standpoint of analysis, the SPICE models for the HBJT are structurally identical to those of
the BJT. The difference is in the parameter values.
1.9 Integrated Circuit Biasing Using Current Mirrors
Differential stages are very important in integrated circuit amplifier design. These stages require a constant
dc current for proper bias. A simple bias scheme for differential BJT stages will now be discussed.
current bias for differential stages.
The concept of the current mirror was developed specifically for analog integrated circuit biasing and
is a good example of a circuit that takes advantage of the excellent matching characteristics that are
possible in integrated circuits. In the circuit of Fig. 1.8, the current I2 is intended to be equal to or“mirror”
the value of I1. Current mirrors can be designed to serve as sinks or sources.
[
FIGURE 1.7 The hybrid-p small-signal model for the BJT.
The diode-biased current sink or current mirror of Fig. 1.8 is a popular method of creating a constant-

The general function of the current mirror is to reproduce or mirror the input or reference current
to the output, while allowing the output voltage to assume any value within some specified range. The
current mirror can also be designed to generate an output current that equals the input current multiplied
by a scale factor K. The output current can be expressed as a function of input current as:
(1.14)
where K can be equal to, less than, or greater than unity. This constant can be established accurately by
relative device sizes and will not vary with temperature.
the input current. Several amplifier stages can be biased with this multiple output current mirror.
Current Source Operating Voltage Range
Figure 1.10 shows an ideal or theoretical current sink in (a) and a practical sink in (b). The voltage at
node A in the theoretical sink can be tied to any potential above or below ground without affecting the
value of I. On the other hand, the practical circuit of Fig. 1.10(b) requires that the transistor remain in
the active region to provide a current of:
(1.15)
This requires that the collector voltage exceed the voltage VB at all times. The upper limit on this voltage
is determined by the breakdown voltage of the transistor. The output voltage must then satisfy:
(1.16)
where BVCE is the breakdown voltage from collector to emitter of the transistor. This voltage range over
which the current source operates is called the output voltage compliance range or the output compliance.
FIGURE 1.8 Current mirror bias stage.
IO KIIN
=
I a
VB VBE
–
R
-------------------
-
=
VB VC VB BVCE
+
( )
< <
Figure 1.9 shows a multiple output current source where all of the output currents are referenced to

Current Mirror Analysis
The current mirror is again shown in Fig. 1.11. If devices Q1 and Q2 are assumed to be matched devices,
we can write:
(1.17)
FIGURE 1.9 Multiple output current mirror.
FIGURE 1.10 Current sink circuits: (a) ideal sink, (b) practical sink.
IE1 IE2 IEOe
VBE VT
§
= =

where VT = kT/q, IEO = AJEO, A is the emitter area of the two devices, and JEO is the current density of
the emitters. The base currents for each device will also be identical and can be expressed as:
(1.18)
Device Q1 operates in the active region, but near saturation by virtue of the collector–base connection.
This configuration is called a diode-connected transistor. Since the collector-to-emitter voltage is very
small, the collector current for device Q1 is given by Eq. 1.8, assuming VCE = 0. This gives:
(1.19)
The device Q2 does not have the constraint that VCE ª 0 as device Q1 has. The collector voltage for Q2
will be determined by the external circuit that connects to this collector. Thus, the collector current for
this device is:
(1.20)
where VA is the Early voltage. In effect, the output stage has an output impedance given by Eq. 1.13. The
current mirror more closely approximates a current source as the output impedance becomes larger.
If we limit the voltage VC2 to small values relative to the Early voltage, IC2 is approximately equal to
IC1. For integrated circuit designs, the voltage required at the output of the current mirror is generally
small, making this approximation valid.
The input current to the mirror is larger than the collector current and is:
(1.21)
Since IOUT = IC2 = IC1 = bIB, we can write Eq. 1.21 as:
(1.22)
FIGURE 1.11 Circuit for current mirror analysis.
IB1 IB2
IEO
b 1
+
-----------
-e
VBE VT
§
= =
IC1 bIB1
b
b 1
+
-----------
-IEOe
VBE VT
§
ª
=
IC2 bIB2 1
VC2
VA
-------
-
+
Ë ¯
Ê ˆ
=
IIN IC1 2IB
+
=
IIN bIB 2IB
+ b 2
+
( )IB
= =

Relating IIN to IOUT results in:
(1.23)
For typical values of b, these two currents are essentially equal. Thus, a desired bias current, IOUT , is
generated by creating the desired value of IIN. The current IIN is normally established by connecting a
resistance R1 to a voltage source VCC to set IIN to:
(1.24)
Control of collector/bias current for Q2 is then accomplished by choosing proper values of VCC and R1.
Figure 1.12 shows a multiple-output current mirror.
It can be shown that the output current for each identical device in Fig. 1.12 is:
(1.25)
where N is the number of output devices.
The current sinks can be turned into current sources by using pnp transistors and a power supply of
opposite polarity. The output devices can also be scaled in area to make IOUT larger or smaller than IIN.
Current Mirror with Reduced Error
The difference between output current in a multiple-output current mirror and the input current can
become quite large if N is large. One simple method of avoiding this problem is to use an emitter follower
The emitter follower, Q0, has a current gain from base to collector of b + 1, reducing the difference
between IO and IIN to:
(1.26)
FIGURE 1.12 Multiple-output current mirror.
IOUT
b
b 2
+
-----------
-IIN
IIN
1 2 b
§
+
------------------
-
= =
IIN
VCC VBE
–
R1
----------------------
-
=
IO
IIN
1
N 1
+
b
------------
-
+
----------------------
-
=
IIN IO
–
N 1
+
b 1
+
------------
-IB
=
to drive the bases of all devices in the mirror, as shown in Fig. 1.13.

The output current for each device is:
(1.27)
The Wilson Current Mirror
In the simple current mirrors discussed, it was assumed that the collector voltage of the output stage was
small compared to the Early voltage. When this is untrue, the output current will not remain constant,
but will increase as output voltage (VCE) increases. In other words, the output compliance range is limited
with these circuits due to the finite output impedance of the BJT.
A modification of the improved output current mirror of Fig. 1.13 was proposed by Wilson7 and is
The Wilson current mirror is connected such that VCB2 = 0 and VBE1 = VBE0. Both Q1 and Q2 now
operate with a near-zero collector–emitter bias although the collector of Q0 might feed into a high-voltage
point. It can be shown that the output impedance of the Wilson mirror is increased by a factor of b/2
over the simple mirror. This higher impedance translates into a higher output compliance. This circuit
also reduces the difference between input and output current by means of the emitter follower stage.
1.10 The Basic BJT Switch
In digital circuits, the BJT is used as a switch to generate one of only two possible output voltage levels,
depending on the input voltage level. Each voltage level is associated with one of the binary digits, 0 or
1. Typically, the high voltage level may fall between 2.8 V and 5 V while the low voltage level may fall
between 0 V and 0.8 V.
Logic circuits are based on BJT stages that are either in cutoff with both junctions reverse-biased or
in a conducting mode with the emitter–base junction forward-biased.When the BJT is“on”or conducting
emitter current, it can be in the active region or the saturation region. If it is in the saturation region,
the collector–base region is also forward-biased.
FIGURE 1.13 Improved multiple output current mirror.
IO
IIN
1
N 1
+
b b 1
+
( )
--------------------
-
+
------------------------------
=
The three possible regions of operation are summarized in Table 1.1.
illustrated in Fig. 1.14.
The BJT very closely approximates certain switch configurations. For example, when the switch of Fig.
1.15(a) is open, no current flows through the resistor and the output voltage is +12 V. Closing the switch

causes the output voltage to drop to zero volts and a current of 12/R flows through the resistance. When
The output voltage is +12 V, just as in the case of the open switch. If a large enough current is now driven
into the base to saturate the BJT, the output voltage becomes very small, ranging from 20 mV to 500
mV, depending on the BJT used. The saturated state corresponds closely to the closed switch. During
the time that the BJT switches from cutoff to saturation, the active region equivalent circuit applies. For
high-speed switching of this circuit, appropriate reactive effects must be considered. For low-speed
switching, these reactive effects can be neglected.
Saturation occurs in the basic switching circuit of Fig. 1.15(b) when the entire power supply voltage
drops across the load resistance. No voltage, or perhaps a few tenths of volts, then appears from collector
to emitter. This occurs when the base current exceeds the value
(1.28)
When a transistor switch is driven into saturation, the collector–base junction becomes forward-
The forward-bias of the collector–base junction leads to a non zero concentration of electrons in
the base that is unnecessary to support the gradient of carriers across this region. When the input
signal to the base switches to a lower level to either turn the device off or decrease the current
flow, the excess charge must be removed from the base region before the current can begin to
decrease.
FIGURE 1.14 Wilson current mirror.
TABLE 1.1 Regions of Operation
Region Cutoff Active Saturation
C–B bias Reverse Reverse Forward
E–B bias Reverse Forward Forward
IB sat
( )
VCC VCE sat
( )
–
bRL
------------------------------
-
=
the base voltage of the BJT of Fig. 1.15(b) is negative, the device is cut off and no collector current flows.
biased. This situation results in the electron distribution across the base region shown in Fig. 1.16.

1.11 High-Speed BJT Switching
There are three major effects that extend switching times in a BJT:
1. The depletion-region or junction capacitances are responsible for delay time when the BJT is in
the cutoff region.
2. The diffusion capacitance and the Miller-effect capacitance are responsible for the rise and fall
times of the BJT as it switches through the active region.
3. The storage time constant accounts for the time taken to remove the excess charge from the base
region before the BJT can switch from the saturation region to the active region.
FIGURE 1.15 The BJT as a switch: (a) open switch, (b) closed switch.
FIGURE 1.16 Electron distribution in the base region of a saturated BJT.

There are other second-order effects that are generally negligible compared to the previously listed
time lags.
Since the transistor is generally operating as a large-signal device, the parameters such as junction
capacitance or diffusion capacitance will vary as the BJT switches. One approach to the evaluation of
time constants is to calculate an average value of capacitance over the voltage swing that takes place.Not
only is this method used in hand calculations, but most computer simulation programs use average
values to speed calculations.
Overall Transient Response
Before discussing the individual BJT switching times, it is helpful to consider the response of a common-
emitter switch to a rectangular waveform. Figure 1.17 shows a typical circuit using an npn transistor.
circuits, the BJT must switch from its “off” state to saturation and later return to the “off” state. In this
case, the delay time, rise time, saturation storage time, and fall time must be considered in that order to
find the overall switching time.
The total waveform is made up of five sections: delay time, rise time, on time, storage time, and fall
time. The following list summarizes these points and serves as a guide for future reference:
td
¢ = Passive delay time; time interval between application of forward base drive and start of collector-
current response.
td = Total delay time; time interval between application of forward base drive and the point at which
IC has reached 10% of the final value.
tr = Rise time; 10- to 90-% rise time of IC waveform.
ts¢ = Saturation storage time; time interval between removal of forward base drive and start of IC decrease.
ts = Total storage time; time interval between removal of forward base drive and point at which IC =
0.9IC(sat).
tf = Fall time; 90- to 10-% fall time of IC waveform
Ton = Total turn-on time; time interval between application of base drive and point at which IC has
reached 90% of its final value.
FIGURE 1.17 A simple switching circuit.
A rectangular input pulse and the corresponding output are shown in Fig. 1.18. In many switching

Toff = Total turn-off time; time interval between removal of forward base drive and point at which IC
has dropped to 10% of its value during on time.
Not all applications will require evaluation of each of these switching times. For instance, if the base
drive is insufficient to saturate the transistor, ts will be zero. If the transistor never leaves the active region,
the delay time will also be zero.
The factors involved in calculating the switching times are summarized in the following paragraphs.8
The passive delay time is found from:
(1.29)
where td is the product of the charging resistance and the average value of the two junction capacitances.
The active region time constant is a function of the diffusion capacitance, the collector–base junction
capacitance, the transconductance, and the charging resistance. This time constant will be denoted by t.
If the transistor never enters saturation, the rise time is calculated from the well-known formula:
(1.30)
If the BJT is driven into saturation, the rise time is found from:8
(1.31)
FIGURE 1.18 Input and output waveforms.
t¢d td
Eon Eoff
+
Eon VBE on
( )
–
---------------------------
-
Ë ¯
Ê ˆ
ln
=
tr 2.2t
=
tr t
K 0.1
–
K 0.9
–
----------------
-
Ë ¯
Ê ˆ
ln
=

where K is the overdrive factor or the ratio of forward base current drive to the value needed for saturation.
The rise time for the case where K is large can be much smaller than the rise time for the nonsaturating
case (K < 1). Unfortunately, the saturation storage time increases for large values of K.
The saturation storage time is given by:
(1.32)
where ts is the storage time constant, IB1 is the forward base current before switching, and IB2 is the
current after switching and must be less than IB(sat). The saturation storage time can slow the overall
switching time significantly. The higher speed logic gates utilize circuits that avoid the saturation region
for the BJTs that make up the gate.
1.12 Simple Logic Gates
Although the resistor-transistor-logic (RTL) family has not been used since the late 1960s, it demonstrates
If all four inputs are at the lower voltage level (e.g., 0 V), there is no conducting path from output to
ground. No voltage will drop across RL, and the output voltage will equal VCC. If any or all of the inputs
move to the higher voltage level (e.g., 4 V), any BJT with base connected to the higher voltage level will
saturate, pulling the output voltage down to a few tenths of a volt. If positive logic is used, with the high
voltage level corresponding to binary “1” and the low voltage level to binary “0,” the gate performs the
NOR function. Other logic functions can easily be constructed in the RTL family.
Over the years, the performance of logic gates has been improved by different basic configurations.
RTL logic was improved by diode-transistor-logic (DTL). Then, transistor-transistor-logic (TTL) became
very prominent. This family is still popular in the small-scale integration (SSI) and medium-scale
integration (MSI) areas, but CMOS circuits have essentially replaced TTL in large-scale integration (LSI)
and very-large-scale integration (VLSI) applications.
One popular family that is still prominent in very high-speed computer work is the emitter-coupled
logic (ECL) family. While CMOS packs many more circuits into a given area than ECL, the frequency
performance of ECL leads to its popularity in supercomputer applications.
1.13 Emitter-Coupled Logic
Emitter-coupled logic (ECL) was developed in the mid-1960s and remains the fastest silicon logic circuit
available. Present ECL families offer propagation delays in the range of 0.2 ns.9 The two major disadvan-
tages of ECL are: (1) resistors which require a great deal of IC chip area, must be used in each gate, and.
(2) the power dissipation of an ECL gate is rather high. These two shortcomings limit the usage of ECL
in VLSI systems. Instead, this family has been used for years in larger supercomputers that can afford
space and power to achieve higher speeds.
The high speeds obtained with ECL are primarily based on two factors. No device in an ECL gate is
ever driven into the saturation region and, thus, saturation storage time is never involved as devices
switch from one state to another. The second factor is that required voltage swings are not large. Voltage
excursions necessary to change an input from the low logic level to the high logic level are minimal.
Although noise margins are lower than other logic families, switching times are reduced in this way.
while Y is the NOR output.
Often, the positive supply voltage is taken as 0 V and VEE as –5 V due to noise considerations. The
diodes and emitter follower Q5 establish a temperature-compensated base reference for Q4. When inputs
A, B, and C are less than the voltage VB, Q4 conducts while Q1, Q2, and Q3 are cut off. If any one of the
t¢s ts
IB1 IB2
–
IB sat
( ) IB2
–
-----------------------
-
Ë ¯
Ê ˆ
ln
=
the concept of a simple logic gate. Figure 1.19 shows a four-input RTL NOR gate.
Figure 1.20 shows an older ECL gate with two separate outputs. For positive logic, X is the OR output

inputs is switched to the 1 level, which exceeds VB, the transistor turns on and pulls the emitter of Q4
positive enough to cut this transistor off. Under this condition, output Y goes negative while X goes
positive. The relatively large resistor common to the emitters of Q1, Q2, Q3, and Q4 prevents these
FIGURE 1.19 A four-input RTL NOR gate.
FIGURE 1.20 An ECL logic gate.

transistors from saturating. In fact, with nominal logic levels of –1.9 V and –1.1 V, the current through
the emitter resistance is approximately equal before and after switching takes place. Thus, only the current
path changes as the circuit switches. This type of operation is sometimes called current mode switching.
Although the output stages are emitter followers, they conduct reasonable currents for both logic level
outputs and, therefore, minimize the asymmetrical output impedance problem.
In an actual ECL gate, the emitter follower load resistors are not fabricated on the chip. The newer
version of the gate replaces the emitter resistance of the differential stage with a current source, and
replaces the bias voltage circuit with a regulated voltage circuit.
A Closer Look at the Differential Stage
2
are biased by a current source, IT , called the tail current. The two input signals e1 and e2 make up a
differential input signal defined as:
(1.33)
This differential voltage can be expressed as the difference between the base–emitter junction voltages as:
(1.34)
The collector currents can be written in terms of the base–emitter voltages as:
(1.35)
(1.36)
where matched devices are assumed.
A differential output current can be defined as the difference of the collector currents, or
(1.37)
Since the tail current is IT = IC1 + IC2, taking the ratio of Id to IT gives:
(1.38)
Since VBE1 = ed + VBE2, we can substitute this value for VBE1 into Eq. 1.35 to write:
(1.39)
Substituting Eqs. 1.36 and 1.39 into Eq. 1.38 results in:
(1.40)
or
ed e1 e2
–
=
ed VBE1 VBE2
–
=
IC1 aIEOe
VBE1 VT
§
IEOe
VBE1 VT
§
ª
=
IC2 aIEOe
VBE2 VT
§
IEOe
VBE2 VT
§
ª
=
Id IC1 IC2
–
=
Id
IT
---
-
IC1 IC2
–
IC1 IC2
+
------------------
-
=
IC1 IEOe
ed VBE2
+
( ) VT
§
IEOe
ed VT
§
e
VBE2 VT
§
= =
Id
IT
---
-
e
ed VT
§
1
–
e
ed VT
§
1
+
--------------------
-
ed
2VT
--------
-
tanh
= =
Figure 1.21 shows a simple differential stage similar to the input stage of an ECL gate. Both transistors

(1.41)
This differential current is graphed in Fig. 1.22.
When ed is zero, the differential current is also zero, implying equal values of collector currents in the
two devices. As ed increases, so also does Id until ed exceeds 4VT , at which time Id has reached a constant
value of IT . From the definition of differential current, this means that IC1 equals IT while IC2 is zero. As
the differential input voltage goes negative, the differential current approaches –IT as the voltage reaches
–4VT . In this case, IC2 = IT while IC1 goes to zero.
The implication here is that the differential stage can move from a balanced condition with IC1 = IC2
to a condition of one device fully off and the other fully on with an input voltage change of around 100
mV or 4VT . This demonstrates that a total voltage change of about 200 mV at the input can cause an
ECL gate to change states. This small voltage change contributes to smaller switching times for ECL logic.
FIGURE 1.21 A simple differential stage similar to an ECL input stage.
FIGURE 1.22 Differential output current as a function of differential input voltage.
Id IT
ed
2VT
--------
-
tanh
=

The ability of a differential pair to convert a small change in differential base voltage to a large change
in collector voltage also makes it a useful building block for analog amplifiers. In fact, a differential pair
with a pnp transistor current mirror load, as illustrated in Fig. 1.23, is widely used as an input stage for
integrated circuit op-amps.
References
1. Brittain, J. E. (Ed.), Turning Points in American Electrical History, IEEE Press, New York, 1977, Sec.
II-D.
2. Comer, D. T., Introduction to Mixed Signal VLSI, Array Publishing, New York, 1994, Ch. 7.
3. Sedra, A. S. and Smith, K. C., Microelectronic Circuits, 4th ed., Oxford University Press, New York,
1998, Ch. 4.
4. Gray, P. R. and Meyer, R. G., Analysis and Design of Analog Integrated Circuits, 3rd ed., John Wiley
& Sons, Inc., New York, 1993, Ch. 1.
5. Vladimirescu, A., The Spice Book, John Wiley & Sons, Inc., New York, 1994, Ch. 3.
6. Streetman, B. G., Solid State Electronic Devices, 4th ed., Prentice-Hall, Englewood Cliffs, NJ, 1995,
Ch. 7.
7. Wilson, G. R.,“A monolithic junction FET - NPN operational amplifier,”IEEE J. Solid-State Circuits,
Vol. SC-3, pp. 341-348, Dec. 1968.
8. Comer, D. J., Modern Electronic Circuit Design, Addison-Wesley, Reading, MA, 1977, Ch. 8.
9. Motorola Technical Staff, High Performance ECL Data, Motorola, Inc., Phoenix, AZ, 1993, Ch. 3.
FIGURE 1.23 Differential input stage with current mirror load.

2-1
2
RF Passive IC
Components
2.1 Introduction ........................................................................2-1
2.2 Fractal Capacitors................................................................2-1
Lateral Flux Capacitors • Fractals • Fractal Capacitor
Structures
2.3 Spiral Inductors...................................................................2-8
Understanding Substrate Effects • Simple, Accurate
Expressions for Planar Spiral Inductances
2.4 On-Chip Transformers .....................................................2-14
Monolithic Transformer Realizations • Analytical
Transformer Models
2.1 Introduction
Passive energy storage elements are widely used in radio-frequency (RF) circuits. Although their imped-
ance behavior often can be mimicked by compact active circuitry, it remains true that passive elements
offer the largest dynamic range and the lowest power consumption. Hence, the highest performance will
always be obtained with passive inductors and capacitors. Unfortunately, standard integrated circuit
technology has not evolved with a focus on providing good passive elements. This chapter describes the
limited palette of options available, as well as means to make the most use out of what is available.
2.2 Fractal Capacitors
Of capacitors, the most commonly used are parallel-plate and MOS structures. Because of the thin gate
oxides now in use, capacitors made out of MOSFETs have the highest capacitance density of any standard
IC option, with a typical value of approximately 7 fF/mm2 for a gate oxide thickness of 5 nm. A drawback,
however, is that the capacitance is voltage dependent. The applied potential must be well in excess of a
threshold voltage in order to remain substantially constant. The relatively low breakdown voltage (on
the order of 0.5 V/nm of oxide) also imposes an unwelcome constraint on allowable signal amplitudes.
An additional drawback is the effective series resistance of such structures, due to the MOS channel
resistance. This resistance is particularly objectionable at radio frequencies, since the impedance of the
combination may be dominated by this resistive portion.
Capacitors that are free of bias restrictions (and that have much lower series resistance) may be formed
out of two (or more) layers of standard interconnect metal. Such parallel-plate capacitors are quite linear
and possess high breakdown voltage, but generally offer capacitance density two orders of magnitude
lower than the MOSFET structure. This inferior density is the consequence of a conscious and continuing
effort by technologists to keep low the capacitance between interconnect layers. Indeed, the vertical
spacing between such layers generally does not scale from generation to generation. As a result, the
Thomas H. Lee
Maria del MarHershenson
Sunderarajan S. Mohan
Hirad Samavati
C. Patrick Yue
Stanford University

disparity between MOSFET capacitance density and that of the parallel-plate structure continues to grow
as technology scales.
A secondary consequence of the low density is an objectionably high capacitance between the bottom
plate of the capacitor and the substrate. This bottom-plate capacitance is often a large fraction of the
main capacitance. Needless to say, this level of parasitic capacitance is highly undesirable.
In many circuits, capacitors can occupy considerable area, and an area-efficient capacitor is therefore
highly desirable. Recently, a high-density capacitor structure using lateral fringing and fractal geometries
has been introduced.1 It requires no additional processing steps, and so it can be built in standard digital
processes. The linearity of this structure is similar to that of the conventional parallel-plate capacitor.
Furthermore, the bottom-plate parasitic capacitance of the structure is small, which makes it appealing
for many circuit applications. In addition, unlike conventional metal-to-metal capacitors, the density of
a fractal capacitor increases with scaling.
Lateral Flux Capacitors
Figure 2.1(a) shows a lateral flux capacitor. In this capacitor, the two terminals of the device are built
using a single layer of metal, unlike a vertical flux capacitor, where two different metal layers must be
used. As process technologies continue to scale, lateral fringing becomes more important. The lateral
spacing of the metal layers, s, shrinks with scaling, yet the thickness of the metal layers, t, and the vertical
spacing of the metal layers, tox, stay relatively constant. This means that structures utilizing lateral flux
enjoy a significant improvement with process scaling, unlike conventional structures that depend on
vertical flux. Figure 2.1(b) shows a scaled lateral flux capacitor. It is obvious that the capacitance of the
structure of Fig. 2.1(b) is larger than that of Fig. 2.1(a).
standard parallel-plate capacitor. In Fig. 2.2(b), the plates are broken into cross-connected sections.2 As
can be seen, a higher capacitance density can be achieved by using lateral flux as well as vertical flux. To
emphasize that the metal layers are cross connected, the two terminals of the capacitors in Fig. 2.2(b)
are identified with two different shadings. The idea can be extended to multiple metal layers as well.
various technologies.3–5 The trend suggests that lateral flux will have a crucial role in the design of
capacitors in future technologies.
FIGURE 2.1 Effect of scaling on lateral flux capacitors: (a) before scaling and (b) after scaling.
Lateral flux can be used to increase the total capacitance obtained in a given area. Figure 2.2(a) is a
Figure 2.3 shows the ratio of metal thickness to minimum lateral spacing, t/s, vs. channel length for

RF Passive IC Components 2-3
The increase in capacitance due to fringing is proportional to the periphery of the structure; therefore,
structures with large periphery per unit area are desirable. Methods for increasing this periphery are the
subject of the following sections.
Fractals
A fractal is a mathematical abstract.6 Some fractals are visualizations of mathematical formulas, while others
are the result of the repeated application of an algorithm, or a rule, to a seed. Many natural phenomena can
be described by fractals. Examples include the shapes of mountain ranges, clouds, coastlines, etc.
Some ideal fractals have finite area but infinite perimeter. The concept can be better understood with
the help of an example. Koch islands are a family of fractals first introduced as a crude model for the
shape of a coastline. The construction of a Koch curve begins with an initiator, as shown in the example
each segment of the initiator with a curve called a generator, an example of which is shown in Fig. 2.4(b)
that has segments. The size of each segment of the generator is of the initiator. By
recursively replacing each segment of the resulting curve with the generator, a fractal border is formed.
The first step of this process is depicted in Fig.2.4(c).The total area occupied remains constant throughout
the succession of stages because of the particular shape of the generator. A more complicated Koch island
segments. It can be noted that the curve is self similar, that is, each section of it looks like the entire
fractal. As we zoom in on Fig. 2.5, more detail becomes visible, and this is the essence of a fractal.
FIGURE 2.2 Vertical flux vs.lateral flux: (a) standard parallel-plate structure,and (b) cross-connected metal layers.
FIGURE 2.3 Ratio of metal thickness to horizontal metal spacing vs. technology (channel length).
Trend
Data points
N 8
= r 1 4
§
=
= 4 sides. The construction continues by replacing
of Fig. 2.4(a). A square is a simple initiator with M
can be seen in Fig. 2.5. The associated initiator of this fractal has four sides and its generator has 32

Fractal dimension, D, is a mathematical concept that is a measure of the complexity of a fractal. The
dimension of a flat curve is a number between 1 and 2, which is given by
(2.1)
where N is the number of segments of the generator and r is the ratio of the generator segment size to
the initiator segment size. The dimension of a fractal curve is not restricted to integer values, hence the
term “fractal.” In particular, it exceeds 1, which is the intuitive dimension of curves. A curve that has a
high degree of complexity, or D, fills out a two-dimensional flat surface more efficiently. The fractal in
Fig. 2.4(c) has a dimension of 1.5, whereas for the border line of Fig.2.5, .
For the general case where the initiator has M sides, the periphery of the initiator is proportional to
the square root of the area:
(2.2)
where k is a proportionality constant that depends on the geometry of the initiator. For example, for a
square initiator, k = 4; and for an equilateral triangle, . After n successive applications of
the generation rule, the total periphery is
FIGURE 2.4 Construction of a Koch curve: (a) an initiator, (b) a generator, and (c) first step of the process.
FIGURE 2.5 A Koch island with M = 4, N = 32, and r = 1/8.
D
N
( )
log
1
r
--
-
Ë ¯
Ê ˆ
log
----------------
-
=
D 1.667
=
P0 k A
◊
=
k 2 27
4
◊
=

(2.3)
and the minimum feature size (the resolution) is
(2.4)
Eliminating n from Eqs. 2.3 and 2.4 and combining the result with Eq. 2.1, we have
(2.5)
Equation 2.5 demonstrates the dependence of the periphery on parameters such as the area and the
resolution of the fractal border. It can be seen from Eq. 2.5 that as l tends toward zero, the periphery
goes to infinity; therefore, it is possible to generate fractal structures with very large perimeters in any
given area. However, the total periphery of a fractal curve is limited by the attainable resolution in practical
realizations.
Fractal Capacitor Structures
The final shape of a fractal can be tailored to almost any form. The flexibility arises from the fact that a
wide variety of geometries can be used as the initiator and generator. It is also possible to use different
generators during each step. This is an advantage for integrated circuits where flexibility in the shape of
the layout is desired.
Figure 2.6 is a three-dimensional representation of a fractal capacitor. This capacitor uses only one
metal layer with a fractal border. For a better visualization of the overall picture, the terminals of this
square-shaped capacitor have been identified using two different shadings. As was discussed before,
multiple cross-connected metal layers may be used to improve capacitance density further.
One advantage of using lateral flux capacitors in general, and fractal capacitors in particular, is the
reduction of the bottom-plate capacitance. This reduction is due to two reasons. First, the higher density
of the fractal capacitor (compared to a standard parallel-plate structure) results in a smaller area. Second,
some of the field lines originating from one of the bottom plates terminate on the adjacent plate, instead
FIGURE 2.6 3-D representation of a fractal capacitor using a single metal layer.
P k A Nr
( )
n
◊
=
l
k A
M
----------
- r
n
◊
=
P
k
D
M
D 1
–
------------
-
A
( )
l
D 1
–
------------
D
◊
=
of the substrate, which further reduces the bottom-plate capacitance as shown in Fig. 2.7. Because of this

property, some portion of the parasitic bottom-plate capacitor is converted into the more useful plate-
to-plate capacitance.
The capacitance per unit area of a fractal structure depends on the dimension of the fractal. To improve
the density of the layout, fractals with large dimensions should be used. The concept of fractal dimension
is demonstrated in Fig. 2.8. The structure in Fig. 2.8(a) has a lower dimension compared to the one in
Fig. 2.8(b), so the density (capacitance per unit area) of the latter is higher.
To demonstrate the dependence of capacitance density on dimension and lateral spacing of the metal
layers, a first-order electromagnetic simulation was performed on two families of fractal structures. In
as the ratio of the total capacitance of the fractal structure to the capacitance of a standard parallel-plate
structure with the same area. The solid line corresponds to a family of fractals with a moderate fractal
FIGURE 2.7 Reduction of the bottom-plate parasitic capacitance.
FIGURE 2.8 Fractal dimension of (a) is smaller than (b).
Fig. 2.9, the boost factor is plotted vs. horizontal spacing of the metal layers. The boost factor is defined

dimension of 1.63, while the dashed line represents another family of fractals with , which is
a relatively large value for the dimension. In this first-order simulation, it is assumed that the vertical
spacing and the thickness of the metal layers are kept constant at a 0.8-mm level. As can be seen in Fig.
2.9, the amount of boost is a strong function of the fractal dimension as well as scaling.
In addition to the capacitance density, the quality factor, Q, is important in RF applications. Here, the
degradation in quality factor is minimal because the fractal structure automatically limits the length of
the thin metal sections to a few microns, keeping the series resistance reasonably small. For applications
that require low series resistance, lower dimension fractals may be used. Fractals thus add one more
degree of freedom to the design of capacitors, allowing the capacitance density to be traded for a lower
series resistance.
In current IC technologies, there is usually tighter control over the lateral spacing of metal layers
compared to the vertical thickness of the oxide layers, from wafer to wafer and across the same wafer.
Lateral flux capacitors shift the burden of matching away from oxide thickness to lithography. Therefore,
by using lateral flux, matching characteristics can improve. Furthermore, the pseudo-random nature of
the structure can also compensate, to some extent, the effects of non-uniformity of the etching process.
To achieve accurate ratio matching, multiple copies of a unit cell should be used, as is standard practice
in high-precision analog circuit design.
Another simple way of increasing capacitance density is to use an interdigitated capacitor depicted in
2,7 One disadvantage of such a structure compared to fractals is its inherent parasitic inductance.
Most of the fractal geometries randomize the direction of the current flow and thus reduce the effective
series inductance; whereas for interdigitated capacitors, the current flow is in the same direction for all
the parallel stubs. In addition, fractals usually have lots of rough edges that accumulate electrostatic
energy more efficiently compared to interdigitated capacitors, causing a boost in capacitance (generally
of the order of 15%). Furthermore, interdigitated structures are more vulnerable to non-uniformity of
the etching process. However, the relative simplicity of the interdigitated capacitor does make it useful
in some applications.
vertical lines are in metal-2 and horizontal lines are in metal-1. The two terminals of the capacitor
are identified using different shades. Compared to an interdigitated capacitor, a woven structure has
much less inherent series inductance. The current flowing in different directions results in a higher
self-resonant frequency. In addition, the series resistance contributed by vias is smaller than that of
an interdigitated capacitor, because cross-connecting the metal layers can be done with greater ease.
However, the capacitance density of a woven structure is smaller compared to an interdigitated
capacitor with the same metal pitch, because the capacitance contributed by the vertical fields is
smaller.
FIGURE 2.9 Boost factor vs. lateral spacing.
D 1.80
=
Fig. 2.10.
The woven structure shown in Fig. 2.11 may also be used to achieve high capacitance density. The

2.3 Spiral Inductors
More than is so with capacitors, on-chip inductor options are particularly limited and unsatisfactory.
Nevertheless, it is possible to build practical spiral inductors with values up to perhaps 20 nH and with
Q values of approximately 10. For silicon-based RF ICs, Q degrades at high frequencies due to energy
dissipation in the semiconducting substrate.8 Additionally, noise coupling via the substrate at GHz
frequencies has been reported.9 As inductors occupy substantial chip area, they can potentially be the
source and receptor of detrimental noise coupling. Furthermore, the physical phenomena underlying the
substrate effects are complicated to characterize. Therefore, decoupling the inductor from the substrate
can enhance the overall performance by increasing Q, improving isolation, and simplifying modeling.
Some approaches have been proposed to address the substrate issues; however, they are accompanied
by drawbacks. Some10 have suggested the use of high-resistivity (150 to 200 W-cm) silicon substrates to
mimic the low-loss semi-insulating GaAs substrate, but this is rarely a practical option. Another approach
selectively removes the substrate by etching a pit under the inductor.11 However, the etch adds extra
processing cost and is not readily available. Moreover, it raises reliability concerns such as packaging yield
and long-term mechanical stability. For low-cost integration of inductors, the solution to substrate
problems should avoid increasing process complexity.
In this section, we present the patterned ground shield (PGS),23 which is compatible with standard
silicon technologies, and which reduces the unwanted substrate effects. The great improvement pro-
vided by the PGS reduces the disparity in quality between spiral inductors made in silicon and GaAs IC
technologies.
Understanding Substrate Effects
To understand why the PGS should be effective, consider first the physical model of an ordinary inductor
8
FIGURE 2.10 An interdigitated capacitor.
FIGURE 2.11 A woven structure.
on silicon, with one port and the substrate grounded, as shown in Fig. 2.12. An on-chip inductor is

physically a three-port element including the substrate. The one-port connection shown in Fig. 2.12
avoids unnecessary complexity in the following discussion and at the same time preserves the inductor
characteristics. In the model, the series branch consists of Ls, Rs, and Cs. Ls represents the spiral inductance,
which can be computed using the Greenhouse method12 or well-approximated by simple analytical
formulas to be presented later. Rs is the metal series resistance whose behavior at RF is governed by the
eddy current effect. This resistance accounts for the energy loss due to the skin effect in the spiral
interconnect structure as well as the induced eddy current in any conductive media close to the inductor.
The series feedforward capacitance, Cs, accounts for the capacitance due to the overlaps between the
spiral and the center-tap underpass.13 The effect of the inter-turn fringing capacitance is usually small
because the adjacent turns are almost at equal potentials, and therefore it is neglected in this model. The
overlap capacitance is more significant because of the relatively large potential difference between the
spiral and the center-tap underpass. The parasitics in the shunt branch are modeled by Cox, CSi, and RSi.
Cox represents the oxide capacitance between the spiral and the substrate. The silicon substrate capacitance
and resistance are modeled by CSi and RSi, respectively.14,15 The element RSi accounts for the energy
dissipation in the silicon substrate.
Expressions for the model element values are as follows:
(2.6)
(2.7)
(2.8)
(2.9)
(2.10)
where r is the DC resistivity of the spiral; t is the overall length of the spiral windings; w is the line width;
d is the skin depth; n is the number of crossovers between the spiral and center-tap (and thus n = N – 1,
where N is the number of turns); toxM1–M2 is the oxide thickness between the spiral and substrate; Csub is
FIGURE 2.12 Lumped physical model of a spiral inductor on silicon.
Rs
rl
dw 1 e
t
d
--
–
–
Ë ¯
Ê ˆ
---------------------------
-
=
Cs nw
2 eox
toxM1 M2
–
-------------------
◊
=
Cox
eox
2tox
-------- l w
◊ ◊
=
CSi
1
2
--
- l w Csub
◊ ◊ ◊
=
RSi
2
l w Gsub
◊ ◊
-----------------------
-
=

the substrate capacitance per unit area; and Gsub is the substrate conductance per unit area. In general,
one treats Csub and Gsub as fitting parameters.
Exploration with the model reveals that the substrate loss stems primarily from the penetration of the
electric field into the lossy silicon substrate. As the potential drop in the semiconductor (i.e., across RSi
can be seen that increasing Rp to infinity reduces the substrate loss. It can be shown that Rp approaches
infinity as RSi goes either to zero or infinity. This observation implies that Q can be improved by making
the silicon substrate either a perfect insulator or a perfect conductor. Using high-resistivity silicon (or
etching it away) is equivalent to making the substrate an open circuit. In the absence of the freedom to
do so, the next best option is to convert the substrate into a better conductor. The approach is to insert
a ground plane to block the inductor electric field from entering the silicon. In effect, this ground plane
becomes a pseudo-substrate with the desired characteristics.
The ground shield cannot be a solid conductor, however, because image currents would be induced
in it. These image currents tend to cancel the magnetic field of the inductor proper, decreasing the
inductance. To solve this problem, the ground shield is patterned with slots orthogonal to the spiral as
illustrated in Fig. 2.13. The slots act as an open circuit to cut off the path of the induced loop current.
The slots should be sufficiently narrow such that the vertical electric field cannot leak through the
patterned ground shield into the underlying silicon substrate. With the slots etched away, the ground
strips serve as the termination for the electric field. The ground strips are merged together around the
four outer edges of the spiral. The separation between the merged area and the edges is not critical.
However, it is crucial that the merged area not form a closed ring around the spiral since it can potentially
support unwanted loop current. The shield should be strapped with the top layer metal to provide a low-
impedance path to ground. The general rule is to prevent negative mutual coupling while minimizing
the impedance to ground.
The shield resistance is another critical design parameter. The purpose of the patterned ground shield
is to provide a good short to ground for the electric field. Since the finite shield resistance contributes
to energy loss of the inductor, it must be kept small. Specifically, by keeping the shield resistance small
compared to the reactance of the oxide capacitance, the voltage drop that can develop across the shield
resistance is very small. As a result, the energy loss due to the shield resistance is insignificant compared
FIGURE 2.13 A close-up photo of the patterned ground shield.
in Fig. 2.12) increases with frequency, the energy dissipation in the substrate becomes more severe. It

to other losses. A typical on-chip spiral inductor has parasitic oxide capacitance between 0.25 and 1 pF,
depending on the size and the oxide thickness. The corresponding reactance due to the oxide capacitance
at 1 to 2 GHz is of the order of 100 W, and hence a shield resistance of a few ohms is sufficiently small
not to cause any noticeable loss.
With the PGS, one can expect typical improvements in Q ranging from 10 to 33%, in the frequency
range of 1 to 2 GHz. Note that the inclusion of the ground shields increases Cp , which causes a fast roll-
off in Q above the peak-Q frequency and a reduction in the self-resonant frequency. This modest
improvement in inductor Q is certainly welcome, but is hardly spectacular by itself. However, a more
dramatic improvement is evident when evaluating inductor-capacitor resonant circuits. Such LC tank
circuits can absorb the parasitic capacitance of the ground shield. Since the energy stored in such parasitic
elements is now part of the circuit, the overall circuit Q is greatly increased. Improvements of factors of
approximately two are not unusual, so that tank circuits realized with PGS inductors possess roughly the
same Q as those built in GaAs technologies.
As stated earlier, substrate noise coupling can be an issue of great concern owing to the relatively large
size of typical inductors. Shielding by the PGS improves isolation by 25 dB or more at GHz frequencies.
It should be noted that, as with any other isolation structure (such as a guard ring), the efficacy of the
PGS is highly dependent on the integrity of the ground connection. One must often make a tradeoff
between the desired isolation level and the chip area that is required to provide a low-impedance ground
connection.
Simple, Accurate Expressions for Planar Spiral Inductances
In the previous section, a physically based model for planar spiral inductors was offered, and reference
was made to the Greenhouse method as a means for computing the inductance value. This method uses
as computational atoms the self- and mutual inductances of parallel current strips. It is relatively straight-
forward to apply, and yields accurate results. Nevertheless, simpler analytic formulas are generally pre-
ferred for design since important insights are usually more readily obtained.
As a specific example, square spirals are popular mainly because of their ease of layout. Other polygonal
spirals have also been used to improve performance by more closely approximating a circular spiral.
However, a quantitative evaluation of possible improvements is cumbersome without analytical formulas
for inductance.
inductor is completely specified by the number of turns n, the turn width w, the turn spacing s, and any
one of the following: the outer diameter dout, the inner diameter din, the average diameter davg = 0.5(dout
+ din), or the fill ratio, defined as r = (dout – din)/(dout + din). The thickness of the inductor has only a
very small effect on inductance and will therefore be ignored here.
We now present three approximate expressions for the inductance of square, hexagonal, and octagonal
planar inductors. The first approximation is based on a modification of an expression developed by
Wheeler16; the second is derived from electromagnetic principles by approximating the sides of the spirals
as current sheets; and the third is a monomial expression derived from fitting to a large database of
inductors (whose exact inductance values are obtained from a 3-D electromagnetic field solver). All three
expressions are accurate, with typical errors of 2 to 3%, and very simple, and are therefore excellent
candidates for use in design and optimization.
Modified Wheeler Formula
Wheeler16 presented several formulas for planar spiral inductors, which were intended for discrete induc-
tors. A simple modification of the original Wheeler formula allows us to obtain an expression that is
valid for planar spiral integrated inductors:
Among alternative shapes, hexagonal and octagonal inductors are used widely. Figures 2.14 through
2.16 show the layout for square, hexagonal, and octagonal inductors, respectively. For a given shape, an

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The Project Gutenberg eBook of
A Boy's Trip Across the Plains

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Title: A Boy's Trip Across the Plains
Author: Laura Preston
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*** START OF THE PROJECT GUTENBERG EBOOK A BOY'S TRIP
ACROSS THE PLAINS ***

A BOY'S TRIP
ACROSS THE PLAINS.

By LAURA PRESTON,
AUTHOR OF "YOUTH'S HISTORY OF CALIFORNIA."
NEW YORK:
A. ROMAN & COMPANY, PUBLISHERS.
SAN FRANCISCO:
417 and 419 Montgomery Street.
1868.
Entered according to Act of Congress in the year 1868,
By A. ROMAN & COMPANY,
In the Clerk's Office of the District Court of the United States
For the Southern District of New York.
TO
LOUIS AND MARY,
THE ELDEST
OF A BEVY OF NEPHEWS AND NIECES,
THIS LITTLE WORK

IS AFFECTIONATELY DEDICATED,
WITH THE HOPE
THAT AS IT HAS ALREADY RECEIVED THEIR FAVORABLE
CRITICISM,
IT MAY MEET THAT OF ALL YOUTHFUL LOVERS
OF ADVENTURE.
San Francisco, June, 1868.

CONTENTS
PAGE
CHAPTER I. 5
CHAPTER II. 24
CHAPTER III. 42
CHAPTER IV. 52
CHAPTER V. 63
CHAPTER VI. 71
CHAPTER VII. 87
CHAPTER VIII. 113
CHAPTER IX. 131
CHAPTER X. 150
CHAPTER XI. 167
CHAPTER XII. 177
CHAPTER XIV. 187
CHAPTER XV. 202
CHAPTER XVI. 210
CHAPTER XVII. 222
A BOY'S TRIP
ACROSS THE PLAINS.
BY LAURA PRESTON.

CHAPTER I.
In the village of W——, in western Missouri, lived Mrs. Loring and
her son Guy, a little boy about ten years old. They were very poor,
for though Mr. Loring, during his life time was considered rich, and
his wife and child had always lived comfortably, after his death,
which occurred when Guy was about eight years old, they found that
there were so many people to whom Mr. Loring owed money, that
when the debts were paid there was but little left for the widow and
her only child. That would not have been so bad had they had
friends able or willing to assist them, but Mrs. Loring found that
most of her friends had gone with her wealth, which, I am sorry to
say, is apt to be the case the world over.
As I have said, when Mrs. Loring became a widow she was both
poor and friendless, she was also very delicate. She had never
worked in her life, and although she attempted to do so, in order to
support herself and little Guy, she found it almost impossible to earn
enough to supply them with food. She opened a little school, but
could get only a few scholars, and they paid her so little that she
was obliged also to take in sewing. This displeased the parents of
her pupils and they took away their children, saying "she could not
do two things at once."
This happened early in winter when they needed money far more
than at any other season. But though Mrs. Loring sewed a great deal
during that long, dreary winter, she was paid so little that both
young Guy and herself often felt the pangs of cold and hunger.
Perhaps they need not have done so, if Mrs. Loring had told the
village people plainly that she was suffering, for I am sure they
would have given her food. But she was far too proud to beg or to
allow her son to do so. She had no objection that he should work,
for toil is honorable—but in the winter there was little a boy of ten

could do, and although Guy was very industrious it was not often he
could obtain employment. So they every day grew poorer, for
although they had no money their clothing and scanty furniture did
not know it, and wore out much quicker than that of rich people
seems to do.
Yet through all the trials of the long winter Mrs. Loring did not
despair; she had faith to believe that God was bringing her sorrows
upon her for the best, and would remove them in his own good
time. This, she would often say to Guy when she saw him look sad,
and he would glance up brightly with the reply, "I am sure it is for
the best, mother. You have always been so good I am sure God will
not let you suffer long. I think we shall do very well when the Spring
comes. We shall not need a fire then, or suffer for the want of warm
clothing and I shall be able to go out in the fields to work, and shall
earn so much money that you will not have to sew so much, and get
that horrid pain in your chest."
But when the Spring came Guy did not find it so easy to get work as
he had fancied it would be, for there were a great many strong,
rough boys that would do twice as much work in the day as one who
had never been used to work, and the farmers would employ them,
of course. So poor Guy grew almost disheartened, and his mother
with privation and anxiety, fell very sick.
Although afraid she would die she would not allow Guy to call any of
the village people in, for she felt that they had treated her very
unkindly and could not bear that they should see how very poor she
was. She however told Guy he could go for a doctor, and he did so,
calling in one that he had heard often visited the poor and charged
them nothing.
This good man whose name was Langley, went to Mrs. Loring's, and
soon saw both how indigent and how ill the poor woman was. He
was very kind and gave her medicines and such food as she could
take, although it hurt her pride most bitterly to accept them. He also
gave Guy, some work to do, and he was beginning to hope that his

mother was getting well, and that better days were coming, when
going home one evening from his work he found his mother crying
most bitterly. He was in great distress at this, and begged her to tell
him what had happened. At first she refused to do so, but at last
said:—
"Perhaps, Guy, it is best for me to tell you all, for if trouble must
come, it is best to be prepared for it. Sit here on the bed beside me,
and I will try to tell you:"
She then told him that Doctor Langley had been there that
afternoon, and had told her very gently, but firmly, that she was in a
consumption and would die. "Unless," she added, "I could leave this
part of the country. With an entire change of food and air, he told
me that I might live many years. But you know, my dear boy, it is
impossible for me to have that, so I must make up my mind to die.
That would not be so hard to do if it were not for leaving you alone
in this uncharitable world."
Poor Mrs. Loring who had been vainly striving to suppress her
emotions, burst into tears, and Guy who was dreadfully shocked and
alarmed, cried with her. It seemed so dreadful to him that his
mother should die when a change of air and freedom from anxiety
might save her. He thought of it very sadly for many days, but could
see no way of saving his mother. He watched her very closely, and
although she seemed to gain a little strength as the days grew
warmer, and even sat up, and tried to sew, he was not deceived into
thinking she would get well, for the doctor had told him she never
would, though for the summer she might appear quite strong.
He was walking slowly and sadly through the street one day,
thinking of this, when he heard two gentlemen who were walking
before him, speak of California.
"Is it true," said one, "that Harwood is going there?"
"Yes," said the other, "he thinks he can better his condition by doing
so."

"Do you know what steamer he will leave on?" asked the first
speaker.
"He is not going by steamer," replied the second, "as Aggie is quite
delicate, he has decided to go across the plains."
"Ah! indeed. When do they start?"
"As soon as possible. Mrs. Harwood told me to-day, that the chief
thing they were waiting for, was a servant. Aggie needs so much of
her care that she must have a nurse for the baby, and she says it
seems impossible to induce a suitable person to go. Of course she
doesn't want a coarse, uneducated servant, but some one she can
trust, and who will also be a companion for herself during the long
journey."
The gentlemen passed on, and Guy heard no more, but he stood
quite still in the street, and with a throbbing heart, thought, "Oh! if
my mother could go across the plains, it would cure her. Oh! if Mrs.
Harwood would but take her as a nurse. I know she is weak, but she
could take care of a little baby on the plains much better than she
can bend over that hard sewing here, and besides I could help her.
Oh! if Mrs. Harwood would only take her. I'll find out where she
lives, and ask her to do so."
He had gained the desired information and was on his way to Mrs.
Harwood's house before he remembered that his mother might not
consent to go if Mrs. Harwood was willing to take her. He knew she
was very proud, and had been a rich lady herself once, and would
probably shrink in horror from becoming a servant. His own pride for
a moment revolted against it, but his good sense came to his aid,
and told him it was better to be a servant than die. He went on a
little farther, and then questioned himself whether it would not be
better to go first and tell his mother about it, and ask her consent to
speak to Mrs. Harwood. But it was a long way back, and as he
greatly feared his mother would not allow him to come, and would
probably be much hurt at his suggesting such a thing, he

determined to act for once without her knowledge, and without
further reflection walked boldly up to Mrs. Harwood's door. It was
open, and when he knocked some one called to him to come in.
He did so, although for a moment he felt inclined to run away. There
was a lady in the room, and four children—two large boys, a delicate
looking girl about five years old, and a baby boy who was sitting on
the floor playing with a kitten, but who stopped and stared at Guy as
he entered.
The other children did the same, and Guy was beginning to feel very
timid and uncomfortable, when the lady asked who he wished to
see.
He told her Mrs. Harwood, and the eldest boy said, "That's ma's
name, isn't it, ma? What do you want of ma? say!"
Guy said nothing to the rude boy, but told Mrs. Harwood what he
had heard on the street.
"It is true," she said kindly, "I do want a nurse. Has some one sent
you here to apply for the place?"
"No, ma'am," he replied, "no one sent me, but—but—I came—of
myself—because—I thought—my—mother—might—perhaps suit
you."
"Why, that is a strange thing for a little boy to do!" exclaimed Mrs.
Harwood.
"Hullo, Gus," cried the boy that had before spoken, "here's a friend
of mine; guess he's the original Young America, 'stead of me!"
"George, be silent," said his mother, very sternly. "Now, child," she
continued, turning again to Guy, "you may tell me how you ever
thought of doing so strange a thing as applying for a place for your
mother, unless she told you to do so. Is she unkind to you? Do you
want her to leave you?"

"Oh, no, she is very, very kind," said Guy, earnestly, "and I wouldn't
be parted from her for the world." He then forgot all his fears, and
eagerly told the lady how sick his mother had been, and how sure
he was that the trip across the plains would cure her, and, above all,
told how good and kind she was; "she nursed me," he concluded,
very earnestly, "and you see what a big boy I am!"
Mrs. Harwood smiled so kindly that he was almost certain she would
take his mother; but his heart fell, when she said: "I am very sorry
that your mother is sick, but I don't think I can take her with me;
and besides, Mr. Harwood would not like to have another boy to take
care of."
"But I will take care of myself," cried Guy, "and help a great deal
about the wagons. Oh, ma'am, if you would only take me, I would
light the fires when you stopped to camp, and get water, and do a
great many things, and my mother would do a great deal too."
Mrs. Harwood shook her head, and poor Guy felt so downcast that
he was greatly inclined to cry. The boys laughed, but the little girl
looked very sorry, and said to him:
"Don't look so sad; perhaps mamma will yet take your mother, and I
will take you. I want you to go. You look good and kind, and
wouldn't let George tease me."
"That I wouldn't," said Guy, looking pityingly upon the frail little
creature, and wondering how any one could think of being unkind to
her.
"What is your name?" asked the little one.
"Guy," he replied, and the boys burst into a laugh.
"Oh, let us take him with us, ma," cried George, "it would be such
capital fun to have a 'guy' with us all the time, to make us laugh.
Oh, ma, do let him go."

"Yes, mamma, do let him go," said little Aggie, taking her brother's
petition quite in earnest. "I am sure he could tell me lots of pretty
stories, and you wouldn't have to tell me 'Bluebeard' and 'Cinderella,'
until you were tired of telling, and I of hearing them."
Now Mrs. Harwood was very fond of her children, and always liked
to indulge them, if she possibly could, especially her little, delicate
Agnes. She thought to herself, as she saw them together, that he
might, in reality, be very useful during the trip, especially as Agnes
had taken so great a fancy to him; so she decided, instead of
sending him away, as she had first intended, to keep him a short
time, and if he proved as good a boy as he appeared, to go with him
to his mother and see what she could do for her. Accordingly, she
told Guy to stay with the children for an hour, while she thought of
the matter. He did so, and as she watched him closely, she saw, with
surprise, that he amused Agnes by his lively stories, the baby by his
antics, and was successful not only in preventing Gus and George
from quarreling, but in keeping friendly with them himself.
"This boy is very amiable and intelligent," she said to herself, "and
as he loves her so well, it is likely his mother has the same good
qualities. I will go around to see her, and if she is well enough to
travel, and is the sort of person I imagine, I will certainly try to take
her with me."
She sent Guy home with a promise to that effect, and in great
delight he rushed into the house, and told his mother what he had
done. At first she was quite angry, and Guy felt very wretchedly over
his impulsive conduct; but when he told her how kind the lady was,
and how light her duties would probably be, she felt almost as
anxious as Guy himself, that Mrs. Harwood should find her strong
and agreeable enough to take the place.
Mr. and Mrs. Harwood came the next day, and were much pleased
with Mrs. Loring, and perhaps more so with Guy, though they did
not say so. The doctor came in while they were there, and was
delighted with the project, assuring Mrs. Loring that the trip would

greatly benefit her, and privately telling Mr. and Mrs. Harwood what
a good woman she was, and how willing she was to do any thing
honorable for the support of herself and her little boy. So they
decided to take her.
"We will give you ten dollars a month," said they, "so you will not be
quite penniless when you get to California."
Mrs. Loring thanked them most heartily, and Guy felt as if all the
riches of the world had been showered down upon them.
"You look like an energetic little fellow," said Mr. Harwood to Guy, as
they were going away, "and I hope you will continue to be one, else
I shall leave you on the plains. Remember, I'll have no laggards in
my train."
Guy promised most earnestly to be as alert and industrious as could
be desired, and full of good intentions and delightful hopes, went
back to his mother to talk of what might happen during their TRIP
ACROSS THE PLAINS.

CHAPTER II.
How quickly the next two weeks of Guy Loring's life flew by. He was
busy and therefore had no time to notice how often his mother
sighed deeply when he talked of the free, joyous life they should
lead on the plains. There seemed to her little prospect of freedom or
pleasure in becoming a servant; yet she said but little about it to
Guy as she did not wish to dampen the ardor of his feelings, fearing
that the stern reality of an emigrant's life would soon throw a cloud
over his blissful hopes. Even Guy himself sometimes felt half inclined
to repent his impulsiveness, for George Harwood constantly
reminded him of it by calling him "Young America" and asking him if
he had no other servants to hire out.
Guy bore all these taunts very quietly, and even laughed at them,
and made himself so useful and agreeable to every one, that on the
morning of the start from W——, Mr. Harwood was heard to say he
would as soon be without one of his best men as little Guy Loring.
It was a beautiful morning in May, 1855, upon which Mr. Harwood's
train left W——. Guy was amazed at the number of people, of horses
and wagons, and at the preparations that had been made for the
journey. Besides Mr. Harwood's family there was that of his cousin,
Mr. Frazer; five young men from St. Louis, and another with his two
sisters from W——. Guy could not but wonder that so many people
should travel together, for he thought it would have been much
pleasanter for each family to be alone, until he heard that there
were a great many Indians upon the plains who often robbed, and
sometimes murdered small parties of travelers.
As the long train of wagons and cattle moved along the narrow
streets of the quiet village, Guy thought of all he had read of the
caravans that used to cross the desert sands of Arabia. "Doesn't it

remind you of them:" he said, after mentioning his thoughts to
George Harwood who was standing near.
"Not a bit" he replied with a laugh. "Those great, strong, covered
wagons don't look much like the queer old caravans did I guess, and
neither the mules or oxen are like camels, besides the drivers
haven't any turbans on their heads, and the people altogether look
much more like Christians than Arabs."
Guy was quite abashed, and not daring to make any other
comparisons, asked Gus to tell him the name of the owner of each
wagon as it passed.
"The first was father's," he answered readily, "the next two cousin
James Frazer's. The next one belongs to William Graham, and his
two sisters, the next two to the young men from St. Louis, and the
other six are baggage wagons."
Guy could ask nothing more as Mr. Harwood called to him to help
them in driving some unruly oxen that were in the rear of the train.
Next he was ordered to run back to the village for some article that
had been forgotten, next to carry water to the teamsters, then to
run with messages from one person to another until he was so tired,
he thoroughly envied George and Gus their comfortable seats in one
of the baggage wagons, and was delighted at last to hear the signal
to halt.
Although they had been traveling all day they were but a few miles
from the village, and the people in spite of the wearisome labors of
the day scarcely realized that they had begun a long and perilous
journey. To most of them it seemed like a picnic party, but to poor
little Guy, it seemed a very tiresome one as he assisted in taking a
small cooking-stove from Mr. Harwood's baggage wagon. As soon as
it was set up, in the open air, at a short distance from the wagons,
he was ordered to make a fire. There was a quantity of dry wood at
hand, and soon he had the satisfaction of seeing a cheerful blaze.

Asking Gus to take care that it did not go out, he took a kettle from
the wagon and went to the spring for water.
Every person was too busy to notice whether Gus watched the fire
or not. Some were building fires for themselves, some unhitching the
horses from the traces, unyoking the oxen, and giving them water
and feed. Guy thought he had never beheld so busy a scene as he
came back with the water, hoping that his fire was burning brightly.
Alas! not a spark was to be seen, Gus had gone with George to see
the cows milked, and poor Guy had to build the fire over again.
Although he was very tired he would have gone to work cheerfully
enough, had not Mrs. Harwood, who was wishing to warm some
milk for the baby reprimanded him severely for his negligence. He
thought the fire would never burn, and was almost ready to cry with
vexation and fatigue. Indeed two great tears did gather in his eyes,
and roll slowly over his cheeks. He tried to wipe them away, but was
not quick enough to prevent George Harwood who had returned
from milking, from seeing them.
"Hullo!" he cried, catching Guy by the ears and holding back his
head that everybody might see his face, "here is 'Young America'
boo-hoo-ing, making a reg'lar 'guy' of himself sure enough. Has
somebody stepped on his poor 'ittle toe?" he added with mock
tenderness, as if he was talking to a little child; "never mind, hold up
your head, or you'll put the fire out with your tears; just see how
they make it fizzle: why, how salt they must be!"
Guy had the good sense neither to get angry, or to cry, at this
raillery, although he found it hard to abstain from doing both. But he
remembered in time that his mother had told him the only way to
silence George was to take no notice of him.
"Guy," said Mrs. Harwood, who had just come from the wagon, with
some meat to be cooked for supper, "I want you to go to your
mother, and amuse Aggie."

He went joyfully as he had not seen his mother since morning. He
uttered an exclamation of surprise when he entered the wagon in
which she was seated, it was so different from what he had
imagined it. It was covered with thick oil-cloth, which was quite
impervious to rain; on the floor was a carpet, over head a curious
sort of rack that held all manner of useful things, guns, fishing poles
and lines, game bags, baskets of fruit, sewing materials, books; and
even glass-ware and crockery. Guy thought he had never seen so
many things packed in so small a space. There were at the rear of
the wagon and along the sides, divans, or cushioned benches, made
of pine boxes covered with cloth and padded, so that they made
very comfortable seats or beds. As Guy saw no sheets or blankets
upon the divans, he was at a loss to know how the sleepers would
keep warm, until his mother raised the cushioned lid of one of the
boxes, and showed him a quantity of coverlets and blankets, packed
tightly therein.
There was a large, round lamp suspended from the center of the
wagon, and as Guy looked at his mother's cheerful surroundings he
could not but wonder that she sighed when he spoke of the dark,
lonesome lodgings they had left, until he suddenly remembered that
she had been nursing the heavy, fretful baby, and trying to amuse
Aggie all the day.
Poor little Aggie was looking very sad, and often said she was very
tired of the dull wagon, and was cold, too. Guy told her of the bright
camp-fires that were burning beside the wagons, and asked her to
go out with him to see them, for although he was very tired and
would gladly have rested in the wagon, he was willing to weary
himself much more if he could do anything to please the sickly little
girl.
"Oh I should like to go very much," cried Aggie eagerly, "Go and ask
ma if I can! It will be such fun to see the fires burning and all the
people standing around them."

Mrs. Harwood was willing for Guy to take Aggie out, if he would be
careful of her, and so he went back and told the anxious little girl.
"Ah! but I am afraid you won't take care of me," she exclaimed
hastily. "No body but mamma takes care of me. George and Gus
always lets me fall, and then I cry because I am hurt, and then papa
whips them, and I cry harder than ever because they are hurt."
"But we will have no hurting or crying this time," replied Guy as he
helped Aggie out of the wagon, thinking what a tenderhearted girl
she must be to cry to see George Harwood whipped, he was sure
that he should not, "for," said Guy to himself, "we should never cry
over what we think will do people good."
How busy all the people seemed to be as Guy, with Aggie by his side
walked among them. Both were greatly pleased at the novel scene
presented to their view. Two cooking stoves were sending up from
their black pipes thick spirals of smoke, while half a dozen clouds of
the same arose from as many fires, around which were gathered
men and women busily engaged in preparing the evening meal. Tea
and coffee were steaming, beefsteaks broiling, slices of bacon
sputtering in the frying pans, each and every article sending forth
most appetizing odors.
Aggie was anxious to see how her father's baggage wagons were
arranged and where they stood. They proved to be the very best of
the train, but they were so interested in all they saw and heard that
they did not appear long in reaching them.
"What a nice time we shall have on the Plains," exclaimed Aggie. "I
shall want you to take me out among the wagons every night. I
never thought such great, lumbering things could look so pretty. I
thought the cloth coverings so coarse and yellow this morning, and
now by the blaze of the fires they appear like banks of snow."
So she talked on until Guy had led her past the fires, the groups
were busy and cheerful people, the lowing cattle and the tired
horses and mules which were quietly munching their fodder and

corn, until they reached the baggage wagons. In one of them they
found a lamp burning, and by its light they saw how closely it was
packed. There were barrels of beef, pork, sugar, flour, and many
other articles which were requisite for a long journey. There were
boxes too, of tea, coffee, rice, crackers and many other edibles, and
in one corner, quite apart from these a number of flasks of powder.
There were also several guns, some spades and other tools, and a
great many things which Guy and Aggie thought useless, but proved
very valuable at a later time.
"I wonder what papa brought so many guns for?" said little Aggie.
"And all the others have them too. I should think they would be
afraid to sleep in a wagon with so many guns and so much powder
in it."
"Men should not be afraid of anything," said Guy very bravely, "and
at any rate not of guns and powder, for with them they can guard
their lives and property from the Indians."
"The Indians!" cried Aggie opening her eyes very wide with fright
and surprise. "Are there Indians on the Plains?"
"Yes. But don't be frightened," replied Guy. "They shall not harm
you, and perhaps we may not see any."
"Oh, I hope we shan't. Let us go back to mother, it is getting dark,
and I'm so frightened. Oh, dear! Oh, dear!"
Aggie's alarm rather amused Guy, but he soothed her very kindly
and told her he would take her to her mother, and they had just left
the wagon, when a terrible figure, wrapped in a buffalo robe, and
brandishing in his hand a small hatchet, jumped with an awful yell
into the path before them.
Poor Aggie caught Guy's arm and screaming with terror begged him
to save her from the Indian. For a moment Guy himself was startled,
then as the monster came nearer he jumped forward, wrested the
hatchet from its grasp, and with hands neither slow nor gentle, tore

the buffalo robe aside and administered some hearty cuffs to the
crest-fallen George Harwood.
"Let me go," he said piteously. "Don't you see who I am? I'll tell my
father, so I will."
"You are a fine Indian," said Guy, contemptuously, "just able to
frighten little girls."
"I can whip you," exclaimed George, as he saw Guy was preparing
to lead Aggie to her mother. "Just come on!"
"No," said Guy, who had already proved the cowardice of his
opponent, "I am quite willing always to protect my master's
daughter from Indians, but not to fight his sons."
"Bravely spoken my little man," exclaimed Mr. Harwood, who had
approached them unperceived.
"He's a coward," whimpered George, "he struck me!"
"I saw all that passed," replied Mr. Harwood, "and I wonder that he
acted so well. I shall make him from henceforth Aggie's especial
defender, and he can strike whoever molests her, whether it be an
Indian or any one else."
George walked sullenly away, and Mr. Harwood, Aggie and Guy
turned toward the camp-fires, and passing three or four, reached
that of their own party. At some little distance from it was spread a
tablecloth covered with plates, dishes of bread, vegetables and
meat, cups of steaming coffee, and other articles. On the grass
around this lowly table the family were seated, all cheerful and all by
the labors of the day blessed with an appetite that rendered their
first meal in camp perfectly delicious.
But for Guy, a dreary hour followed the supper, there were dishes to
wash, water to fetch, and fires to pile high with wood. Guy almost
envied his mother the task of rocking the baby to sleep, yet was glad

that he was able to do the harder work which would otherwise have
fallen on her hands.
It was quite late when all his work was done, and he was able to sit
for a few moments by the camp-fire. He had just begun to tell Aggie
of "Jack, the Giant Killer's" wonderful exploits, when Mr. Harwood
rang a large bell, and all the people left their fires and congregated
about his. Mr. Harwood then stood up with a book in his hand and
told them in a few words what a long and perilous journey they had
undertaken, and asked them to join with him in entreating God's
blessing upon them. He then read a short chapter from the bible and
all knelt down while he offered up a prayer for guidance and
protection.
Aggie whispered to Guy, as she bade him "good-night," that after
that prayer she should not be afraid of the Indians, and went very
contentedly to her mother's wagon, while Guy followed Gus and
George to the one in which they were to sleep.
They were all too weary to talk, and wrapping their blankets around
them lay down, and Gus and George were soon fast asleep. Guy lay
awake some time, looking out at the bright fires—the sleeping cattle,
the long row of wagons, seeing in fancy far beyond the wide
expanse of prairies, the snowy peaks of the Rocky Mountains, and at
last in his peaceful sleep, the golden land of California.

CHAPTER III.
It seemed to Guy but a few short moments before he was aroused
from sleep by the voice of Mr. Harwood, calling to him to light the
fire in the stove.
He started up, for a moment, thinking himself in the poor lodging at
W——, and wondering why his mother had called him so early. But
the sight of the closely packed wagon, and his sleeping companions,
immediately recalled to his remembrance his new position and its
many duties. He hurriedly left the wagon, but as it was still quite
dark to his sleepy eyes, he had to wait a few moments and look
cautiously around, before he could decide which way to turn his
steps.
The first objects he saw, were the camp-fires, which were
smouldering slowly away as if the gray dawn that was peeping over
the hills was putting them to shame. He thought to himself "I am
the first up," but on going forward a few steps, found himself
mistaken, several of the men were moving briskly about, rousing the
lazy horses and oxen, or building fires.
"I shall have to be quick," thought Guy, "or I shall be the last instead
of the first!" and he went to work with such ardor that he had a fire
in the stove, and the kettle boiling over it before any one came to
cook breakfast.
He was glad to see that his mother was the first to leave Mr.
Harwood's wagon, for he wanted to have a chat with her alone, but
his pleasure was soon turned to sorrow when he saw how weary she
looked. He feared, at first, that she was ill, but she told him that the
baby had passed a restless night and kept her awake. Poor Mrs.
Loring could not take up her new life as readily as Guy, and even

while she encouraged him always to look upon the bright side, she
very often saw only the dark herself.
But no one could long remain dull or unhappy that beautiful spring
morning. The dawn grew brighter as the fires died away, and at last
the sun extinguished them altogether by the glory of his presence,
as he rose above the distant hills.
Guy thought he had never beheld so lovely a scene. There was the
busy, noisy camp before him, and beyond it the calm beauty of
freshly budding forests, standing forth in bold relief from the blue
sky which bore on its bosom the golden sphere whence emanate all
light and heat, God's gifts that make our earth so lovely and so
fruitful.
Those were Guy's thoughts as he moved about, willingly assisting his
mother, and the two young girls who, with their brother had left W
—— to seek their fortunes in the far West. Guy pitied them very
much for they were unused to work and had at that time a great
deal to do. So when he went to the spring for water, he brought also
a pailful for them, and when he had a leisure moment, he did any
little chores for them that he could. He had not noticed them much
the night before, but that morning he became quite well acquainted
with them; discovered that the elder was called Amy, and the
younger Carrie, and that they were both very pleasant, and
appreciative of all little acts of kindness.
Before the sun was an hour high, the breakfast had been partaked
of, the camp furniture replaced in the wagons and the train put in
motion.
Slowly and steadily the well-trained mules and the patient oxen
wended their way towards the Missouri River, and so for nearly two
weeks the march was kept up with no incident occurring to break its
monotony, save the daily excitement of breaking camp at noon and
after a tiresome walk of a dozen miles or more, building the watch
fires at night, and talking over the events of the day.

I think had it not been for Aggie, Guy would often have fallen to
sleep as soon as he joined the circle round the fire, for he was
generally greatly wearied by the labors of the day. Every one found
something for Guy to do, and as he never shirked his work as many
boys do, be found but little time for rest, and none for play.
So, as I have said, he was usually so tired at night that he would
certainly have fallen asleep as soon as he gained a quiet nook by the
fire, but for little Aggie, who never failed to take a seat close beside
him and ask for a story. So with the little girl on one side, Gus on the
other, and George seated where he could hear without appearing to
listen, Guy would tell them all the wonderful tales he had ever read,
and many beside that were never printed or even known before.
Those hours spent around the glowing fires, were happy ones to the
children. Even George, when he looked up at the countless stars
looking down upon them from the vast expanse of heaven, was
quieted and seldom annoyed either Guy or his eager listeners by his
ill-timed jests or practical jokes.
"I wish," said little Aggie one evening, when she was sitting by the
fire with her curly head resting on Guy's arms, "that you would tell
me where all the pretty sparks go when they fly upward."
"Why, they die and fall to the earth again," exclaimed George,
laughing.
"I don't think they do," replied Aggie, "I think the fire-flies catch
them and carry them away under their wings."
"And hang them for lamps in butterflies' houses," suggested Guy.
"Oh yes," cried Aggie, clapping her hand in delight. "Do tell us about
them, Guy! I am sure you can!"
So Guy told her about the wonderful bowers in the centre of large
roses where the butterflies rest at night, of the great parlor in the
middle of all, whose walls are of the palest rose and whose ceiling is
upheld by pillars of gold, and of the bed chambers on either hand

with their crimson hangings and their atmosphere of odors so sweet
that the very butterflies sometimes become intoxicated with its
deliciousness, and sleep until the rude sun opens their chamber
doors and dries the dew-drops upon their wings. And he told them
too, how the butterflies gave a ball one night. All the rose parlors
were opened and at each door two fire-flies stood, each with a
glowing spark of flame to light the gay revellers to the feast.
For a long time they patiently stood watching the dancers, and
recounting to each other the origin of the tiny lamps they held.
"I," said one, "caught the last gleam from a widow's hearth, and left
her and her children to freeze; but I couldn't help that for my Lady
Golden Wing told me to bring the brightest light to-night."
"Yet you are scarcely seen," replied his companion, "and 'tis right
your flame should be dull, for the cruelty you showed toward the
poor widow, I caught my light from a rich man's fire and injured no
one, and that is how my lamp burns brighter than yours."
"At any rate I have the comfort of knowing mine is as bright as that
of some others here."
"Nay even mine is brighter than yours," cried a fly from a
neighboring rose. "I would scorn to get my light as you did yours. I
caught mine from the tip of a match with which a little servant-maid
was lighting a fire for her sick mistress. It was the last match in the
house too, and it made me laugh till I ached to hear how mistress
and maid groaned over my fun."
"You cannot say much of my cruelty when you think of your own,"
commented the first, "nor need you wonder that your lamp is dull.
But look at the light at my Lord Spangle Down's door, it is the most
glorious of them all, and held by poor little Jetty Back! Jetty Back!
Jetty Back, where did you light your lamp to-night?"
"I took the spark from a shingle roof, beneath which lay four little
children asleep," she modestly answered. "It was a fierce, red spark,

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Analog Circuits and Devices 1st Edition Wai-Kai Chen

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