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Bus scaling QoS update
Georgi Djakov
ENGINEERS
AND DEVICES
WORKING
TOGETHER
Agenda
● Background
● The problem
● The solution
● Next steps
ENGINEERS AND DEVICES
WORKING TOGETHER
Background
● Challenges of SoC architecture
○ More and more features (IP cores)
○ Many components talking to each other
○ Multiple sources of traffic
○ Concurrent transfers
○ Predictability
● Evolution of on-chip interconnects
○ Buses, crossbars, network-on-chip
● Benefits
○ Scalability - packet communication
○ Power efficiency - shorter wires
ENGINEERS AND DEVICES
WORKING TOGETHER
An example NoC topology
ENGINEERS
AND DEVICES
WORKING
TOGETHER
The problem
● On-chip interconnect buses can handle high throughput
data transfers, but most of the time they may be idle.
● Simultaneous data flows across the SoC with different
sources and destinations, interleaved traffic.
● Interconnect buses can be configured according to the
use-case and demand.
● Each SoC vendor has its own custom implementation in
the downstream kernel.
● Need a common solution in the upstream Linux kernel.
ENGINEERS AND DEVICES
WORKING TOGETHER
Requirements
● Description of the topology.
● Expose path between endpoints as resources. The path is claimed by
consumer drivers and they set constraints on it.
● A common framework for that can traverse the topology and allow a consumer
driver to get() a path.
● Track and aggregate requests received from drivers.
● Update constraints and set hardware to most optimal configuration.
● The vendor specific interconnect controller drivers register the topology with
the framework and implements low-level operations.
ENGINEERS
AND DEVICES
WORKING
TOGETHER
The solution
● A new framework - interconnect framework
● Vendor specific low-level drivers that control the hardware
● Consumer API to set constraints from drivers
ENGINEERS AND DEVICES
WORKING TOGETHER
Device-Tree binding
● Interconnect provider
snoc: snoc@0580000 {
compatible = "qcom,msm-bus-snoc";
#interconnect-cells = <1>;
interconnect-port = <&bimc MAS_SNOC_CFG>,
<&bimc SNOC_BIMC_0_MAS>,
<&bimc SNOC_BIMC_1_MAS>,
<&pnoc SNOC_PNOC_SLV>;
ENGINEERS AND DEVICES
WORKING TOGETHER
Device-Tree binding
● Interconnect consumer
sdhc_1: sdhci@07824000 {
…
interconnect-port = <&pnoc MAS_PNOC_SDCC_1>;
interconnect-path = <&mem>, <&usb_otg>;
interconnect-path-names = "mem", "usb";
ENGINEERS AND DEVICES
WORKING TOGETHER
Interconnect API
● struct interconnect_path *interconnect_get(struct device *dev, const char *id);
● int interconnect_set(struct interconnect_path *path, u32 bandwidth);
● void interconnect_put(struct interconnect_path *path);
ENGINEERS AND DEVICES
WORKING TOGETHER
Interconnect API
● Currently works only with device-tree and platform drivers
● Use device-tree to denote path endpoints
● Types of constraints
● PM QoS
ENGINEERS AND DEVICES
WORKING TOGETHER
The first vendor specific driver
● Dragonboard 410c as a test platform.
● Test scenarios
○ Data transfers between peripherals
○ Data transfers from/to memory
ENGINEERS
AND DEVICES
WORKING
TOGETHER
Future work
● Feedback
○ LKML
○ Should we use PM QoS?
○ Remove dependency on DT
○ Support for ACPI?
○ Use integers instead of string ids for the binding
● Add support for other types of QoS constraints
○ Average bandwidth
○ Peak bandwidth
○ Round-trip latency
○ Priority
● Extend the Qualcomm msm8916 interconnect driver
○ Include the full topology
● Practical and easy example for testing
Thank You
#BUD17
For further information: www.linaro.org
BUD17 keynotes and videos on: connect.linaro.org

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BUD17-214: Bus scaling QoS update

  • 1. Bus scaling QoS update Georgi Djakov
  • 2. ENGINEERS AND DEVICES WORKING TOGETHER Agenda ● Background ● The problem ● The solution ● Next steps
  • 3. ENGINEERS AND DEVICES WORKING TOGETHER Background ● Challenges of SoC architecture ○ More and more features (IP cores) ○ Many components talking to each other ○ Multiple sources of traffic ○ Concurrent transfers ○ Predictability ● Evolution of on-chip interconnects ○ Buses, crossbars, network-on-chip ● Benefits ○ Scalability - packet communication ○ Power efficiency - shorter wires
  • 4. ENGINEERS AND DEVICES WORKING TOGETHER An example NoC topology
  • 5. ENGINEERS AND DEVICES WORKING TOGETHER The problem ● On-chip interconnect buses can handle high throughput data transfers, but most of the time they may be idle. ● Simultaneous data flows across the SoC with different sources and destinations, interleaved traffic. ● Interconnect buses can be configured according to the use-case and demand. ● Each SoC vendor has its own custom implementation in the downstream kernel. ● Need a common solution in the upstream Linux kernel.
  • 6. ENGINEERS AND DEVICES WORKING TOGETHER Requirements ● Description of the topology. ● Expose path between endpoints as resources. The path is claimed by consumer drivers and they set constraints on it. ● A common framework for that can traverse the topology and allow a consumer driver to get() a path. ● Track and aggregate requests received from drivers. ● Update constraints and set hardware to most optimal configuration. ● The vendor specific interconnect controller drivers register the topology with the framework and implements low-level operations.
  • 7. ENGINEERS AND DEVICES WORKING TOGETHER The solution ● A new framework - interconnect framework ● Vendor specific low-level drivers that control the hardware ● Consumer API to set constraints from drivers
  • 8. ENGINEERS AND DEVICES WORKING TOGETHER Device-Tree binding ● Interconnect provider snoc: snoc@0580000 { compatible = "qcom,msm-bus-snoc"; #interconnect-cells = <1>; interconnect-port = <&bimc MAS_SNOC_CFG>, <&bimc SNOC_BIMC_0_MAS>, <&bimc SNOC_BIMC_1_MAS>, <&pnoc SNOC_PNOC_SLV>;
  • 9. ENGINEERS AND DEVICES WORKING TOGETHER Device-Tree binding ● Interconnect consumer sdhc_1: sdhci@07824000 { … interconnect-port = <&pnoc MAS_PNOC_SDCC_1>; interconnect-path = <&mem>, <&usb_otg>; interconnect-path-names = "mem", "usb";
  • 10. ENGINEERS AND DEVICES WORKING TOGETHER Interconnect API ● struct interconnect_path *interconnect_get(struct device *dev, const char *id); ● int interconnect_set(struct interconnect_path *path, u32 bandwidth); ● void interconnect_put(struct interconnect_path *path);
  • 11. ENGINEERS AND DEVICES WORKING TOGETHER Interconnect API ● Currently works only with device-tree and platform drivers ● Use device-tree to denote path endpoints ● Types of constraints ● PM QoS
  • 12. ENGINEERS AND DEVICES WORKING TOGETHER The first vendor specific driver ● Dragonboard 410c as a test platform. ● Test scenarios ○ Data transfers between peripherals ○ Data transfers from/to memory
  • 13. ENGINEERS AND DEVICES WORKING TOGETHER Future work ● Feedback ○ LKML ○ Should we use PM QoS? ○ Remove dependency on DT ○ Support for ACPI? ○ Use integers instead of string ids for the binding ● Add support for other types of QoS constraints ○ Average bandwidth ○ Peak bandwidth ○ Round-trip latency ○ Priority ● Extend the Qualcomm msm8916 interconnect driver ○ Include the full topology ● Practical and easy example for testing
  • 14. Thank You #BUD17 For further information: www.linaro.org BUD17 keynotes and videos on: connect.linaro.org