Capcitive parasitics in mos
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This document discusses various types of capacitive parasitic elements that can occur in integrated circuits. It describes diffusion wire capacitance between the p-n junction of a diffusion wire and the substrate, which includes both bottom wall and sidewall capacitance. Depletion region capacitance is discussed as well. Poly/metal wire capacitance includes both parallel plate and fringe capacitance. Fringing capacitance occurs between non-overlapping edges of conductors. Typical capacitance values for different wire types in a 0.5 micron process are provided. Metal coupling capacitances can occur between wires on the same layer or different layers. Understanding parasitic capacitances is important for circuit design and performance.
![Depletion region capacitance
• Zero-bias depletion capacitance:
– Cj0 = si/xd. :- = 8.854×10−12 F/m
• Depletion region width (zero biased):
– xd = sqrt[2siVbi(1/NA + 1/ND) /q].
• Junction capacitance is function of voltage across
junction:
– Cj(Vr) = Cj0 *(1 - Va/Vbi)^-m
– m is a constant ranges from 0.3 to 0.5
• Junction capacitance
decreases as the reverse bias
voltage increases.
• Cdiff=Cjo*WL+Cjo*h*(2L+W)](https://image.slidesharecdn.com/capcitiveparasiticsinmos-140501105116-phpapp01/85/Capcitive-parasitics-in-mos-9-320.jpg)
Capcitive parasitics in mos
- 1. Capcitive Parasitics Presented By: Niaz Shaikh Instructor: Engnr. Suresh Kumar
- 2. Agenda • Wire parasitics. • Capacitive parasitics. Diffusion wire capacitance. Depletion region capacitance. • Poly/metal wire capacitance. • Fringing Capacitance. • Metal coupling capacitances.
- 3. Wire parasitics • Wire and vias introduce parasitic elements in our circuits. • It is important to understand the structural properties of our components that introduce parasitic elements, and how to measure parasitic element values from layouts.
- 5. Diffusion wire capacitance • Capacitances formed by p-n junctions Total Capacitance= sidewall capacitances+Bottom Wall Capacitance n+ (ND) depletion region substrate (NA) bottomwall capacitance sidewall capacitances
- 6. Typical 0.5 micron process Diffusion wire capacitance values: • n-Type: Bottomwall: 0.6fF/µm^2 Sidewall: 0.2fF/µm • p-Type: Bottomwall: 0.9fF/µm^2 Sidewall: 0.3fF/µm In 0.5micron process , Lambda=0.25µm
- 7. Diffusion wire capacitance (cont:) • An accurate measurement of diffusion wire capacitance requires separate calculations for the bottom and sides of the wire---the doping density, and therefore the junction properties , vary with depth. • To measure total capacitance, we measure the diffusion area, called bottom wall capacitance, and perimeter, called side wall capacitance, as shown in Fig:, and sum the contribution of each.
- 9. Depletion region capacitance • Zero-bias depletion capacitance: – Cj0 = si/xd. :- = 8.854×10−12 F/m • Depletion region width (zero biased): – xd = sqrt[2siVbi(1/NA + 1/ND) /q]. • Junction capacitance is function of voltage across junction: – Cj(Vr) = Cj0 *(1 - Va/Vbi)^-m – m is a constant ranges from 0.3 to 0.5 • Junction capacitance decreases as the reverse bias voltage increases. • Cdiff=Cjo*WL+Cjo*h*(2L+W)
- 10. Poly/metal wire capacitance The capacitance mechanism for poly and metal wires is, in contrast, the parallel plate capacitance. We take into account the changes in the electrical field at the edges of the plate by adding in a fringe capacitance per unit perimeter. These two capacitances are illustrated in Fig: Capacitances can form between signal wires.
- 11. Poly/metal wire capacitance • Two components: –parallel plate; –fringe. plate fringe
- 12. Fringing Capacitance • Fringe capacitance is formed between non-overlapping sidewall of one conductor and surface/sidewall of a second conductor on the same or different layer from the first one. • This type of capacitance becomes significant as we route in higher layers because higher layers are thicker.
- 13. Fringing Capacitance W - H/2H + (a) (b)
- 14. Typical Poly/Metal Capaciatnce values for 0.5 micron process • Poly: Metal2: plate: 0.09fF/µm^2 plate: 0.02fF/µm^2 fringe: 0.04fF/µm fringe: 0.06fF/µm • Metal1: Metal3: plate: 0.04fF/µm^2 plate: 0.009fF/µm^2 fringe: 0.09fF/µm fringe: 0.02fF/µm^
- 15. Metal coupling capacitances • Can couple to : adjacent wires on same layer, wires on above/below layers: • Orthogonal Wires in Different Layers: Reduction of coupling capacitance between Layers metal 2 metal 1 metal 1 Cm1m2 Cw1w2
- 16. Example: parasitic capacitance measurement • n-diffusion: bottomwall=2 fF, sidewall=2 fF. • metal: plate=0.15 fF, fringe=0.72 fF. 3 m 0.75 m 1 m 1.5 m
- 17. Metal coupling capacitances As the number of metal levels increases and the substrate capacitance decreases, wire-to-wire parasitics are becoming more important. Both capacitance between two different layers and between two wires on the same layer are basic parallel plate capacitances. The parasitic capacitance between two wire on different layers, such as Cm1m2 in Fig:, depends on the area of overlap between the two wires. The capacitance between two wires on the same layer, Cw1w2 in the Fig:, is formed by the vertical sides of the metal wires. When two wires on the same layer run in parallel for a long distance, the coupling capacitance can become very large.
- 18. 18 Parastic Elements • So far, we’ve concentrated on getting circuit elements that we want for digital design –Transistors –Wires • Parasitics - occur whether we want them or not –Capacitors –Resistors –Transistors (bipolar and FET)