1. The document proposes a flexible hardware architecture for image scaling using a programmable 2D separable convolution engine.
2. It describes how any scaling operation can be decomposed into three steps: anti-aliasing filtering, continuous image reconstruction via convolution, and resampling to the output grid.
3. The proposed architecture uses a memory to store a programmable interpolation kernel and enables different scaling algorithms like nearest neighbor and bicubic interpolation by programming the kernel.