Class a power amplifiers

Class A Power Amplifiers
Prof.G.Aarthi,AP(SG)

Class A amplifier
• It is similar to the CE Amp we have studied.
• It conducts for the entire signal cycle and consequently has
the lowest efficiency.
• The Q-point is in the middle of the load line (VCEQ = VCC/2).
• As the signal swings from its positive to negative, peak to
peak, the Q-point excursions stay within the linear operating
range of the device.
• If the signal is sinusoidal, the variations in the IC and VCE also
will be sinusoidal.
2

Series Fed Class A power amplifier
• The simple fixed-bias circuit connection shown can be used to
discuss the main features of a class A series-fed amplifier.

DC Bias Operation
• The dc bias set by VCC and RB fixes the dc base-bias current at
with the collector current then being
with the collector–emitter voltage then

DC Bias Operation
 The intersection of the dc bias value of IB with the dc load line then
determines the operating point (Q-point) for the circuit.
 The quiescent point values are those calculated using IB ,IC and VCE .
 If the dc bias collector current is set at one-half the possible signal swing
(between 0 and VCC/RC),the largest collector current swing will be possible.
 Additionally, if the quiescent collector–emitter voltage is set at one-half the
supply voltage, the largest voltage swing will be possible.

AC Operation:
 When an input ac signal is applied to the amplifier the output will vary
from its dc bias operating voltage and current.
 A small input signal, will cause the base current to vary above and below
the dc bias point, which will then cause the collector current (output) to
vary from the dc bias point set as well as the collector–emitter voltage to
vary around its dc bias value.
Amplifier input and output signal variation.

AC Operation:
• As the input signal is made larger, the output will vary further around the
established dc bias point until either the current or the voltage reaches a
limiting condition.
• Limiting condition:
Current : 0mA (low) to VCC/RC (high)
Voltage: 0 V (low) or VCC (high).
Amplifier input and output signal variation.

Power Considerations
• The power then drawn from the supply is
Pin(dc)= VCC ICQ
The ac power delivered to the load (RC) may be expressed using
Efficiency:

MAXIMUM EFFICIENCY
• For the class A series-fed amplifier, the maximum efficiency can be
determined using the maximum voltage and current swings.
• The maximum power input can be calculated using the dc bias
current set to one-half the maximum value:

Problem
Calculate the input power, output power, and efficiency of the
amplifier circuit in Fig.1 for an input voltage that results in a base
current of 10 mA peak
Fig.1

Problem
amplifier circuit in Fig.1 for an input voltage that results in a base
We can determine the Q-point to be
This bias point is marked on the transistor collector characteristic of Fig.2
The ac variation of the output signal can be obtained graphically using the dc
load line drawn on Fig.2 by connecting VCE =VCC =20 V with IC = VCC/RC
=1000 mA = 1 A, as shown.

Problem
amplifier circuit in Fig for an input voltage that results in a base
Fig.2

Problem
When the input ac base current increases from its dc bias level, the collector
current rises by

Class a power amplifiers

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