combinational circuitsand design presentation

Digital Electronic Circuits
(EC2L004)
Lecture 8: Combinational Logic –
Part I

Introduction
• A combinational circuit performs an operation that can
be
specified logically by a set of Boolean functions.
• In contrast, sequential circuits employ storage
elements in addition to logic gates. Their outputs are a
function of the inputs and the state of the storage
elements.
• A combinational circuit consists of an interconnection
of logic
gates.
Block diagram of a combinational circuit
[23/01/2024, IIT BBS] | [Srinivas Boppu] | [SES] |
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Combinational Circuits
• A combinational circuit can be described by m
Boolean
functions, one for each output variables.
• Each output function is expressed in terms of the n
input variables.
• Most important standard combinational circuits
are:
• Adders
• Subtractors
• Comparator
s
• Decoders
• Encoders
• Multiplexers
Available in IC’s as MSI
and used as standard cells
in complex VLSI (ASIC)
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Analysis Procedure
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• The analysis of a combinational circuit requires that we
determine the function that the circuit implements.
• The first step in the analysis is to make the sure that the
given circuit is combinational and not sequential.
• The diagram of a combinational circuit has logic gates
with no feedback paths or memory elements.
• This task starts with a given logic diagram and
culminates with a set of Boolean functions, a truth table,
or, possibly, an explanation of the circuit operation.

Logic Diagram for Analysis Example
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Example (Contd.)
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Example (Contd.)
• From the truth table can you tell the function of the
circuit ?
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Verilog Code
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Verilog Test bench
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Design Procedure
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• From the specifications of the circuit, determine the
number of
inputs and outputs
• Derive the truth table that defines the relationship
between
the input and the output.
• Obtain the simplified Boolean function using x-
variable K- Map.
• Draw the logic diagram and verify the correctness of
the design (manually or by simulation).

Design Example 1:
• Design a combinational circuit with three inputs and
one output. The output is a 1 when the binary value is
less than three. The output is 0 otherwise.
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Design Example 2:
• Design a code converter that converts a BCD
number to
excess-3 code.
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Maps for BCD-to-excess-3 code converter
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Logic Diagram: BCD to Excess-3 code converter
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Binary Adder
• Half Adder
• A combinational circuit that performs the addition of two
bits is
called a “half adder”.
Block diagram of half adder
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Half Adder
Implementation of half adder
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Full Adder
• A combinational circuit that performs the addition of
three bits
(two significant bits and a previous carry) is a full adder.
Block diagram of full adder
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Full Adder (Contd.)
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Full Adder (Contd.)
Implementation of full adder in sum-of-products form
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Full Adder (Contd.)
Implementation of full adder with two half adders and an OR gate
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Binary Adder
• A binary adder is a digital circuit that produces the
arithmetic
sum of two binary numbers.
• It can be constructed with full adders connected in cascade,
with the output carry from each full adder connected to the
input carry of the next full adder in the chain.
• Addition of n-bit numbers requires a chain of n full adders
or a chain of half adder and n-1 full adders.
3 2 1 0
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4-bit Binary Ripple Carry Adder
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Verilog Codes: Half Adder, Full Adder
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Verilog Codes: 4-bit ripple carry adder
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Carry Propagation
• The carry propagation time is a limiting factor on the
speed
with which two numbers are added.
• The most widely technique for reducing the carry
propagation time in a parallel adder uses the principle of
carry lookahead.
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Carry Lookahead Adder
• Algorith
m
• Gi is called a carry generate, and it produces a carry of
1 when both Ai and Bi are 1, regardless of the input
carry Ci.
• Pi is called a carry propagate, because it determines
whether a carry into stage “i” will propagate into stage
“i+1”.
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Carry Lookahead Adder (Contd.)
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Carry Lookahead Adder (Contd.)
Four-bit adder with carry lookahead
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Half Subtractor
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Half Subtractor (Contd.)
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Full Subtractor
• A full subtractor has three inputs and two outputs. x, y,
and z are the inputs to be subtracted in which z
represents borrow from the next stage.
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Full Subtractor (Contd.)
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Binary Subtractor
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• The subtraction of unsigned binary numbers can be done
by
complements.
Review complements:
• 1’s complement of N = (2n-1) –N (N is a binary #)
• 1’s complement can be formed by changing 1’s to 0’s and
0’s
to 1’s
• 2’s complement of a number is obtained by leaving all
least significant 0’s and the first 1 unchanged, and
replacing 1’s with 0’s and 0’s with 1 in all higher
significant digits.
• Taking the 1’s complement and adding 1 to the least
significant bit in the number.

Binary Adder/Subtractor
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Binary Adder/Subtractor (Contd.)
• Overflow occurs when two numbers of n digits are added
and
the sum occupies n +1 digits.
• If V = 0 -> no overflow: n-bit results is correct.
• If V = 1 -> overflow: The result contains n + 1 bits, and the
(n+1)th bit is the actual sign.
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Magnitude Comparator
• A magnitude comparator is a combinational circuit that
compares two numbers, A and B, and then determines
their relative magnitudes.
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Magnitude Comparator (Contd.)
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Magnitude Comparator (Contd.)
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