Computer Abstractions and Technologies
- 1. COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface ARM Edition Chapter 1 Computer Abstractions and Technology
- 2. Chapter 1 — Computer Abstractions and Technology — 2 The Computer Revolution Progress in computer technology Underpinned by Moore’s Law Makes novel applications feasible Computers in automobiles Cell phones Human genome project World Wide Web Search Engines Computers are pervasive §1.1 Introduction
- 3. Chapter 1 — Computer Abstractions and Technology — 3 Classes of Computers Personal computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized
- 4. Classes of Computers Supercomputers High-end scientific and engineering calculations Highest capability but represent a small fraction of the overall computer market Embedded computers Hidden as components of systems Stringent power/performance/cost constraints Chapter 1 — Computer Abstractions and Technology — 4
- 5. Chapter 1 — Computer Abstractions and Technology — 5 The PostPC Era
- 6. The PostPC Era Chapter 1 — Computer Abstractions and Technology — 6 Personal Mobile Device (PMD) Battery operated Connects to the Internet Hundreds of dollars Smart phones, tablets, electronic glasses Cloud computing Warehouse Scale Computers (WSC) Software as a Service (SaaS) Portion of software run on a PMD and a portion run in the Cloud Amazon and Google
- 7. Chapter 1 — Computer Abstractions and Technology — 7 What You Will Learn How programs are translated into the machine language And how the hardware executes them The hardware/software interface What determines program performance And how it can be improved How hardware designers improve performance What is parallel processing
- 8. Chapter 1 — Computer Abstractions and Technology — 8 Understanding Performance Algorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed
- 9. Eight Great Ideas Design for Moore’s Law Use abstraction to simplify design Make the common case fast Performance via parallelism Performance via pipelining Performance via prediction Hierarchy of memories Dependability via redundancy Chapter 1 — Computer Abstractions and Technology — 9 §1.2 Eight Great Ideas in Computer Architecture
- 10. Chapter 1 — Computer Abstractions and Technology — 10 Below Your Program Application software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code Handling input/output Managing memory and storage Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers §1.3 Below Your Program
- 11. Chapter 1 — Computer Abstractions and Technology — 11 Levels of Program Code High-level language Level of abstraction closer to problem domain Provides for productivity and portability Assembly language Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data
- 12. Chapter 1 — Computer Abstractions and Technology — 12 Components of a Computer Same components for all kinds of computer Desktop, server, embedded Input/output includes User-interface devices Display, keyboard, mouse Storage devices Hard disk, CD/DVD, flash Network adapters For communicating with other computers §1.4 Under the Covers The BIG Picture
- 13. Chapter 1 — Computer Abstractions and Technology — 13 Touchscreen PostPC device Supersedes keyboard and mouse Resistive and Capacitive types Most tablets, smart phones use capacitive Capacitive allows multiple touches simultaneously
- 14. Chapter 1 — Computer Abstractions and Technology — 14 Through the Looking Glass LCD screen: picture elements (pixels) Mirrors content of frame buffer memory
- 15. Chapter 1 — Computer Abstractions and Technology — 15 Opening the Box Capacitive multitouch LCD screen 3.8 V, 25 Watt-hour battery Computer board
- 16. Chapter 1 — Computer Abstractions and Technology — 16 Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory, ... Cache memory Small fast SRAM memory for immediate access to data
- 17. Chapter 1 — Computer Abstractions and Technology — 17 Inside the Processor Apple A5
- 18. Chapter 1 — Computer Abstractions and Technology — 18 Abstractions Abstraction helps us deal with complexity Hide lower-level detail Instruction set architecture (ISA) The hardware/software interface Application binary interface The ISA plus system software interface Implementation The details underlying and interface The BIG Picture
- 19. Chapter 1 — Computer Abstractions and Technology — 19 A Safe Place for Data Volatile main memory Loses instructions and data when power off Non-volatile secondary memory Magnetic disk Flash memory Optical disk (CDROM, DVD)
- 20. Chapter 1 — Computer Abstractions and Technology — 20 Networks Communication, resource sharing, nonlocal access Local area network (LAN): Ethernet Wide area network (WAN): the Internet Wireless network: WiFi, Bluetooth
- 21. Chapter 1 — Computer Abstractions and Technology — 21 Technology Trends Electronics technology continues to evolve Increased capacity and performance Reduced cost Year Technology Relative performance/cost 1951 Vacuum tube 1 1965 Transistor 35 1975 Integrated circuit (IC) 900 1995 Very large scale IC (VLSI) 2,400,000 2013 Ultra large scale IC 250,000,000,000 DRAM capacity §1.5 Technologies for Building Processors and Memory
- 22. Semiconductor Technology Silicon: semiconductor Add materials to transform properties: Conductors Insulators Switch Chapter 1 — Computer Abstractions and Technology — 22
- 23. Chapter 1 — Computer Abstractions and Technology — 23 Manufacturing ICs Yield: proportion of working dies per wafer
- 24. Chapter 1 — Computer Abstractions and Technology — 24 Intel Core i7 Wafer 300mm wafer, 280 chips, 32nm technology Each chip is 20.7 x 10.5 mm
- 25. Chapter 1 — Computer Abstractions and Technology — 25 Integrated Circuit Cost Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design 2 area/2)) Die area per (Defects (1 1 Yield area Die area Wafer wafer per Dies Yield wafer per Dies wafer per Cost die per Cost
- 26. Chapter 1 — Computer Abstractions and Technology — 26 Defining Performance Which airplane has the best performance? 0 100 200 300 400 500 Douglas DC-8-50 BAC/ Sud Concorde Boeing 747 Boeing 777 Passenger Capacity 0 2000 4000 6000 8000 10000 Douglas DC- 8-50 BAC/ Sud Concorde Boeing 747 Boeing 777 Cruising Range (miles) 0 500 1000 1500 Douglas DC-8-50 BAC/ Sud Concorde Boeing 747 Boeing 777 Cruising Speed (mph) 0 100000 200000 300000 400000 Douglas DC- 8-50 BAC/ Sud Concorde Boeing 747 Boeing 777 Passengers x mph §1.6 Performance
- 27. Chapter 1 — Computer Abstractions and Technology — 27 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We’ll focus on response time for now…
- 28. Chapter 1 — Computer Abstractions and Technology — 28 Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” n X Y Y X time Execution time Execution e Performanc e Performanc Example: time taken to run a program 10s on A, 15s on B Execution TimeB / Execution TimeA = 15s / 10s = 1.5 So A is 1.5 times faster than B
- 29. Chapter 1 — Computer Abstractions and Technology — 29 Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs’ shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance
- 30. Chapter 1 — Computer Abstractions and Technology — 30 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10–12 s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×109 Hz
- 31. Chapter 1 — Computer Abstractions and Technology — 31 CPU Time Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count Rate Clock Cycles Clock CPU Time Cycle Clock Cycles Clock CPU Time CPU
- 32. Chapter 1 — Computer Abstractions and Technology — 32 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be? 4GHz 6s 10 24 6s 10 20 1.2 Rate Clock 10 20 2GHz 10s Rate Clock Time CPU Cycles Clock 6s Cycles Clock 1.2 Time CPU Cycles Clock Rate Clock 9 9 B 9 A A A A B B B
- 33. Chapter 1 — Computer Abstractions and Technology — 33 Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix Rate Clock CPI Count n Instructio Time Cycle Clock CPI Count n Instructio Time CPU n Instructio per Cycles Count n Instructio Cycles Clock
- 34. Chapter 1 — Computer Abstractions and Technology — 34 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? 1.2 500ps I 600ps I A Time CPU B Time CPU 600ps I 500ps 1.2 I B Time Cycle B CPI Count n Instructio B Time CPU 500ps I 250ps 2.0 I A Time Cycle A CPI Count n Instructio A Time CPU A is faster… …by this much
- 35. Chapter 1 — Computer Abstractions and Technology — 35 CPI in More Detail If different instruction classes take different numbers of cycles n 1 i i i ) Count n Instructio (CPI Cycles Clock Weighted average CPI n 1 i i i Count n Instructio Count n Instructio CPI Count n Instructio Cycles Clock CPI Relative frequency
- 36. Chapter 1 — Computer Abstractions and Technology — 36 CPI Example Alternative compiled code sequences using instructions in classes A, B, C Class A B C CPI for class 1 2 3 IC in sequence 1 2 1 2 IC in sequence 2 4 1 1 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5
- 37. Chapter 1 — Computer Abstractions and Technology — 37 Performance Summary Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, Tc The BIG Picture cycle Clock Seconds n Instructio cycles Clock Program ns Instructio Time CPU
- 38. Chapter 1 — Computer Abstractions and Technology — 38 Power Trends In CMOS IC technology §1.7 The Power Wall Frequency Voltage load Capacitive Power 2 ×1000 ×30 5V → 1V
- 39. Chapter 1 — Computer Abstractions and Technology — 39 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction 0.52 0.85 F V C 0.85 F 0.85) (V 0.85 C P P 4 old 2 old old old 2 old old old new The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance?
- 40. Chapter 1 — Computer Abstractions and Technology — 40 Uniprocessor Performance §1.8 The Sea Change: The Switch to Multiprocessors Constrained by power, instruction-level parallelism, memory latency
- 41. Chapter 1 — Computer Abstractions and Technology — 41 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization
- 42. Chapter 1 — Computer Abstractions and Technology — 42 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point) n n 1 i i ratio time Execution
- 43. Chapter 1 — Computer Abstractions and Technology — 43 CINT2006 for Intel Core i7 920
- 44. Chapter 1 — Computer Abstractions and Technology — 44 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec) 10 0 i i 10 0 i i power ssj_ops Watt per ssj_ops Overall
- 45. Chapter 1 — Computer Abstractions and Technology — 45 SPECpower_ssj2008 for Xeon X5650
- 46. Chapter 1 — Computer Abstractions and Technology — 46 Pitfall: Amdahl’s Law Improving an aspect of a computer and expecting a proportional improvement in overall performance §1.10 Fallacies and Pitfalls 20 80 20 n Can’t be done! unaffected affected improved T factor t improvemen T T Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5× overall? Corollary: make the common case fast
- 47. Chapter 1 — Computer Abstractions and Technology — 47 Fallacy: Low Power at Idle Look back at i7 power benchmark At 100% load: 258W At 50% load: 170W (66%) At 10% load: 121W (47%) Google data center Mostly operates at 10% – 50% load At 100% load less than 1% of the time Consider designing processors to make power proportional to load
- 48. Chapter 1 — Computer Abstractions and Technology — 48 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions 6 6 6 10 CPI rate Clock 10 rate Clock CPI count n Instructio count n Instructio 10 time Execution count n Instructio MIPS CPI varies between programs on a given CPU
- 49. Chapter 1 — Computer Abstractions and Technology — 49 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance §1.9 Concluding Remarks