CPU Scheduling

Silberschatz, Galvin and GagneOperating System Concepts – 9th
Edition
Chapter 6: CPU Scheduling

6.2 Silberschatz, Galvin and GagneOperating System Concepts – 9th
Edition
Chapter 6: CPU Scheduling
Basic Concepts
Scheduling Criteria
Scheduling Algorithms
Thread Scheduling
Multiple-Processor Scheduling
Real-Time CPU Scheduling
Operating Systems Examples
Algorithm Evaluation

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Objectives
To introduce CPU scheduling, which is the basis for
multiprogrammed operating systems
To describe various CPU-scheduling algorithms
To discuss evaluation criteria for selecting a CPU-scheduling
algorithm for a particular system
To examine the scheduling algorithms of several operating
systems

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Basic Concepts
Maximum CPU utilization
obtained with multiprogramming
CPU–I/O Burst Cycle – Process
execution consists of a cycle of
CPU execution and I/O wait
CPU burst followed by I/O
burst
CPU burst distribution is of main
concern

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Histogram of CPU-burst Times

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CPU Scheduler
Short-term scheduler selects from among the processes in
ready queue, and allocates the CPU to one of them
Queue may be ordered in various ways
CPU scheduling decisions may take place when a process:
1. Switches from running to waiting state
2. Switches from running to ready state
3. Switches from waiting to ready
4. Terminates
Scheduling under 1 and 4 is nonpreemptive
All other scheduling is preemptive
Consider access to shared data
Consider preemption while in kernel mode
Consider interrupts occurring during crucial OS activities

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Dispatcher
Dispatcher module gives control of the CPU to the process
selected by the short-term scheduler; this involves:
switching context
switching to user mode
jumping to the proper location in the user program to
restart that program
Dispatch latency – time it takes for the dispatcher to stop
one process and start another running

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Scheduling Criteria
CPU utilization – keep the CPU as busy as possible
Throughput – # of processes that complete their execution per
time unit
Turnaround time – amount of time to execute a particular
process
Waiting time – amount of time a process has been waiting in
the ready queue
Response time – amount of time it takes from when a request
was submitted until the first response is produced, not output (for
time-sharing environment)

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Scheduling Algorithm Optimization Criteria
Max CPU utilization
Max throughput
Min turnaround time
Min waiting time
Min response time

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First- Come, First-Served (FCFS) Scheduling
Process Burst Time
P1 24
P2 3
P3 3
Suppose that the processes arrive in the order: P1 , P2 , P3
The Gantt Chart for the schedule is:
Waiting time for P1 = 0; P2 = 24; P3 = 27
Average waiting time: (0 + 24 + 27)/3 = 17
P P P1 2 3
0 24 3027

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FCFS Scheduling (Cont.)
Suppose that the processes arrive in the order:
P2 , P3 , P1
The Gantt chart for the schedule is:
Waiting time for P1 = 6;P2 = 0; P3 = 3
Average waiting time: (6 + 0 + 3)/3 = 3
Much better than previous case
Convoy effect - short process behind long process
Consider one CPU-bound and many I/O-bound processes
P 1
0 3 6 30
P 2
P 3

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Shortest-Job-First (SJF) Scheduling
Associate with each process the length of its next CPU burst
Use these lengths to schedule the process with the shortest
time
SJF is optimal – gives minimum average waiting time for a given
set of processes
The difficulty is knowing the length of the next CPU request
Could ask the user

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Example of SJF
ProcessArrival Time Burst Time
P1 0.0 6
P2 2.0 8
P3 4.0 7
P4 5.0 3
SJF scheduling chart
Average waiting time = (3 + 16 + 9 + 0) / 4 = 7
P 3
0 3 24
P 4
P 1
169
P 2

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Determining Length of Next CPU Burst
Can only estimate the length – should be similar to the previous one
Then pick process with shortest predicted next CPU burst
Can be done by using the length of previous CPU bursts, using
exponential averaging
Commonly, α set to ½
Preemptive version called shortest-remaining-time-first
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Prediction of the Length of the Next CPU Burst

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Examples of Exponential Averaging
α =0
τn+1 = τn
Recent history does not count
α =1
τn+1 = α tn
Only the actual last CPU burst counts
If we expand the formula, we get:
τn+1 = α tn+(1 - α)α tn -1 + …
+(1 - α )j
α tn -j + …
+(1 - α )n +1
τ0
Since both α and (1 - α) are less than or equal to 1, each
successive term has less weight than its predecessor

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Example of Shortest-remaining-time-first
Now we add the concepts of varying arrival times and preemption to
the analysis
ProcessAarri Arrival TimeT Burst Time
P1 0 8
P2 1 4
P3 2 9
P4 3 5
Preemptive SJF Gantt Chart
Average waiting time = [(10-1)+(1-1)+(17-2)+5-3)]/4 = 26/4 = 6.5 msec
P 4
0 1 26
P 1
P 2
10
P 3
P 1
5 17

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Priority Scheduling
A priority number (integer) is associated with each process
The CPU is allocated to the process with the highest priority
(smallest integer ≡ highest priority)
Preemptive
Nonpreemptive
SJF is priority scheduling where priority is the inverse of predicted
next CPU burst time
Problem ≡ Starvation – low priority processes may never execute
Solution ≡ Aging – as time progresses increase the priority of the
process

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Example of Priority Scheduling
ProcessA arri Burst TimeT Priority
P1 10 3
P2 1 1
P3 2 4
P4 1 5
P5 5 2
Priority scheduling Gantt Chart
Average waiting time = (6+0+16+18+1)/5 = 8.2 msec

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Round Robin (RR)
Each process gets a small unit of CPU time (time quantum q),
usually 10-100 milliseconds. After this time has elapsed, the
process is preempted and added to the end of the ready queue.
If there are n processes in the ready queue and the time quantum
is q, then each process gets 1/n of the CPU time in chunks of at
most q time units at once. No process waits more than (n-1)q
time units.
Timer interrupts every quantum to schedule next process
Performance
q large ⇒ FIFO
q small ⇒ q must be large with respect to context switch,
otherwise overhead is too high

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Example of RR with Time Quantum = 4
Process Burst Time
P1 24
P2 3
P3 3
The Gantt chart is:
Typically, higher average turnaround than SJF, but better
response
q should be large compared to context switch time
q usually 10ms to 100ms, context switch < 10 usec
P P P1 1 1
0 18 3026144 7 10 22
P 2
P 3
P 1
P 1
P 1

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Time Quantum and Context Switch Time

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Turnaround Time Varies With The Time Quantum
80% of CPU bursts
should be shorter than q

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Multilevel Queue
Ready queue is partitioned into separate queues, eg:
foreground (interactive)
background (batch)
Process permanently in a given queue
Each queue has its own scheduling algorithm:
foreground – RR
background – FCFS
Scheduling must be done between the queues:
Fixed priority scheduling; (i.e., serve all from foreground then
from background). Possibility of starvation.
Time slice – each queue gets a certain amount of CPU time
which it can schedule amongst its processes; i.e., 80% to
foreground in RR
20% to background in FCFS

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Multilevel Queue Scheduling

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Multilevel Feedback Queue
A process can move between the various queues; aging can be
implemented this way
Multilevel-feedback-queue scheduler defined by the following
parameters:
number of queues
scheduling algorithms for each queue
method used to determine when to upgrade a process
method used to determine when to demote a process
method used to determine which queue a process will enter
when that process needs service

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Example of Multilevel Feedback Queue
Three queues:
Q0 – RR with time quantum 8
milliseconds
Q1 – RR time quantum 16 milliseconds
Q2 – FCFS
Scheduling
A new job enters queue Q0 which is
served FCFS
 When it gains CPU, job receives 8
milliseconds
 If it does not finish in 8
milliseconds, job is moved to
queue Q1
At Q1 job is again served FCFS and
receives 16 additional milliseconds
 If it still does not complete, it is
preempted and moved to queue Q2

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Thread Scheduling
Distinction between user-level and kernel-level threads
When threads supported, threads scheduled, not processes
 Many-to-one and many-to-many models, thread library schedules user-level
threads to run on LWP, Known as process-contention scope (PCS)
since scheduling competition is within the process. Typically, PCS is done
according to priority—the scheduler selects the runnable thread with the
highest priority to run. User-level thread priorities are set by the programmer
and are not adjusted by the thread library, although some thread libraries
may allow the programmer to change the priority of a thread.
 Kernel thread scheduled onto available CPU is system-contention
scope (SCS) – competition among all threads in system.
Systems using the one-to-one model, such as Windows, Linux, and Solaris,
schedule threads using only SCS.

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Multiple-Processor Scheduling
CPU scheduling more complex when multiple CPUs are available
Homogeneous processors within a multiprocessor
Asymmetric multiprocessing (AMP) – only one processor accesses the
system data structures, alleviating the need for data sharing
Symmetric multiprocessing (SMP) – each processor is self-scheduling,
all processes in common ready queue, or each has its own private queue of
ready processes. Currently, most common
Processor affinity or CPU pinning- enables the binding and unbinding
of a process or a thread to a central processing unit (CPU) or a range of
CPUs, so that the process or thread will execute only on the designated
CPU or CPUs rather than any CPU
soft affinity
hard affinity

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NUMA and CPU Scheduling
Note that memory-placement algorithms can also consider affinity
NUMA (non-uniform memory access) is a method of
configuring a cluster of microprocessor in a multiprocessing
system so that they can share memory locally, improving
performance and the ability of the system to be expanded.
NUMA is used in a symmetric multiprocessing ( SMP )
system.

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Multiple-Processor Scheduling – Load Balancing
If SMP, need to keep all CPUs loaded for efficiency
Load balancing attempts to keep workload evenly distributed
Push migration – periodic task checks load on each
processor, and if found pushes task from overloaded CPU to
other CPUs
Pull migration – idle processors pulls waiting task from busy
processor

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Multicore Processors
Recent trend to place multiple processor cores on same
physical chip
Faster and consumes less power
Multiple threads per core also growing
Takes advantage of memory stall to make progress on
another thread while memory retrieve happens

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Multithreaded Multicore System

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Real-Time CPU Scheduling
Can present obvious
challenges
Soft real-time systems –
no guarantee as to when
critical real-time process will
be scheduled
Hard real-time systems –
task must be serviced by its
deadline
Two types of latencies affect
performance
1. Interrupt latency – time from
arrival of interrupt to start of
routine that services interrupt
2. Dispatch latency – time for
schedule to take current process
off CPU and switch to another

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Real-Time CPU Scheduling (Cont.)
Conflict phase of
dispatch latency:
1. Preemption of
any process
running in kernel
mode
2. Release by low-
priority process
of resources
needed by high-
priority
processes

CPU Scheduling

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