CV_Wael_Dghais_2015
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Wael Dghais is a senior researcher and lecturer in electrical engineering with interests in EDA tools, modeling of nanoscale transistors, optoelectronics devices, and industrial process characterization. He received his PhD in electrical engineering from the University of Aveiro in 2013. He has over 10 years of experience in research, teaching, and industry.
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September 2008 - December 2009: Researcher in MOCHA (MOdelling and
CHAracterization for system in package (SiP) Signal and Power Integrity Analysis)
European project FP7 ICT-2007-216732.
February 2011 - May 2013: Researcher in the SOPA (RF Self-Oscillating Power Amplifier)
FCT project PTDC/EEA-TEL/114530/2009.
Peer-reviewed Journal Transactions
[1] W. Dghais, T. R. Cunha, and J. C. Pedro “Reduced-Order Parametric Behavioral Model for
Digital Buffers/Drivers with Physical Support”, IEEE Trans. on Components, Packaging and
Manufacturing Technology, vol. 2, no. 12, pp. 1 - 10, Dec. 2012.
[2] W. Dghais, H. M. Teixeira, T. R. Cunha, and J. C. Pedro “Novel Extraction of Table-Based
I-Q Behavioral Model for High-Speed Digital Buffers/Drivers”, IEEE Trans. on Components,
Packaging and Manufacturing Technology, March 2013.
[3] H. M. Teixeira, W. Dghais, T. R. Cunha, and J. C. Pedro “Measurement Setup for RF/Digital
Buffers Characterization” IEEE Trans. on Instrumentation and Measurement, 2013.
[4] W. Dghais, T. R. Cunha, and J. C. Pedro “A Novel Two-Port Behavioral Model for I/O Buffer
Overclocking Simulation” IEEE Trans. on Components, Packaging and Manufacturing
Technology, October 2013.
[5] W. Dghais, V. M. C Ribeiro, Z. Liu, Z. Vujicic, M. Violas, A. Teixeira, “ Efficient RSOA
Modelling using Polar Complex-Valued Neural Networks”, Optics Communications, Vol 334,
Pages 129–132, 1 January 2015.
Peer-reviewed Conference
[1] W. Dghais, T. R. Cunha, and J. C. Pedro “Behavioral Model for High-Speed Digital buffer /
Driver”,Integrated Nonlinear Microwave and Millimeter-Wave Circuits, pp.110–113, Apr. 2010.
[2] W. Dghais, H. M. Teixeira, T. R. Cunha, and J. C. Pedro “Efficient Table-Based I-Q
Behavioral Model for High-Speed Digital Buffers/Drivers” 16th
IEEE workshop on SPI, pp.95-
96 May 2012.
[3] W. Dghais, T. R. Cunha, and J. C. Pedro “A Mixed-Domain Behavioral Model's Extraction
for Digital I/O Buffers”, 21st
IEEE conference on electrical performance of electronic packaging
and systems (EPEPS), Arizona, October 2012.
[4] W. Dghais, T. R. Cunha and J. C. Pedro “Behavioral Modeling Approaches for Digital I/O
Buffers”, 9th
Conference on Telecommunications- ConfTele, Castelo Branco, Portugal, May
2013.](https://image.slidesharecdn.com/94432519-d9eb-45bf-82a0-4e2b41897f7d-150320130111-conversion-gate01/85/CV_Wael_Dghais_2015-3-320.jpg)
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[5] W.Dghais, J. Rodriguez “Empirical modelling of FDSOI CMOS Inverter for Signal/Power
Integrity Simulation”, IEEE Design Automation and Test in Europe, April 2015.
[6] W.Dghais, J. Rodriguez “UTTB FDSOI Back-Gate Biasing for Low Power and High-Speed
Chip Design”, 8th International Wireless Internet Conference (WICON) November 2014.
Peer-reviewed International IBIS Summit
[1] W. Dghais, H. M. Teixeira, T. R. Cunha, and J. C. Pedro “Efficient Table-Based I-Q
Behavioral Model for High-Speed Digital Buffers/Drivers” IBIS Summit Paris, Italy, May
2012, available at http://www.eda.org/ibis/summits/index-bydate.htm
[2] W.Dghais, R.Wolff “Behavioral Modeling Solution for Driver's Overclocking Simulation”,
IBIS Summit Paris, France, May 2013, available at http://www.eda.org/ibis/summits/index-
bydate.htm
[3] W.Dghais, R.Wolff “Table-Based Extraction for Modeling Driver's Output Admittance”,
IBIS Summit Paris, France, May 2013, http://www.eda.org/ibis/summits/index-bydate.htm
[4] W.Dghais, J. Rodriguez “Mixed-Domain Ibis Model Extraction And Implementation” IBIS
Summit Ghent, Belgium, May 2014, http://www.eda.org/ibis/summits/index-bydate.htm
Peer-reviewed National Publication
[1] W.Dghais, “Macromodeling of Digital I/O Buffers”, Electrónica e Telecomunicações, Vol.
5, No. 2, pp. 259 - 266, June, 2010.
PEDAGOGIC ACTIVITIES
Lecturer at the University of Aveiro
2012/2015: 1st Semester: Applied Mathematics for Sciences and Engineering
(Mechanical/Electrical/ Electronic systems): Characterization Modelling and Programming.
2013/2015: 2nd Semester: Digital System Design (Design Works software, VHDL programming,
and Timing Analysis).
Student Orientation:
Sept.2013/Jul.2015: Kevin Filipe Ganhito Pinto, Internship in AuTOmated Model for hIgh-
Speed ouTput InterfaCes (ATOMISTIC) with Dr. Jonathan Rodriguez in 4TELL Goup.
Sept.2012/Jan.2013: M. Aziz. Hmaidi, Master degree final project, “RF Instrumentation Bench
For Power Amplifier Behavioral Model Extraction”, Institute of Telecommunication, Aveiro.](https://image.slidesharecdn.com/94432519-d9eb-45bf-82a0-4e2b41897f7d-150320130111-conversion-gate01/85/CV_Wael_Dghais_2015-4-320.jpg)
CV_Wael_Dghais_2015
- 1. 1 CURRICULUM VITAE PERSONAL INFORMATION Wael Dghais: -Senior Researcher and Lecturer Professor in Electrical Engineering -Engineer in Industrial Instrumentation, measurement and Maintenance -IEEE member Date of Birth: 23/09/1984 Phone: +351 910 296 217 E-mail: waeldghais@ua.pt waeldghais@av.it.pt The current research interests include: -EDA tools and software packages for signal and power integrity simulation and evaluation -Advanced modelling for nanoscale transistors such as FinFET and FD-SOI and Optoelectronics I/O devices. -Design of Optoelectronics and Electronic Systems ADC/DACs for software defined radio/optics. -IBIS mathematical modeling of analog-mixed signal high-speed I/O interfaces nonlinear dynamic behaviors in digital, Radio Frequency, and optical communication links. -Industrial process characterization, modelling and control. -Nonlinear control theory and artificial intelligence: neural networks and neuro-fuzzy systems. -Time- and frequency-domains machine learning and system identification techniques. -Driver/receivers (transceivers) modelling, equalizations, and linearization’s techniques. EDUCATION / DEGREES 2013: Ph.D. degree in Electrical Engineering (Electronics and Telecommunications) from the University of Aveiro, Portugal. Mr. Dghais was a recipient of the doctoral fellowship from the Portuguese Foundation for Science and Technology (FCT) in 2010. PhD thesis title: “Behavioral Modeling Optimization and Enhancement for High-Speed AMS IO Interfaces”. 2009: Engineering degree in Instrumentation and industrial maintenance from the National Institute of Applied Science and Technology, INSAT, Tunisia. Mr. Dghais was a recipient of the First Student’s Award from the INSAT in 2009. 2008/2009: Final year Engineering project at the Institute of Telecommunication, Aveiro. 2007/2008: Fifth year Instrumentation and Industrial Maintenance in the National Institute of Applied Science and Technology, INSAT. I got good mark and I was ranked the 1st in my class.
- 2. 2 RF and Electromagnetic Project: The realization of an FM transmitter and receiver and the study of the effect of its interference on radio and TV receivers with and without electromagnetic shield by measuring the electromagnetic efficiency of different type of shield. Visual Basic Project: The development of software to manage the maintenance of a reversible heat engine. Firstly, the real time acquirement of signals through an electronic board is performed. Then the statistical data and physical system analyses are used to identify malfunctions and system failures. Finally, prepare solutions so that the operator takes the adequate preventive and corrective actions. 2006/2007: 4th year Instrumentation and Industrial Maintenance. Good Mark Project: Design and the realization of an I/O board with analog-to-digital converter (ADC) and its driver in order to control of various industrial processes. 2005/2006: 3rd year Instrumentation and Industrial Maintenance. Good Mark 2004/2005: 2nd year Instrumentation and Industrial Measurements. Good Mark 2003/2004: 1st year preparatory Math-physical-Computer science. June 2003: Admitted (good mark) to the national contest of final exams (baccalaureate) in Mathematical section. PROFESSIONAL EXPERIENCE RESEARCH EXPERIENCE January 2014: Senior researcher and manager of THINGS2DO (THIN but Great Silicon 2 Design Objects) European project about IP’s reuse and modelling of fully depleted silicon on insulator (FD-SOI) technology. Variability analysis of FDSOI technology IP-specific Mixed-signal, analog design flow Automatic translations from FDSOI transistor level to system level Fast analog mixed signal modeling 2009-2013: PhD-Researcher at the Institute of Telecommunications: Assessments and characterization of signal and power integrity (SPI) of the analog-mixed signal I/O devices encountered in high-speed digital/radio-frequency systems. Mathematical behavioral modelling of high-speed analog-mixed signal I/O interfaces that are implemented in CAD tools library to hide the IP and reduce the simulation time. Improve the algorithm of the industry standard IBIS model developed at Intel® under normal and overclocking conditions for SPI assessments. Participating in R&D Projects at the Institute of Telecommunications:
- 3. 3 September 2008 - December 2009: Researcher in MOCHA (MOdelling and CHAracterization for system in package (SiP) Signal and Power Integrity Analysis) European project FP7 ICT-2007-216732. February 2011 - May 2013: Researcher in the SOPA (RF Self-Oscillating Power Amplifier) FCT project PTDC/EEA-TEL/114530/2009. Peer-reviewed Journal Transactions [1] W. Dghais, T. R. Cunha, and J. C. Pedro “Reduced-Order Parametric Behavioral Model for Digital Buffers/Drivers with Physical Support”, IEEE Trans. on Components, Packaging and Manufacturing Technology, vol. 2, no. 12, pp. 1 - 10, Dec. 2012. [2] W. Dghais, H. M. Teixeira, T. R. Cunha, and J. C. Pedro “Novel Extraction of Table-Based I-Q Behavioral Model for High-Speed Digital Buffers/Drivers”, IEEE Trans. on Components, Packaging and Manufacturing Technology, March 2013. [3] H. M. Teixeira, W. Dghais, T. R. Cunha, and J. C. Pedro “Measurement Setup for RF/Digital Buffers Characterization” IEEE Trans. on Instrumentation and Measurement, 2013. [4] W. Dghais, T. R. Cunha, and J. C. Pedro “A Novel Two-Port Behavioral Model for I/O Buffer Overclocking Simulation” IEEE Trans. on Components, Packaging and Manufacturing Technology, October 2013. [5] W. Dghais, V. M. C Ribeiro, Z. Liu, Z. Vujicic, M. Violas, A. Teixeira, “ Efficient RSOA Modelling using Polar Complex-Valued Neural Networks”, Optics Communications, Vol 334, Pages 129–132, 1 January 2015. Peer-reviewed Conference [1] W. Dghais, T. R. Cunha, and J. C. Pedro “Behavioral Model for High-Speed Digital buffer / Driver”,Integrated Nonlinear Microwave and Millimeter-Wave Circuits, pp.110–113, Apr. 2010. [2] W. Dghais, H. M. Teixeira, T. R. Cunha, and J. C. Pedro “Efficient Table-Based I-Q Behavioral Model for High-Speed Digital Buffers/Drivers” 16th IEEE workshop on SPI, pp.95- 96 May 2012. [3] W. Dghais, T. R. Cunha, and J. C. Pedro “A Mixed-Domain Behavioral Model's Extraction for Digital I/O Buffers”, 21st IEEE conference on electrical performance of electronic packaging and systems (EPEPS), Arizona, October 2012. [4] W. Dghais, T. R. Cunha and J. C. Pedro “Behavioral Modeling Approaches for Digital I/O Buffers”, 9th Conference on Telecommunications- ConfTele, Castelo Branco, Portugal, May 2013.
- 4. 4 [5] W.Dghais, J. Rodriguez “Empirical modelling of FDSOI CMOS Inverter for Signal/Power Integrity Simulation”, IEEE Design Automation and Test in Europe, April 2015. [6] W.Dghais, J. Rodriguez “UTTB FDSOI Back-Gate Biasing for Low Power and High-Speed Chip Design”, 8th International Wireless Internet Conference (WICON) November 2014. Peer-reviewed International IBIS Summit [1] W. Dghais, H. M. Teixeira, T. R. Cunha, and J. C. Pedro “Efficient Table-Based I-Q Behavioral Model for High-Speed Digital Buffers/Drivers” IBIS Summit Paris, Italy, May 2012, available at http://www.eda.org/ibis/summits/index-bydate.htm [2] W.Dghais, R.Wolff “Behavioral Modeling Solution for Driver's Overclocking Simulation”, IBIS Summit Paris, France, May 2013, available at http://www.eda.org/ibis/summits/index- bydate.htm [3] W.Dghais, R.Wolff “Table-Based Extraction for Modeling Driver's Output Admittance”, IBIS Summit Paris, France, May 2013, http://www.eda.org/ibis/summits/index-bydate.htm [4] W.Dghais, J. Rodriguez “Mixed-Domain Ibis Model Extraction And Implementation” IBIS Summit Ghent, Belgium, May 2014, http://www.eda.org/ibis/summits/index-bydate.htm Peer-reviewed National Publication [1] W.Dghais, “Macromodeling of Digital I/O Buffers”, Electrónica e Telecomunicações, Vol. 5, No. 2, pp. 259 - 266, June, 2010. PEDAGOGIC ACTIVITIES Lecturer at the University of Aveiro 2012/2015: 1st Semester: Applied Mathematics for Sciences and Engineering (Mechanical/Electrical/ Electronic systems): Characterization Modelling and Programming. 2013/2015: 2nd Semester: Digital System Design (Design Works software, VHDL programming, and Timing Analysis). Student Orientation: Sept.2013/Jul.2015: Kevin Filipe Ganhito Pinto, Internship in AuTOmated Model for hIgh- Speed ouTput InterfaCes (ATOMISTIC) with Dr. Jonathan Rodriguez in 4TELL Goup. Sept.2012/Jan.2013: M. Aziz. Hmaidi, Master degree final project, “RF Instrumentation Bench For Power Amplifier Behavioral Model Extraction”, Institute of Telecommunication, Aveiro.
- 5. 5 March2012/June 2013: Orientation of two students in developing practical project in the course “Digital Systems”, in the University of Aveiro directed by Professor António Guilherme Rocha Campos (Institute of Engineering Electronic and Telematics of Aveiro - IEETA). INDUSTRIAL EXPERIENCE 31 July – 31 August 2007: TOTAL GAS Tunisia: -Participation to the implementation team of engineers with new management system software for maintenance, instruments and production. - Plan and manage production activities. - Ensure efficiency and quality in the daily production process. - Coordinate the activities of maintenance and security of the machines. 01 July - 31 July 2007: Express Elevator LG: Prepare documentations for the assessment of the elevator installation: Energy consumption, reliability, comfort, security, sensors... -Make checks lists on the preventive maintenance and measurements. -Work in the customer service “on site elevator reparation” -Attend a training tutorial on the prevention against risks of accidents. July - August 2006: TUNISAIR: The flag carrier airline of Tunisia: The complex technique and the department of management quality: - Workshop of No Destructive Controls, Automatism and electronic control workshop, Workshop calibration: calibrate and verify sensors and instruments of measure. - Engineering Service: Survey of reliability and the safety of brake working and wheel. -HVAC (Heating, Ventilating, and Air Conditioning) department. 31 July - 31 August 2005: The Central Laboratory of Analyses and Tests: Department of Industrial Metrology. -Prepare cards of lifetime for sensors and measuring instruments. -Participate in the management of the equipment: protection, storage and handling. -Calibration and/or verification of measuring instruments on site, in company and in laboratories: Strength and couple, Temperature, Mass, Pressure and Dimensional. COMPUTER KNOWLEDGE MatLab, Cadence (Spectre, Hspice), ADS Keysight (Agilent), IBIS, Mpilog, C #, Visual Basic, VHDL/Verilog-AMS. Microsoft Office, Lab VIEW, AutoCAD. LEVEL OF SPOKEN/WRITTEN LANGUAGE:
- 6. 6 English, French, Arabic, Portuguese: Good, Germany: Very Basic (two years study in the secondary school) ADDITIONAL INFORMATION -B1/B2 US VISA 2012/2022. -Call Center Summer Work: 2003-2007. -Active member of the IBIS model Forum and meetings. -Organized, Sense of Responsibility, Proactive, Entrepreneurship, Creative, teamwork and self- motivation, and Effective communication skills. -Love travelling, Sports, Book Reading, Photography.