Developing Low Power Mobile Platform

Copyright © 2001 Intel Corporation.
Intel
Developer
Forum
Spring 2001
Copyright © 2001Intel Corporation.
DevelopingDeveloping
Low Power MobileLow Power Mobile
PlatformPlatform
PochangPochang HsuHsu,, Engineering ManagerEngineering Manager
Mobile Technology Development, Intel Corp.Mobile Technology Development, Intel Corp.
Don J. NguyenDon J. Nguyen,, Mobile Power Architecture ManagerMobile Power Architecture Manager
Mobile Technology Development, Intel Corp.Mobile Technology Development, Intel Corp.
David B. ChungDavid B. Chung,, Sr. Display ManagerSr. Display Manager
Advanced Display Group, Home Product Group, IntelAdvanced Display Group, Home Product Group, Intel
Feb 27Feb 27 –– March 1, 2001March 1, 2001

Intel
Developer
Forum
Spring 2001
AgendaAgenda
Problem StatementProblem Statement
Low Power Platform DesignLow Power Platform Design
StrategiesStrategies
SummarySummary
Call to ActionCall to Action
Low Power Display DemoLow Power Display Demo

Intel
Developer
Forum
Spring 2001
Problem StatementProblem Statement
Power consumption of anPower consumption of an
OEM performanceOEM performance
notebook under ZD Batterynotebook under ZD Battery
MarkMark
Major power contributorsMajor power contributors
are LCD, GFX, chipset,are LCD, GFX, chipset,
power supply, HDD/DVDpower supply, HDD/DVD
CPU power well managedCPU power well managed
by OSby OS
Battery Life Is a Platform IssueBattery Life Is a Platform IssueBattery Life Is a Platform Issue
CPU
7% Chipset
12%
LCD
32%
Graphics
13%
HDD/DVD
11%
Power Supply
Loss
10%
Others
15%

Intel
Developer
Forum
Spring 2001
Low Power Platform DesignLow Power Platform Design
StrategiesStrategies
Strategy #1 : Take full advantage of IntelStrategy #1 : Take full advantage of Intel’’ss
mobile processor and chipsetmobile processor and chipset
Strategy #2 : Enhance third party devices toStrategy #2 : Enhance third party devices to
support ACPI based power managementsupport ACPI based power management
Strategy #3 : Optimize platform powerStrategy #3 : Optimize platform power
deliverydelivery
Strategy #4 : Utilize display low powerStrategy #4 : Utilize display low power
management architecture and technologymanagement architecture and technology

Intel
Developer
Forum
Spring 2001
Strategy # 1Strategy # 1
Take full advantage of Intel CPUTake full advantage of Intel CPU
and Chipsetand Chipset
Processor power management optimizationProcessor power management optimization
Intel processor offers optimal power/frequencyIntel processor offers optimal power/frequency
scalabilityscalability
Fully utilize CPU low power featuresFully utilize CPU low power features
Working around C3 usage with bus masteringWorking around C3 usage with bus mastering
Chipset power management optimizationChipset power management optimization
Power Management Optimization for MXPower Management Optimization for MX
Power Management Optimization for ICHPower Management Optimization for ICH

Intel
Developer
Forum
Spring 2001
IntelIntel®® processor offers optimalprocessor offers optimal
power/frequency scalabilitypower/frequency scalability
Sub 1 volt and sub 1 W processor for miniSub 1 volt and sub 1 W processor for mini
and suband sub--notebook segmentsnotebook segments
0.975V ultra low power Pentium III at 300 MHz0.975V ultra low power Pentium III at 300 MHz
and 0.4W average power for battery mode.and 0.4W average power for battery mode.
1.1V, 500 MHz, 0.8W for performance mode using1.1V, 500 MHz, 0.8W for performance mode using
IntelIntel SpeedStepSpeedStepTMTM TechnologyTechnology
Strategy # 1: Processor Power Management OptimizationStrategy # 1: Processor Power Management Optimization
Intel® has sub 1.0 watt processors to
enable low power platform design
IntelIntel®® has sub 1.0 watt processors tohas sub 1.0 watt processors to
enable low power platform designenable low power platform design

Intel
Developer
Forum
Spring 2001
Fully Utilize CPU Low PowerFully Utilize CPU Low Power
FeaturesFeatures
Ensure correct C3 (deep sleep)Ensure correct C3 (deep sleep)
usageusage
CPU spends 65% of time in C3 duringCPU spends 65% of time in C3 during
ZDBLZDBL
Working around C3 usage with busWorking around C3 usage with bus
master activitymaster activity
Use IMVP (Intel Mobile VoltageUse IMVP (Intel Mobile Voltage
Positioning) for CPU supplyPositioning) for CPU supply
Full Utilize Key CPU Low Power FeaturesFull Utilize Key CPU Low Power FeaturesFull Utilize Key CPU Low Power Features

Intel
Developer
Forum
Spring 2001
Working around C3 usage withWorking around C3 usage with
bus master activitybus master activity
USB devicesUSB devices
SolutionSolution: long term solution is to enable: long term solution is to enable
selective suspend in the OS.selective suspend in the OS. Short termShort term
solution is to not embed USB devices on thesolution is to not embed USB devices on the
platform.platform.
AGP graphics controllersAGP graphics controllers
SolutionSolution: ensure your graphics controller is: ensure your graphics controller is
asserting AGP_BUSY# only when generatingasserting AGP_BUSY# only when generating
bus master cycles.bus master cycles.

Intel
Developer
Forum
Spring 2001
Working around C3 usage withWorking around C3 usage with
bus master activity (cont.)bus master activity (cont.)
Intel LAN (includingIntel LAN (including KinnereethKinnereeth,,
KinnerethKinnereth+, 82559)+, 82559)
SolutionSolution: when network cable is disconnected,: when network cable is disconnected,
disable 1 sec synchronization and put thedisable 1 sec synchronization and put the
controller in D3.controller in D3. PowerDownOnLinkLossPowerDownOnLinkLoss
feature MUST be enabledfeature MUST be enabled
Work with Intel to ensure proper usage of
processor low power states
Work with Intel to ensure proper usage ofWork with Intel to ensure proper usage of
processor low power statesprocessor low power states

Intel
Developer
Forum
Spring 2001
Using IMVP for CPU supplyUsing IMVP for CPU supply
IMVP* II
-Intelligent
regulator
reduces
Idle power Deeper
Sleep
Voltage
Deeper
Sleep
Quick
Start
Active Quick
Start
Deep
Sleep
Minimum
Operating
Voltage
Deep
Sleep
Voltage
Deep
Sleep
Quick
Start
Active Quick
Start
Deep
Sleep
Minimum
Operating
Voltage
Conventional
Regulator
-Constant
Voltage
Voltage Restored toVoltage Restored to
Maximum LevelMaximum Level
Min Voltage with Deep SleepMin Voltage with Deep Sleep
and Even Lower Voltage withand Even Lower Voltage with
Deeper SleepDeeper Sleep
Strategy # 1: processor Power Management OptimizationStrategy # 1: processor Power Management Optimization
Attend IDF session MOBS166 to learn
more about IMVP technology
Attend IDF session MOBS166 to learnAttend IDF session MOBS166 to learn
more about IMVP technologymore about IMVP technology

Intel
Developer
Forum
Spring 2001
MX Chipset OptimizationMX Chipset Optimization
440MX chipset (integrated DX + PIIX4E)440MX chipset (integrated DX + PIIX4E)
supports performance and value for bothsupports performance and value for both
mini and submini and sub--notebook segments.notebook segments.
440MX Power Optimization Checklist:440MX Power Optimization Checklist:
Enable dynamic clock gating (GCLKEN bit 2)Enable dynamic clock gating (GCLKEN bit 2)
Enable dynamic SDRAM power down (PDSE bit 7)Enable dynamic SDRAM power down (PDSE bit 7)
Enable PCI CLKRUN# and quiet mode serial IRQ (PCNTRLEnable PCI CLKRUN# and quiet mode serial IRQ (PCNTRL
bit 13, SERIRQC bit 6)bit 13, SERIRQC bit 6)
Enable DRAMEnable DRAM--MD Clamp Disable (BXBT bits [5:4])MD Clamp Disable (BXBT bits [5:4])
Enable GTL Clamp Disable (BXBT bits [1:0])Enable GTL Clamp Disable (BXBT bits [1:0])
Enable GTL Data Buffer power down feature (PMCR bits 5,7)Enable GTL Data Buffer power down feature (PMCR bits 5,7)
Ensure all power management signals are enabledEnsure all power management signals are enabled
–– GENCFG bits [22:21], [19:17] = 0GENCFG bits [22:21], [19:17] = 0
Strategy # 1: Chipset Power Management OptimizationStrategy # 1: Chipset Power Management Optimization

Intel
Developer
Forum
Spring 2001
ICH Chipsets OptimizationICH Chipsets Optimization
Strategy # 1: Chipset Power Management OptimizationStrategy # 1: Chipset Power Management Optimization
Chipset Power ManagementChipset Power Management
Optimization for ICH2/3Optimization for ICH2/3--M:M:
Enable dynamic SDRAM power downEnable dynamic SDRAM power down
(C3STATUS bit 16 = 1)(C3STATUS bit 16 = 1)
Enable PCI CLKRUN# and quiet mode serialEnable PCI CLKRUN# and quiet mode serial
IRQ (GEN_PMCON1 bit 2 = 1, SERIRQ_CNTIRQ (GEN_PMCON1 bit 2 = 1, SERIRQ_CNT
bit 6 = 0)bit 6 = 0)
Work with Intel to optimize the usage of
chipset low power features
Work with Intel to optimize the usage ofWork with Intel to optimize the usage of
chipset low power featureschipset low power features

Intel
Developer
Forum
Spring 2001
Enhance third party device toEnhance third party device to
support ACPI low power statessupport ACPI low power states
Platform Idle Power ConsumptionPlatform Idle Power Consumption
HDD Power ManagementHDD Power Management
Device Power ManagementDevice Power Management

Intel
Developer
Forum
Spring 2001
CPU in C3 alreadyCPU in C3 already
when system is idlewhen system is idle
Very few devicesVery few devices
powered managedpowered managed
in S0in S0 ““runningrunning””
system statesystem state
Some devicesSome devices
logically enter D3,logically enter D3,
but power didnbut power didn’’tt
dropdrop
Graphics needs DGraphics needs D
state modificationstate modification
Platform Idle Power ConsumptionPlatform Idle Power Consumption
Strategy # 2: Enhance Third Party Device to Support Low Power ACStrategy # 2: Enhance Third Party Device to Support Low Power ACPI StatePI State
CPU consumes ~1% of platform power during idle
Significant room for improvement for TPV devices
CPU consumes ~1% of platform power during idleCPU consumes ~1% of platform power during idle
Significant room for improvement for TPV devicesSignificant room for improvement for TPV devices
0 1 2 3 4 5
LCD 15"
GFX
BX
Power Supply Loss
HDD
PIIX4
Audio/Modem
PIII 600MHz 1.3V
Card Bus
I/O subsystem
Forced into D3
No application
W

Intel
Developer
Forum
Spring 2001
HDD Power ManagementHDD Power Management
Current ACPI operating systems use onlyCurrent ACPI operating systems use only
the D0 and D3 device power statesthe D0 and D3 device power states
HDD power management policy isHDD power management policy is ““timetime--
basedbased””, not, not ““demanddemand--basedbased””
ACPI 2.0 device class powerACPI 2.0 device class power
management specs allowmanagement specs allow ““Motor OFFMotor OFF”” inin
the D0 power statethe D0 power state
Work with your vendors to enable improved
ACPI-based HDD power management
Work with your vendors to enable improvedWork with your vendors to enable improved
ACPIACPI--based HDD power managementbased HDD power management

Intel
Developer
Forum
Spring 2001
HDD Power Management (cont.)HDD Power Management (cont.)
ConventionalConventional
3 power levels3 power levels
Entered by fixed times sinceEntered by fixed times since
last accesslast access
Idle mode typically fixed byIdle mode typically fixed by
HDDHDD
AdaptiveAdaptive
SelfSelf--managed mode entrymanaged mode entry
Device specific power levelDevice specific power level
Adjustable behavior: energyAdjustable behavior: energy
vs. performancevs. performance
POWER(WATTS)
3
2
1
0
Inactive
No Delay
Adaptive
(Fast) Adaptive
(Medium) Adaptive
(Slow)
PERF.IDLE
ACTIVE
FAST
IDLE
LOW POWER
IDLE STANDBY
TIME (s) TIME (m)
POWER(WATTS)
3
2
1
0
Command
Burst Ends
Command
Burst Ends
ACTIVE
IDLE
STANDBY
0
0
5
5
10
10
5
5
10
10
Wait 5 seconds
Wait 5
minutes
Inactive
FULL
POWER
Convent ional
Adapt ive
Adaptive approach improves idle powerAdaptive approach improves idle powerAdaptive approach improves idle power
Source: IBM

Intel
Developer
Forum
Spring 2001
Device Power ManagementDevice Power Management
Windows* 2000 implements ACPIWindows* 2000 implements ACPI--based device powerbased device power
managementmanagement
Does not support APMDoes not support APM
ACPI support is required for system logoACPI support is required for system logo
Work with your IHV to develop device drivers thatWork with your IHV to develop device drivers that
implement ACPIimplement ACPI--defined interfaces including devicedefined interfaces including device
power states and device performance states:power states and device performance states:
Smart battery system managerSmart battery system manager
LCD brightness controls (_BCL, _BCM)LCD brightness controls (_BCL, _BCM)
Dynamic device power down (graphics, DVD and SIO, etc.)Dynamic device power down (graphics, DVD and SIO, etc.)
Make all your devices ACPI 2.0 compliant !Make all your devices ACPI 2.0 compliant !Make all your devices ACPI 2.0 compliant !

Intel
Developer
Forum
Spring 2001
Optimize Platform Power DeliveryOptimize Platform Power Delivery
Mobile Power System OverviewMobile Power System Overview
HDD Power Reduction throughHDD Power Reduction through
Hardware ControlHardware Control
Single stage power conversion forSingle stage power conversion for
LCD analog powerLCD analog power
Improve CCFL LCD lightingImprove CCFL LCD lighting

Intel
Developer
Forum
Spring 2001
Mobile Power Distribution OverviewMobile Power Distribution Overview
AC/DC
Charger
VDC
CCFL Inverter
CPU VTT
CPU CLK
Low-Voltage
Pentium-III
CPU Core
Main 3.3V
MemMX Clk
Main 5.0V
FDDHDD DVD Mode
m
Fan
LCD Lighting
Gfx
Strategy # 3: Optimize Platform Power DeliveryStrategy # 3: Optimize Platform Power Delivery
Opportunities exist to improve power
distribution efficiency
Opportunities exist to improve powerOpportunities exist to improve power
distribution efficiencydistribution efficiency
2p x 3s Li-Ion
9-13.2V
11.1V Nom
16V Adapter
Large Mosfet Switching Loss
Large Ripple Current
Line Regulation Control
Supporting multi-component
Difficult to maintain Load
Regulation
30-40% PTOTAL Max
High Xfmr DC Loss
Small Dimming Range

Intel
Developer
Forum
Spring 2001
Battery StackBattery Stack--up Optimizationup Optimization
Using 3p x 2s LiUsing 3p x 2s Li--IonIon
Same 38.88WHr capacity @ 7.2V nomSame 38.88WHr capacity @ 7.2V nom
6V min & 8.4V max (~ 10V w/ AC/DC)6V min & 8.4V max (~ 10V w/ AC/DC)
More Efficient Power ConversionMore Efficient Power Conversion
90 % for CPU Core Rail90 % for CPU Core Rail
> 90% for 3.3V & 5.0V rails> 90% for 3.3V & 5.0V rails
5% Longer Battery Life5% Longer Battery Life
Optimized Battery Configuration Increases
Battery Life
Optimized Battery Configuration IncreasesOptimized Battery Configuration Increases
Battery LifeBattery Life

Intel
Developer
Forum
Spring 2001
HDD Power ReductionHDD Power Reduction
HDD consumes ~1 W during battery lifeHDD consumes ~1 W during battery life
testing, ~ 50% each for 5Vtesting, ~ 50% each for 5V--motor and 5Vmotor and 5V--logiclogic
HDD converts 5.0V to 3.3V (or lower) forHDD converts 5.0V to 3.3V (or lower) for
““logic digitallogic digital”” componentscomponents
5V to 3.3V linear regulator is 60% efficient5V to 3.3V linear regulator is 60% efficient
~ 200mW battery power wasted~ 200mW battery power wasted
Power HDD logic components with 3.3V rail
to reduce power dissipation
Power HDD logic components with 3.3V railPower HDD logic components with 3.3V rail
to reduce power dissipationto reduce power dissipation

Intel
Developer
Forum
Spring 2001
HW Power Reduction IdeasHW Power Reduction Ideas -- HDDHDD
Interface
Connector
Motor
Drive
3.3V Linear
Regulator
3.3V Logic
Component
Storage
Element
5V-Motor
5V-Logic
Interface
Connector
Motor
Drive Proposal to
power logic rail
with 3.3V
3.3V Logic
Component
Storage
Element
5V-Motor
3.3V-Logic
Conventional

Intel
Developer
Forum
Spring 2001
LCD Panel
Data Drv Data Drv Data Drv Data Drv
Column/Data
Board
LCD
Controller
Grey & BP Voltage
Generator
4.5V
Boost
VR
GateDrvGateDrvGateDrv
2x
Charge
-Pump
Invert
Charge
-Pump
2x
Charge
-Pump
Gate/Ro
w
Driver
VCC = 3.3V
Cold Cathod Flourescent Lamp (CCFL)
Backlight
Inverter
Battery
PANALO
G
Analog Input Power > 80% total LCD Panel PowerAnalog Input Power > 80% total LCD Panel Power
4.5V Boost VR Efficiency ~ 85%4.5V Boost VR Efficiency ~ 85%
HW Power Reduction IdeasHW Power Reduction Ideas -- LCDLCD
Optimize Power Partition to reduce Power DissipationOptimize Power Partition to reduce Power DissipationOptimize Power Partition to reduce Power Dissipation

Intel
Developer
Forum
Spring 2001
HW Power Reduction IdeasHW Power Reduction Ideas -- LCDLCD
SingleSingle--Stage Power Conversion Efficiency = 90%Stage Power Conversion Efficiency = 90%
LCD Panel converts battery voltage to 4.5V directlyLCD Panel converts battery voltage to 4.5V directly
Buck (StepBuck (Step--Down) VR is more efficient than BoostDown) VR is more efficient than Boost
(Step(Step--Up)Up)
Main 3.3V VR
85% Efficient
To System
4.5V Boost VR
86% Efficient
LCD
Panel
LCD OFF
4.5V Buck VR
90% Efficient
LCD Panel
Battery
Battery
Optimize Power Partition to reduce power
dissipation by ~ 20%
Optimize Power Partition to reduce powerOptimize Power Partition to reduce power
dissipation by ~ 20%dissipation by ~ 20%

Intel
Developer
Forum
Spring 2001
CCFL LCD LightingCCFL LCD Lighting
Highest Power DissipationHighest Power Dissipation
>30% of Total Platform Power>30% of Total Platform Power
Inverter efficiency is ~ 80%Inverter efficiency is ~ 80%
Thinner Platform requires lowThinner Platform requires low--height transformerheight transformer
–– Small wire diameter due ~ 7mm max heightSmall wire diameter due ~ 7mm max height
Most power loss incurred in transformer windingMost power loss incurred in transformer winding
with high DC resistancewith high DC resistance
Transformer Loss accounts for ~ 70% total lossTransformer Loss accounts for ~ 70% total loss

Intel
Developer
Forum
Spring 2001
CCFL LCD Lighting Continue..CCFL LCD Lighting Continue..
Excellent display performance and lowExcellent display performance and low--
power demands large dimming rangepower demands large dimming range
Ultra LowUltra Low--Power State requires lowerPower State requires lower
minimum lamp currentminimum lamp current
““Lamp ThermometerLamp Thermometer”” effect will limit the lowesteffect will limit the lowest
lamp currentlamp current
““DigitalDigital”” oror ““LowLow--FrequencyFrequency”” Dimming techniqueDimming technique
can helpcan help
Optimize Inverter Design to increase
Battery Life
Optimize Inverter Design to increaseOptimize Inverter Design to increase
Battery LifeBattery Life

Intel
Developer
Forum
Spring 2001
Low power display ArchitectureLow power display Architecture
and technologyand technology
ArchitectureArchitecture
Automatic backlight controlAutomatic backlight control
Smart computerSmart computer--humanhuman--interface tointerface to
reduce LCD powerreduce LCD power
TechnologyTechnology
DisplayDisplay materialsmaterials
Display cell constructionDisplay cell construction
Driving schemesDriving schemes
ElectroElectro--Optical PerformanceOptical Performance

Intel
Developer
Forum
Spring 2001
Auto Backlight ControlAuto Backlight Control
LCD Lighting consumes ~30LCD Lighting consumes ~30--40 % of Total40 % of Total
Platform PowerPlatform Power
Optimize the NitsOptimize the Nits--perper--Watts CurveWatts Curve
Luminance is proportional to Power ConsumptionLuminance is proportional to Power Consumption
Dim brightness level to extend battery lifeDim brightness level to extend battery life
Use sensing method to automatically reduceUse sensing method to automatically reduce
brightness to reduce power dissipationbrightness to reduce power dissipation
Strategy # 4: Low Power Display ArchitectureStrategy # 4: Low Power Display Architecture
Extend Battery Life by > 1Hr using
Minimum Brightness setting
Extend Battery Life by > 1Hr using
Minimum Brightness setting

Intel
Developer
Forum
Spring 2001
LCD Power ManagementLCD Power Management
LCD powerLCD power is controlled now by a useris controlled now by a user
selectable inactivity timeout period in the BIOSselectable inactivity timeout period in the BIOS
registerregister
Timeout period is counted from the lastTimeout period is counted from the last
interrupt generated by keyboard or mouseinterrupt generated by keyboard or mouse
activityactivity
Short timeout setting will shut off LCD at anShort timeout setting will shut off LCD at an
inappropriate timeinappropriate time
Long timeout setting will result in unnecessaryLong timeout setting will result in unnecessary
LCD power consumption during an actualLCD power consumption during an actual
period of disuseperiod of disuse

Intel
Developer
Forum
Spring 2001
Smart ComputerSmart Computer--HumanHuman--InterfaceInterface
to reduce LCD powerto reduce LCD power
Basic set up: 1Basic set up: 1 -- Laptop NB, 2Laptop NB, 2 -- Video Camera, 3Video Camera, 3 -- LCD, 4LCD, 4 -- UserUser
2
1
3
1
4
3
2

Intel
Developer
Forum
Spring 2001
Smart ComputerSmart Computer--HumanHuman--InterfaceInterface
to reduce LCD powerto reduce LCD power (cont.)(cont.)
Computer vision technology based on video
camera enables new method of controlling
LCD power states by monitoring real time
user’s presence
If no user presence is found, the LCD is turned
Off

Intel
Developer
Forum
Spring 2001
Smart ComputerSmart Computer--HumanHuman--Interface to reduceInterface to reduce
LCD power (cont.)LCD power (cont.)
Significant power saving depending on the user
behavior
Significant power saving depending on the userSignificant power saving depending on the user
behaviorbehavior

Intel
Developer
Forum
Spring 2001
Low Power Display TechnologyLow Power Display Technology
DisplayDisplay materialsmaterials
Display cell constructionDisplay cell construction
Driving schemesDriving schemes
ElectroElectro--Optical PerformanceOptical Performance

Intel
Developer
Forum
Spring 2001
Potential Low Power DisplayPotential Low Power Display
MaterialsMaterials
Strategy # 4: Low Power Display TechnologyStrategy # 4: Low Power Display Technology
Low Power CostMateial
Candidates Now In 5 yrs Now In 5 yrs
Backlight
Needed
Bistability
Commercial
Ready
OLED (Organic
LED)
?? Y Hi Lo No No No
TNLC –
Transmissive
No No Lo Lo Y No Y
FLC No No Hi Lo? Y Y No
ChLC Y Y Hi Lo No Y ~Y
PDLC –
Transmissive
No No Lo Lo Y No ~Y
Electrophorectics Y Y Hi Lo No Y No
Electrochromics Y Y Hi Lo? No No No
Specify material technology can lead to
lower power consumption
Specify material technology can lead toSpecify material technology can lead to
lower power consumptionlower power consumption

Intel
Developer
Forum
Spring 2001
Typical AM LC Display StructureTypical AM LC Display Structure

Intel
Developer
Forum
Spring 2001
Low Power Attributes of LC MaterialLow Power Attributes of LC Material
ViscosityViscosity
Dielectric ConstantsDielectric Constants
Refractive IndexRefractive Index
Transition Temperature RangeTransition Temperature Range
-+
Amount of LC Material used: Cell GapAmount of LC Material used: Cell Gap
Performance Related PropertiesPerformance Related Properties
Optimize low power materials with display vendorsOptimize low power materials with display vendorsOptimize low power materials with display vendors
For Low Power
= decrease values
= increase values

Intel
Developer
Forum
Spring 2001
Cell GapCell Gap –– Amount of material usedAmount of material used
Coatings TransmittanceCoatings Transmittance
–– e.g. ITO (Indium Tin Oxide)e.g. ITO (Indium Tin Oxide)
Optical FilmsOptical Films
–– PolarizersPolarizers -- ContrastContrast
–– Retardation filmRetardation film -- Color, Brightness,Color, Brightness,
ContrastContrast
–– Alignment LayerAlignment Layer -- Viewing angleViewing angle
–– Light Guide / SourceLight Guide / Source -- Brightness,Brightness,
UniformityUniformity
Low Power related DisplaysLow Power related Displays
Construction ParametersConstruction Parameters
Low power depends on display constructionLow power depends on display constructionLow power depends on display construction
For Low Power
= decrease values
= increase values

Intel
Developer
Forum
Spring 2001
Low Power Display PackagingLow Power Display Packaging
Front
Light
R-LCD w Front LightR-LCD w Front Light
Polarizer
Optical films
Color
filter
ITO
Metal
electrode
Back light
Glass
Glass
Glass
Glass
LC layer
Transmissive ModeTransmissive Mode Transflective ModeTransflective Mode

Intel
Developer
Forum
Spring 2001
Low Power Display Characteristics
Paper
Reflective
PassiveLCD
Transmissve
Backlit LCD
Bistable
Contrast
7-10:1
newspaper
20 :1 laser print
~5 : 1
0 to >100:1
depending on
ambient
20 – 30 : 1
View Angle All Narrow Selective All
Full Color Yes Off / No Yes Yes/No
Reflection Type Lambertian Highly specular Transmissive Near
Lambertian
Flexibility Yes No No Plastic /
moderate
Response Time -- 20 ms 20 ms 30 – 100 ms
Driving Voltage -- < 5V < 5V 40V
Drive Scheme -- Active Active Passive
Multiplexing
Capability
-- Low Low High
Substrates (Wt) -- Glass Glass Glass / Plastic
Battery Lifetime
@1min/page
-- 18 hrs 2 hrs
340 hrs(1min/pg)
680 hrs(2min/pg)
Availability Commercial Commercial Commercial Demo(arranged)
Low power depends on display applicationsLow power depends on display applications

Intel
Developer
Forum
Spring 2001
SummarySummary
Battery life is a platform issueBattery life is a platform issue
Intel CPU is optimized for low power designIntel CPU is optimized for low power design
Great power reduction opportunity in theGreat power reduction opportunity in the
third party componentsthird party components
Pay attentions to platform power distributionPay attentions to platform power distribution
Look for the best match in displayLook for the best match in display
technologytechnology
Low power design requires industrialLow power design requires industrial
collaborationcollaboration

Intel
Developer
Forum
Spring 2001
Call to ActionCall to Action
Take full advantage of Intel processor andTake full advantage of Intel processor and
chipset for your next designchipset for your next design
Work with your TPV to enhance deviceWork with your TPV to enhance device
power management under ACPIpower management under ACPI
Optimize your platform power deliveryOptimize your platform power delivery
Improve your display architecture andImprove your display architecture and
technology to save powertechnology to save power
Look for power reduction opportunity in theLook for power reduction opportunity in the
third party componentthird party component

Intel
Developer
Forum
Spring 2001
Low Power Display DemoLow Power Display Demo
Smart computerSmart computer--humanhuman--interface tointerface to
reduce LCD powerreduce LCD power
Automatic backlight control withAutomatic backlight control with
ambient light sensorambient light sensor
A low power biA low power bi--stable full color displaystable full color display

Intel
Developer
Forum
Spring 2001
CollateralCollateral
Banister Component Specification, Rev 1.0Banister Component Specification, Rev 1.0
Adaptive Battery Life Extender: (whiteAdaptive Battery Life Extender: (white
paper)paper)
http://www.storage.ibm.com/hardsoft/diskdrdl/library/techhttp://www.storage.ibm.com/hardsoft/diskdrdl/library/tech
nolo.htmnolo.htm
Backlight InverterBacklight Inverter
LowLow--Frequency DimmingFrequency Dimming
–– Texas Instrument UCC3972Texas Instrument UCC3972
Digital DimmingDigital Dimming
–– LinfinityLinfinity LXM161LXM161

Developing Low Power Mobile Platform

More Related Content

What's hot (20)

Similar to Developing Low Power Mobile Platform (20)

Recently uploaded (20)

Developing Low Power Mobile Platform