Digital electronics

Basics of Electronics

Electronics
Relationship between Voltage, Current Resistance

All materials are made up from atoms, and all atoms consist of protons, neutrons and electrons. Protons, have a
positive electrical charge. Neutrons have no electrical charge while Electrons, have a negative electrical charge.
Atoms are bound together by powerful forces of attraction existing between the atoms nucleus and the electrons
in its outer shell. When these protons, neutrons and electrons are together within the atom they are happy and
stable. However, if we separate them they exert a potential of attraction called a potential difference. If we
create a circuit or conductor for the electrons to drift back to the protons the flow of electrons is called a current.
The electrons do not flow freely through the circuit, the restriction to this flow is called resistance. Then all
basic electrical or electronic circuit consists of three separate but very much related quantities, Voltage, ( v ),
Current, ( i ) and Resistance, ( Ω ).

Voltage
Voltage, ( V ) is the potential energy of an electrical supply stored in the form of an electrical charge. Voltage
can be thought of as the force that pushes electrons through a conductor and the greater the voltage the greater is
its ability to "push" the electrons through a given circuit. As energy has the ability to do work this potential
energy can be described as the work required in joules to move electrons in the form of an electrical current
around a circuit from one point or node to another. The difference in voltage between any two nodes in a circuit
is known as the Potential Difference, p.d. sometimes called Voltage Drop.

The Potential difference between two points is measured in Volts with the circuit symbol V, or lowercase "v",
although Energy, E lowercase "e" is sometimes used. Then the greater the voltage, the greater is the pressure (or
pushing force) and the greater is the capacity to do work.

A constant voltage source is called a DC Voltage with a voltage that varies periodically with time is called an
AC voltage. Voltage is measured in volts, with one volt being defined as the electrical pressure required to force
an electrical current of one ampere through a resistance of one Ohm. Voltages are generally expressed in Volts
with prefixes used to denote sub-multiples of the voltage such as microvolts ( μV = 10-6 V ), millivolts ( mV =
10-3 V ) or kilovolts ( kV = 103 V ). Voltage can be either positive or negative.

Batteries or power supplies are mostly used to produce a steady D.C. (direct current) voltage source such as 5v,
12v, 24v etc in electronic circuits and systems. While A.C. (alternating current) voltage sources are available for
domestic house and industrial power and lighting as well as power transmission. The mains voltage supply in
the United Kingdom is currently 230 volts a.c. and 110 volts a.c. in the USA. General electronic circuits operate
on low voltage DC battery supplies of between 1.5V and 24V d.c. The circuit symbol for a constant voltage
source usually given as a battery symbol with a positive, + and negative, - sign indicating the direction of the
polarity. The circuit symbol for an alternating voltage source is a circle with a sine wave inside.

Voltage Symbols
A simple relationship can be made between a tank of water and a voltage supply. The higher the water tank
above the outlet the greater the pressure of the water as more energy is released, the higher the voltage the
greater the potential energy as more electrons are released. Voltage is always measured as the difference
between any two points in a circuit and the voltage between these two points is generally referred to as the
"Voltage drop". Any voltage source whether DC or AC likes an open or semi-open circuit condition but hates
any short circuit condition as this can destroy it.

Electrical Current
Electrical Current, ( I ) is the movement or flow of electrical charge and is measured in Amperes, symbol i, for
intensity). It is the continuous and uniform flow (called a drift) of electrons (the negative particles of an atom)
around a circuit that are being "pushed" by the voltage source. In reality, electrons flow from the negative (-ve)
terminal to the positive (+ve) terminal of the supply and for ease of circuit understanding conventional current
flow assumes that the current flows from the positive to the negative terminal. Generally in circuit diagrams the
flow of current through the circuit usually has an arrow associated with the symbol, I, or lowercase i to indicate
the actual direction of the current flow. However, this arrow usually indicates the direction of conventional
current flow and not necessarily the direction of the actual flow.

In electronic circuits, a current source is a circuit element that provides a specified amount of current for
example, 1A, 5A 10 Amps etc, with the circuit symbol for a constant current source given as a circle with an
arrow inside indicating its direction. Current is measured in Amps and an amp or ampere is defined as the
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number of electrons or charge (Q in Coulombs) passing a certain point in the circuit in one second, (t in
Seconds). Current is generally expressed in Amps with prefixes used to denote micro amps ( μA = 10-6A ) or
milli amps ( mA = 10-3A ). Note that electrical current can be either positive in value or negative in value
depending upon its direction of flow.

Current that flows in a single direction is called Direct Current, or D.C. and current that alternates back and
forth through the circuit is known as Alternating Current, or A.C.. Whether AC or DC current only flows
through a circuit when a voltage source is connected to it with its "flow" being limited to both the resistance of
the circuit and the voltage source pushing it. Also, as AC currents (and voltages) are periodic and vary with
time the "effective" or "RMS", (Root Mean Squared) value given as Irms produces the same average power loss
equivalent to a DC current Iaverage . Current sources are the opposite to voltage sources in that they like short
or closed circuit conditions but hate open circuit conditions as no current will flow.

Resistance
The Resistance, ( R ) of a circuit is its ability to resist or prevent the flow of current (electron flow) through
itself making it necessary to apply a greater voltage to the electrical circuit to cause the current to flow again.
Resistance is measured in Ohms, Greek symbol ( Ω, Omega ) with prefixes used to denote Kilo-ohms ( kΩ =
103Ω ) and Mega-ohms ( MΩ = 106Ω ). Note that Resistance cannot be negative in value only positive.

Resistance can be linear in nature or non-linear in nature. Linear resistance obeys Ohm's Law and controls or
limits the amount of current flowing within a circuit in proportion to the voltage supply connected to it and
therefore the transfer of power to the load. Non-linear resistance, does not obey Ohm's Law but has a voltage
drop across it that is proportional to some power of the current. Resistance is pure and is not affected by
frequency with the AC impedance of a resistance being equal to its DC resistance and as a result can not be
negative. resistance is always positive. Also, resistance is an attenuator which has the ability to change the
characteristics of a circuit by the effect of load resistance or by temperature which changes its resistivity.
For very low values of resistance, for example milli-ohms, ( mΩ´s ) it is sometimes more easier to use the
reciprocal of resistance ( 1/R ) rather than resistance ( R ) itself. The reciprocal of resistance is called
Conductance, symbol ( G ) and represents the ability of a conductor or device to conduct electricity. In other
words the ease by which current flows. High values of conductance implies a good conductor such as copper
while low values of conductance implies a bad conductor such as wood. The standard unit of measurement
given for conductance is the Siemen, symbol (S).
Quantity Symbol Unit of Measure Abbreviation

Voltage V or E Volt V
Current I Amp A
Resistance R Ohms Ω

Ohms Law
The relationship between Voltage, Current and Resistance in any DC electrical circuit was firstly discovered by
the German physicist Georg Ohm, (1787 - 1854). Georg Ohm found that, at a constant temperature, the
electrical current flowing through a fixed linear resistance is directly proportional to the voltage applied across
it, and also inversely proportional to the resistance. This relationship between the Voltage, Current and
Resistance forms the bases of Ohms Law and is shown below.

Ohms Law Relationship

By knowing any two values of the Voltage, Current or Resistance quantities we can use Ohms Law to find the
third missing value. Ohms Law is used extensively in electronics formulas and calculations so it is "very
important to understand and accurately remember these formulas".
To find the Voltage, ( V )
[V=IxR] V (volts) = I (amps) x R (Ω)

To find the Current, ( I )
[I=V÷R] I (amps) = V (volts) ÷ R (Ω)

To find the Resistance, ( R )
[R=V÷I] R (Ω) = V (volts) ÷ I (amps)

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It is sometimes easier to remember Ohms law relationship by using pictures. Here the three quantities of V, I
and R have been superimposed into a triangle (affectionately called the Ohms Law Triangle) giving voltage at
the top with current and resistance at the bottom. This arrangement represents the actual position of each
quantity in the Ohms law formulas.

Ohms Law Triangle

and transposing the above equation gives us the following combinations of the same equation:

Then by using Ohms Law we can see that a voltage of 1V applied to a resistor of 1Ω will cause a current of 1A
to flow and the greater the resistance, the less current will flow for any applied voltage. Any Electrical device or
component that obeys "Ohms Law" that is, the current flowing through it is proportional to the voltage across it
(I α V), such as resistors or cables, are said to be "Ohmic" in nature, and devices that do not, such as transistors
or diodes, are said to be "Non-ohmic" devices.

Power in Electrical Circuits

Electrical Power, (P) in a circuit is the amount of energy that is absorbed or produced within the circuit. A
source of energy such as a voltage will produce or deliver power while the connected load absorbs it. The
quantity symbol for power is P and is the product of voltage multiplied by the current with the unit of
measurement being the Watt (W) with prefixes used to denote milliwatts (mW = 10-3W) or kilowatts (kW =
103W). By using Ohm's law and substituting for V, I and R the formula for electrical power can be found as:

To find the Power (P)

[P=VxI] P (watts) = V (volts) x I (amps) Also,
[ P = V ÷ R ] P (watts) = V2 (volts) ÷ R (Ω) Also,
2

[ P = I2 x R ] P (watts) = I2 (amps) x R (Ω)
Again, the three quantities have been superimposed into a triangle this time called the Power Triangle with
power at the top and current and voltage at the bottom. Again, this arrangement represents the actual position of
each quantity in the Ohms law power formulas.

The Power Triangle

One other point about Power, if the calculated power is positive in value for any formula the component absorbs
the power, but if the calculated power is negative in value the component produces power, in other words it is a
source of electrical energy. Also, we now know that the unit of power is the WATT but some electrical devices
such as electric motors have a power rating in Horsepower or hp. The relationship between horsepower and
watts is given as: 1hp = 746W.

Ohms Law Pie Chart

We can now take all the equations from above for finding Voltage, Current, Resistance and Power and
condense them into a simple Ohms Law pie chart for use in DC circuits and calculations.

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Ohms Law Pie Chart

Example No1

For the circuit shown below find the Voltage (V), the Current (I), the Resistance (R) and the Power (P).

Voltage [ V = I x R ] = 2 x 12Ω = 24V
Current [ I = V ÷ R ] = 24 ÷ 12Ω = 2A
Resistance [ R = V ÷ I ] = 24 ÷ 2 = 12 Ω
Power [ P = V x I ] = 24 x 2 = 48W

Power within an electrical circuit is only present when BOTH voltage and current are present for example, In
an Open-circuit condition, Voltage is present but there is no current flow I = 0 (zero), therefore V x 0 is 0 so the
power dissipated within the circuit must also be 0. Likewise, if we have a Short-circuit condition, current flow
is present but there is no voltage V = 0, therefore 0 x I = 0 so again the power dissipated within the circuit is 0.

As electrical power is the product of V x I, the power dissipated in a circuit is the same whether the circuit
contains high voltage and low current or low voltage and high current flow. Generally, power is dissipated in
the form of Heat (heaters), Mechanical Work such as motors, etc Energy in the form of radiated (Lamps) or
as stored energy (Batteries).

Energy in Electrical Circuits

Electrical Energy that is either absorbed or produced is the product of the electrical power measured in Watts
and the time in Seconds with the unit of energy given as Watt-seconds or Joules.

Although electrical energy is measured in Joules it can become a very large value when used to calculate the
energy consumed by a component. For example, a single 100 W light bulb connected for one hour will consume
a total of 100 watts x 3600 sec = 360,000 Joules. So prefixes such as kilojoules (kJ = 103J) or megajoules (MJ
= 106J) are used instead. If the electrical power is measured in "kilowatts" and the time is given in hours then
the unit of energy is in kilowatt-hours or kWh which is commonly called a "Unit of Electricity" and is what
consumers purchase from their electricity suppliers.

Electrical Units of Measure

The standard SI units used for the measurement of voltage, current and resistance are the Volt [ V ], Ampere
[ A ] and Ohms [ Ω ] respectively. Sometimes in electrical or electronic circuits and systems it is necessary to
use multiples or sub-multiples (fractions) of these standard units when the quantities being measured are very
large or very small. The following table gives a list of some of the standard units used in electrical formulas and
component values.

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Standard Electrical Units

Parameter Symbol Measuring Unit Description

Voltage Volt V or E Unit of Electrical Potential V = I × R
Current Ampere I or i Unit of Electrical Current I = V ÷ R
Resistance Ohm R or Ω Unit of DC Resistance R = V ÷ I
Conductance Siemen G or ℧ Reciprocal of Resistance G = 1 ÷ R
Capacitance Farad C Unit of Capacitance C = Q ÷ V
Charge Coulomb Q Unit of Electrical Charge Q = C × V
Inductance Henry L or H Unit of Inductance VL = -L(di/dt)
Power Watts W Unit of Power P = V × I or I2 × R
Impedance Ohm Z Unit of AC Resistance Z2 = R2 + X2
Frequency Hertz Hz Unit of Frequency ƒ = 1 ÷ T
Multiples and Sub-multiples

There is a huge range of values encountered in electrical and electronic engineering between a maximum value
and a minimum value of a standard electrical unit. For example, resistance can be lower than 0.01Ω's or higher
than 1,000,000Ω's. By using multiples and submultiple's of the standard unit we can avoid having to write too
many zero's to define the position of the decimal point. The table below gives their names and abbreviations.

Prefix Symbol Multiplier Power of Ten
Terra T 1,000,000,000,000 1012
Giga G 1,000,000,000 109
Mega M 1,000,000 106
kilo k 1,000 103
none none 1 100
centi c 1/100 10-2
milli m 1/1,000 10-3
micro µ 1/1,000,000 10-6
nano n 1/1,000,000,000 10-9
Pico P 1/1,000,000,000,000 10-12
So to display the units or multiples of units for Resistance, Current or Voltage we would use as an example:

1kV = 1 kilo-volt - which is equal to 1,000 Volts.
1mA = 1 milli-amp - which is equal to one thousandths (1/1000) of an Ampere.
47kΩ = 47 kilo-ohms - which is equal to 47 thousand Ohms.
100uF = 100 micro-farads - which is equal to 100 millionths (1/1,000,000) of a Farad.
1kW = 1 kilo-watt - which is equal to 1,000 Watts.
1MHz = 1 mega-hertz - which is equal to one million Hertz.
To convert from one prefix to another it is necessary to either multiply or divide by the difference between the
two values. For example, convert 1MHz into kHz.

Well we know from above that 1MHz is equal to one million (1,000,000) hertz and that 1kHz is equal to one
thousand (1,000) hertz, so one 1MHz is one thousand times bigger than 1kHz. Then to convert Mega-hertz into
Kilo-hertz we need to multiply mega-hertz by one thousand, as 1MHz is equal to 1000 kHz. Likewise, if we
needed to convert kilo-hertz into mega-hertz we would need to divide by one thousand. A much simpler and
quicker method would be to move the decimal point either left or right depending upon whether you need to
multiply or divide.

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As well as the "Standard" electrical units of measure shown above, other units are also used in electrical
engineering to denote other values and quantities such as:

• Wh − The Watt-Hour, The amount of electrical energy consumed in the circuit by a load of one watt
drawing power for one hour, eg a Light Bulb. It is commonly used in the form of kWh (Kilowatt-
hour) which is 1,000 watt-hours or MWh (Megawatt-hour) which is 1,000,000 watt-hours.

• dB − The Decibel, The decibel is a one tenth unit of the Bel (symbol B) and is used to represent gain
either in voltage, current or power. It is a logarithmic unit expressed in dB and is commonly used
to represent the ratio of input to output in amplifier, audio circuits or loudspeaker systems.
For example, the dB ratio of an input voltage (Vin) to an output voltage (Vout) is expressed as
20log10 (Vout/Vin). The value in dB can be either positive (20dB) representing gain or negative (-
20dB) representing loss with unity, ie input = output expressed as 0dB.

• θ− Phase Angle, The Phase Angle is the difference in degrees between the voltage waveform and the
current waveform having the same periodic time. It is a time difference or time shift and
depending upon the circuit element can have a "leading" or "lagging" value. The phase angle of a
waveform is measured in degrees or radians.

• ω− Angular Frequency, Another unit which is mainly used in a.c. circuits to represent the Phasor
Relationship between two or more waveforms is called Angular Frequency, symbol ω. This is a
rotational unit of angular frequency 2πƒ with units in radians per second, rads/s. The complete
revolution of one cycle is 360 degrees or 2π, therefore, half a revolution is given as 180 degrees or
π rad.
• τ− Time Constant, The Time Constant of an impedance circuit or linear first-order system is the time
it takes for the output to reach 63.7% of its maximum or minimum output value when subjected to
a Step Response input. It is a measure of reaction time.

Kirchoffs Circuit Law
We saw in the Resistors tutorial that a single equivalent resistance, ( RT ) can be found when two or more
resistors are connected together in either series, parallel or combinations of both, and that these circuits obey
Ohm's Law. However, sometimes in complex circuits such as bridge or T networks, we can not simply use
Ohm's Law alone to find the voltages or currents circulating within the circuit. For these types of calculations
we need certain rules which allow us to obtain the circuit equations and for this we can use Kirchoffs Circuit
Law.

In 1845, a German physicist, Gustav Kirchoff developed a pair or set of rules or laws which deal with the
conservation of current and energy within electrical circuits. These two rules are commonly known as: Kirchoffs
Circuit Laws with one of Kirchoffs laws dealing with the current flowing around a closed circuit, Kirchoffs
Current Law, (KCL) while the other law deals with the voltage sources present in a closed circuit, Kirchoffs
Voltage Law, (KVL).

Kirchoffs First Law - The Current Law, (KCL)
Kirchoffs Current Law or KCL, states that the "total current or charge entering a junction or node is exactly
equal to the charge leaving the node as it has no other place to go except to leave, as no charge is lost within
the node". In other words the algebraic sum of ALL the currents entering and leaving a node must be equal to
zero, I(exiting) + I(entering) = 0. This idea by Kirchoff is commonly known as the Conservation of Charge.

Kirchoffs Current Law

Here, the 3 currents entering the node, I1, I2, I3 are all positive in value and the 2 currents leaving the node, I4
and I5 are negative in value. Then this means we can also rewrite the equation as;

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I1 + I2 + I3 - I4 - I5 = 0

The term Node in an electrical circuit generally refers to a connection or junction of two or more current
carrying paths or elements such as cables and components. Also for current to flow either in or out of a node a
closed circuit path must exist. We can use Kirchoff's current law when analysing parallel circuits.

Kirchoffs Second Law - The Voltage Law, (KVL)

Kirchoffs Voltage Law or KVL, states that "in any closed loop network, the total voltage around the loop is
equal to the sum of all the voltage drops within the same loop" which is also equal to zero. In other words the
algebraic sum of all voltages within the loop must be equal to zero. This idea by Kirchoff is known as the
Conservation of Energy.

Kirchoffs Voltage Law

Starting at any point in the loop continue in the same direction noting the direction of all the voltage drops,
either positive or negative, and returning back to the same starting point. It is important to maintain the same
direction either clockwise or anti-clockwise or the final voltage sum will not be equal to zero. We can use
Kirchoff's voltage law when analyzing series circuits.

When analysing either DC circuits or AC circuits using Kirchoffs Circuit Laws a number of definitions and
terminologies are used to describe the parts of the circuit being analyzed such as: node, paths, branches, loops
and meshes. These terms are used frequently in circuit analysis so it is important to understand them.
Circuit - a circuit is a closed loop conducting path in which an electrical current flows.
Path - a line of connecting elements or sources with no elements or sources included more than once.
Node - a node is a junction, connection or terminal within a circuit were two or more circuit elements
are connected or joined together giving a connection point between two or more branches. A node is
indicated by a dot.
Branch - a branch is a single or group of components such as resistors or a source which are connected
between two nodes.
Loop - a loop is a simple closed path in a circuit in which no circuit element or node is encountered
more than once.
Mesh - a mesh is a single open loop that does not have a closed path. No components are inside a mesh.
Components are connected in series if they carry the same current.
Components are connected in parallel if the same voltage is across them.

Example No1
Find the current flowing in the 40Ω Resistor, R3

The circuit has 3 branches, 2 nodes (A and B) and 2 independent loops.

Using Kirchoffs Current Law, KCL the equations are given as;
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At node A : I1 + I2 = I3
At node B : I3 = I1 + I2
Using Kirchoffs Voltage Law, KVL the equations are given as;
Loop 1 is given as : 10 = R1 x I1 + R3 x I3 = 10I1 + 40I3
Loop 2 is given as : 20 = R2 x I2 + R3 x I3 = 20I2 + 40I3
Loop 3 is given as : 10 - 20 = 10I1 - 20I2
As I3 is the sum of I1 + I2 we can rewrite the equations as;
Eq. No 1 : 10 = 10I1 + 40(I1 + I2) = 50I1 + 40I2
Eq. No 2 : 20 = 20I2 + 40(I1 + I2) = 40I1 + 60I2
We now have two "Simultaneous Equations" that can be reduced to give us the value of both I1 and I2

Substitution of I1 in terms of I2 gives us the value of I1 as -0.143 Amps
Substitution of I2 in terms of I1 gives us the value of I2 as +0.429 Amps
As : I3 = I1 + I2
The current flowing in resistor R3 is given as : -0.143 + 0.429 = 0.286 Amps
and the voltage across the resistor R3 is given as : 0.286 x 40 = 11.44 volts
The negative sign for I1 means that the direction of current flow initially chosen was wrong, but never the less
still valid. In fact, the 20v battery is charging the 10v battery.

Application of Kirchoffs Circuit Laws

These two laws enable the Currents and Voltages in a circuit to be found, ie, the circuit is said to be "Analysed",
and the basic procedure for using Kirchoff's Circuit Laws is as follows:

1. Assume all voltages and resistances are given. ( If not label them V1, V2,... R1, R2, etc. )
2. Label each branch with a branch current. ( I1, I2, I3 etc. )
3. Find Kirchoff's first law equations for each node.
4. Find Kirchoff's second law equations for each of the independent loops of the circuit.
5. Use Linear simultaneous equations as required to find the unknown currents.

As well as using Kirchoffs Circuit Law to calculate the various voltages and currents circulating around a
linear circuit, we can also use loop analysis to calculate the currents in each independent loop which helps to
reduce the amount of mathematics required by using just Kirchoff's laws. In the next tutorial about DC Theory
we will look at Mesh Current Analysis to do just that.

Circuit Analysis

In the previous tutorial we saw that complex circuits such as bridge or T-networks can be solved using
Kirchoff's Circuit Laws. While Kirchoff´s Laws give us the basic method for analysing any complex electrical
circuit, there are different ways of improving upon this method by using Mesh Current Analysis or Nodal
Voltage Analysis that results in a lessening of the math's involved and when large networks are involved this
reduction in maths can be a big advantage.

For example, consider the circuit from the previous section.

Mesh Analysis Circuit

One simple method of reducing the amount of math's involved is to analyse the circuit using Kirchoff's Current
Law equations to determine the currents, I1 and I2 flowing in the two resistors. Then there is no need to calculate
the current I3 as its just the sum of I1 and I2. So Kirchhoff’s second voltage law simply becomes:
Equation No 1 : 10 = 50I1 + 40I2
Equation No 2 : 20 = 40I1 + 60I2
therefore, one line of math's calculation have been saved.

Mesh Current Analysis
A more easier method of solving the above circuit is by using Mesh Current Analysis or Loop Analysis which
is also sometimes called Maxwell´s Circulating Currents method. Instead of labeling the branch currents we

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need to label each "closed loop" with a circulating current. As a general rule of thumb, only label inside loops in
a clockwise direction with circulating currents as the aim is to cover all the elements of the circuit at least once.
Any required branch current may be found from the appropriate loop or mesh currents as before using
Kirchoff´s method.

For example: : i1 = I1 , i2 = -I2 and I3 = I1 - I2

We now write Kirchoff's voltage law equation in the same way as before to solve them but the advantage of this
method is that it ensures that the information obtained from the circuit equations is the minimum required to
solve the circuit as the information is more general and can easily be put into a matrix form.


These equations can be solved quite quickly by using a single mesh impedance matrix Z. Each element ON the
principal diagonal will be "positive" and is the total impedance of each mesh. Where as, each element OFF the
principal diagonal will either be "zero" or "negative" and represents the circuit element connecting all the
appropriate meshes. This then gives us a matrix of:

Where:
[ V ] gives the total battery voltage for loop 1 and then loop 2.
[ I ] states the names of the loop currents which we are trying to find.
[ R ] is called the resistance matrix.
and this gives I1 as -0.143 Amps and I2 as -0.429 Amps
As : I3 = I1 - I2
The current I3 is therefore given as: -0.143 - (-0.429) = 0.286 Amps
Which is the same value of 0.286 amps, we found using Kirchoff´s circuit law in the previous tutorial.

Mesh Current Analysis Summary.

This "look-see" method of circuit analysis is probably the best of all the circuit analysis methods with the basic
procedure for solving Mesh Current Analysis equations is as follows:

1. Label all the internal loops with circulating currents. (I1, I2, ...IL etc)
2. Write the [ L x 1 ] column matrix [ V ] giving the sum of all voltage sources in each loop.
3. Write the [ L x L ] matrix, [ R ] for all the resistances in the circuit as follows;
o R11 = the total resistance in the first loop.
o Rnn = the total resistance in the Nth loop.
o RJK = the resistance which directly joins loop J to Loop K.
4. Write the matrix or vector equation [V] = [R] x [I] where [I] is the list of currents to be found.
As well as using Mesh Current Analysis, we can also use node analysis to calculate the voltages around the
loops, again reducing the amount of mathematics required using just Kirchoff's laws.
Nodal Voltage Analysis
As well as using Mesh Analysis to solve the currents flowing around complex circuits it is also possible to use
nodal analysis methods too. Nodal Voltage Analysis complements the previous mesh analysis in that it is
equally powerful and based on the same concepts of matrix analysis. As its name implies, Nodal Voltage
Analysis uses the "Nodal" equations of Kirchoff's first law to find the voltage potentials around the circuit. By
adding together all these nodal voltages the net result will be equal to zero. Then, if there are "N" nodes in the

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circuit there will be "N-1" independent nodal equations and these alone are sufficient to describe and hence
solve the circuit.

At each node point write down Kirchoff's first law equation, that is: "the currents entering a node are exactly
equal in value to the currents leaving the node" then express each current in terms of the voltage across the
branch. For "N" nodes, one node will be used as the reference node and all the other voltages will be referenced
or measured with respect to this common node.

Nodal Voltage Analysis Circuit

In the above circuit, node D is chosen as the reference node and the other three nodes are assumed to have
voltages, Va, Vb and Vc with respect to node D. For example;

As Va = 10v and Vc = 20v , Vb can be easily found by:

Again is the same value of 0.286 amps, we found using Kirchoff's Circuit Law in the previous tutorial.

From both Mesh and Nodal Analysis methods we have looked at so far, this is the simplest method of solving
this particular circuit. Generally, nodal voltage analysis is more appropriate when there are a larger number of
current sources around. The network is then defined as: [ I ] = [ Y ] [ V ] where [ I ] are the driving current
sources, [ V ] are the nodal voltages to be found and [ Y ] is the admittance matrix of the network which
operates on [ V ] to give [ I ].

Nodal Voltage Analysis Summary.

The basic procedure for solving Nodal Analysis equations is as follows:

1. Write down the current vectors, assuming currents into a node are positive. ie, a (N x 1) matrices
for "N" independent nodes.
2. Write the admittance matrix [Y] of the network where:
o Y11 = the total admittance of the first node.
o Y22 = the total admittance of the second node.
o RJK = the total admittance joining node J to node K.
3. For a network with "N" independent nodes, [Y] will be an (N x N) matrix and that Ynn will be
positive and Yjk will be negative or zero value.
4. The voltage vector will be (N x L) and will list the "N" voltages to be found.

Thevenins Theorem

In the previous 3 tutorials we have looked at solving complex electrical circuits using Kirchoff's Circuit Laws,
Mesh Analysis and finally Nodal Analysis but there are many more "Circuit Analysis Theorems" available to
calculate the currents and voltages at any point in a circuit. In this tutorial we will look at one of the more
common circuit analysis theorems (next to Kirchoff´s) that has been developed, Thevenins Theorem.

Thevenins Theorem states that "Any linear circuit containing several voltages and resistances can be replaced
by just a Single Voltage in series with a Single Resistor". In other words, it is possible to simplify any "Linear"
circuit, no matter how complex, to an equivalent circuit with just a single voltage source in series with a

K. Adisesha Page 10


resistance connected to a load as shown below. Thevenins Theorem is especially useful in analyzing power or
battery systems and other interconnected circuits where it will have an effect on the adjoining part of the circuit.

Thevenins equivalent circuit.

As far as the load resistor RL is concerned, any "one-port" network consisting of resistive circuit elements and
energy sources can be replaced by one single equivalent resistance Rs and equivalent voltage Vs, where Rs is
the source resistance value looking back into the circuit and Vs is the open circuit voltage at the terminals.


Firstly, we have to remove the centre 40Ω resistor and short out (not physically as this would be dangerous) all
the emf´s connected to the circuit, or open circuit any current sources. The value of resistor Rs is found by
calculating the total resistance at the terminals A and B with all the emf´s removed, and the value of the voltage
required Vs is the total voltage across terminals A and B with an open circuit and no load resistor Rs connected.
Then, we get the following circuit.

Find the Equivalent Resistance (Rs)

Find the Equivalent Voltage (Vs)

We now need to reconnect the two voltages back into the circuit, and as VS = VAB the current flowing around
the loop is calculated as:

so the voltage drop across the 20Ω resistor can be calculated as:
VAB = 20 - (20Ω x 0.33amps) = 13.33 volts.

Then the Thevenins Equivalent circuit is shown below with the 40Ω resistor connected.

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and from this the current flowing in the circuit is given as:

Which again, is the same value of 0.286 amps, we found using Kirchoff´s circuit law in the previous tutorial.

Thevenins theorem can be used as a circuit analysis method and is particularly useful if the load is to take a
series of different values. It is not as powerful as Mesh or Nodal analysis in larger networks because the use of
Mesh or Nodal analysis is usually necessary in any Thevenin exercise, so it might as well be used from the start.
However, Thevenins equivalent circuits of Transistors, Voltage Sources such as batteries etc, are very useful
in circuit design.

Thevenins Theorem Summary

The basic procedure for solving a circuit using Thevenins Theorem is as follows:

1. Remove the load resistor RL or component concerned.
2. Find RS by shorting all voltage sources or by open circuiting all the current sources.
3. Find VS by the usual circuit analysis methods.
4. Find the current flowing through the load resistor RL.

Norton Theorem

In some ways Norton's Theorem can be thought of as the opposite to "Thevenins Theorem", in that Thevenin
reduces his circuit down to a single resistance in series with a single voltage. Norton on the other hand reduces
his circuit down to a single resistance in parallel with a constant current source. Nortons Theorem states that
"Any linear circuit containing several energy sources and resistances can be replaced by a single Constant
Current generator in parallel with a Single Resistor". As far as the load resistance, RL is concerned this single
resistance, RS is the value of the resistance looking back into the network with all the current sources open
circuited and IS is the short circuit current at the output terminals as shown below.

Nortons equivalent circuit.

The value of this "constant current" is one which would flow if the two output terminals where shorted together
while the source resistance would be measured looking back into the terminals, (the same as Thevenin).

For example, consider our now familiar circuit from the previous section.

To find the Nortons equivalent of the above circuit we firstly have to remove the centre 40Ω load resistor and
short out the terminals A and B to give us the following circuit.

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When the terminals A and B are shorted together the two resistors are connected in parallel across their two
respective voltage sources and the currents flowing through each resistor as well as the total short circuit current
can now be calculated as:

with A-B Shorted Out

If we short-out the two voltage sources and open circuit terminals A and B, the two resistors are now effectively
connected together in parallel. The value of the internal resistor Rs is found by calculating the total resistance at
the terminals A and B giving us the following circuit.

Find the Equivalent Resistance (Rs)

Having found both the short circuit current, Is and equivalent internal resistance, Rs this then gives us the
following Nortons equivalent circuit.

Nortons equivalent circuit.

Ok, so far so good, but we now have to solve with the original 40Ω load resistor connected across terminals A
and B as shown below.

Again, the two resistors are connected in parallel across the terminals A and B which gives us a total resistance
of:

The voltage across the terminals A and B with the load resistor connected is given as:

Then the current flowing in the 40Ω load resistor can be found as:

K. Adisesha Page 13


which again, is the same value of 0.286 amps, we found using Kirchoff´s circuit law in the previous tutorials.

Nortons Theorem Summary
The basic procedure for solving a circuit using Nortons Theorem is as follows:

1. Remove the load resistor RL or component concerned.
2. Find RS by shorting all voltage sources or by open circuiting all the current sources.
3. Find IS by placing a shorting link on the output terminals A and B.
4. Find the current flowing through the load resistor RL.

Maximum Power Transfer

We have seen in the previous tutorials that any complex circuit or network can be replaced by a single energy
source in series with a single internal source resistance, RS. Generally, this source resistance or even impedance
if inductors or capacitors are involved is of a fixed value in Ohm´s. However, when we connect a load
resistance, RL across the output terminals of the power source, the impedance of the load will vary from an
open-circuit state to a short-circuit state resulting in the power being absorbed by the load becoming dependent
on the impedance of the actual power source. Then for the load resistance to absorb the maximum power
possible it has to be "Matched" to the impedance of the power source and this forms the basis of Maximum
Power Transfer.
The Maximum Power Transfer Theorem is another useful analysis method to ensure that the maximum
amount of power will be dissipated in the load resistance when the value of the load resistance is exactly equal
to the resistance of the power source. The relationship between the load impedance and the internal impedance
of the energy source will give the power in the load. Consider the circuit below.

Thevenins Equivalent Circuit.

In our Thevenin equivalent circuit above, the maximum power transfer theorem states that "the maximum
amount of power will be dissipated in the load resistance if it is equal in value to the Thevenin or Norton source
resistance of the network supplying the power" in other words, the load resistance resulting in greatest power
dissipation must be equal in value to the equivalent Thevenin source resistance, then RL = RS but if the load
resistance is lower or higher in value than the Thevenin source resistance of the network, its dissipated power
will be less than maximum. For example, find the value of the load resistance, RL that will give the maximum
power transfer in the following circuit.

Example No1.

Where:
RS = 25Ω
RL is variable between 0 - 100Ω
VS = 100v

Then by using the following Ohm's Law equations:

We can now complete the following table to determine the current and power in the circuit for different values
of load resistance.

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Table of Current against Power

RL I P RL I P
0 0 0 25 2.0 100
5 3.3 55 30 1.8 97
10 2.8 78 40 1.5 94
15 2.5 93 60 1.2 83
20 2.2 97 100 0.8 64
Using the data from the table above, we can plot a graph of load resistance, RL against power, P for different
values of load resistance. Also notice that power is zero for an open-circuit (zero current condition) and also for
a short-circuit (zero voltage condition).

Graph of Power against Load Resistance

From the above table and graph we can see that the Maximum Power Transfer occurs in the load when the
load resistance, RL is equal in value to the source resistance, RS so then: RS = RL = 25Ω. This is called a
"matched condition" and as a general rule, maximum power is transferred from an active device such as a power
supply or battery to an external device occurs when the impedance of the external device matches that of the
source. Improper impedance matching can lead to excessive power use and dissipation.

Transformer Impedance Matching

One very useful application of impedance matching to provide maximum power transfer is in the output stages
of amplifier circuits, where the speakers impedance is matched to the amplifier output impedance to obtain
maximum sound power output. This is achieved by using a matching transformer to couple the load to the
amplifiers output as shown below.

Transformer Coupling

The maximum power transfer can be obtained even if the output impedance is not the same as the load
impedance. This can be done using a suitable "turns ratio" on the transformer with the corresponding ratio of
load impedance, ZLOAD to output impedance, ZOUT matches that of the ratio of the transformers primary turns to
secondary turns as a resistance on one side of the transformer becomes a different value on the other. If the load
impedance, ZLOAD is purely resistive and the source impedance is purely resistive, ZOUT then the equation for
finding the maximum power transfer is given as:

Where: NP is the number of primary turns and NS the number of secondary turns on the transformer. Then by
varying the value of the transformers turns ratio the output impedance can be "matched" to the source
impedance to achieve maximum power transfer. For example,

Example No2.

If an 8Ω loudspeaker is to be connected to an amplifier with an output impedance of 1000Ω, calculate the turns
ratio of the matching transformer required to provide maximum power transfer of the audio signal. Assume the
amplifier source impedance is Z1, the load impedance is Z2 with the turns ratio given as N.

K. Adisesha Page 15


Generally, small transformers used in low power audio amplifiers are usually regarded as ideal so any losses
can be ignored.

Star Delta Transformation

We can now solve simple series, parallel or bridge type resistive networks using Kirchoff´s Circuit Laws,
mesh current analysis or nodal voltage analysis techniques but in a balanced 3-phase circuit we can use different
mathematical techniques to simplify the analysis of the circuit and thereby reduce the amount of math's
involved which in itself is a good thing. Standard 3-phase circuits or networks take on two major forms with
names that represent the way in which the resistances are connected, a Star connected network which has the
symbol of the letter, Υ (wye) and a Delta connected network which has the symbol of a triangle, Δ (delta). If a
3-phase, 3-wire supply or even a 3-phase load is connected in one type of configuration, it can be easily
transformed or changed it into an equivalent configuration of the other type by using either the Star Delta
Transformation or Delta Star Transformation process.

A resistive network consisting of three impedances can be connected together to form a T or "Tee"
configuration but the network can also be redrawn to form a Star or Υ type network as shown below.

T-connected and Equivalent Star Network

As we have already seen, we can redraw the T resistor network to produce an equivalent Star or Υ type
network. But we can also convert a Pi or π type resistor network into an equivalent Delta or Δ type network as
shown below.

Pi-connected and Equivalent Delta Network.

Having now defined exactly what is a Star and Delta connected network it is possible to transform the Υ into
an equivalent Δ circuit and also to convert a Δ into an equivalent Υ circuit using a the transformation process.
This process allows us to produce a mathematical relationship between the various resistors giving us a Star
Delta Transformation as well as a Delta Star Transformation.

These transformations allow us to change the three connected resistances by their equivalents measured
between the terminals 1-2, 1-3 or 2-3 for either a star or delta connected circuit. However, the resulting
networks are only equivalent for voltages and currents external to the star or delta networks, as internally the
voltages and currents are different but each network will consume the same amount of power and have the same
power factor to each other.

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Delta Star Transformation

To convert a delta network to an equivalent star network we need to derive a transformation formula for
equating the various resistors to each other between the various terminals. Consider the circuit below.

Delta to Star Network.

Compare the resistances between terminals 1 and 2.

Resistance between the terminals 2 and 3.

Resistance between the terminals 1 and 3.

This now gives us three equations and taking equation 3 from equation 2 gives:

Then, re-writing Equation 1 will give us:

Adding together equation 1 and the result above of equation 3 minus equation 2 gives:

From which gives us the final equation for resistor P as:

Then to summarize a little the above maths, we can now say that resistor P in a Star network can be found as
Equation 1 plus (Equation 3 minus Equation 2) or Eq1 + (Eq3 - Eq2).

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Similarly, to find resistor Q in a star network, is equation 2 plus the result of equation 1 minus equation 3
or Eq2 + (Eq1 - Eq3) and this gives us the transformation of Q as:

and again, to find resistor R in a Star network, is equation 3 plus the result of equation 2 minus equation 1
or Eq3 + (Eq2 - Eq1) and this gives us the transformation of R as:

When converting a delta network into a star network the denominators of all of the transformation formulas are
the same: A + B + C, and which is the sum of ALL the delta resistances. Then to convert any delta connected
network to an equivalent star network we can summarized the above transformation equations as:

Delta to Star Transformations Equations

If the three resistors in the delta network are all equal in value then the resultant resistors in the equivalent star
network will be equal to one third the value of the delta resistors, giving each branch in the star network as:
RSTAR = 1/3RDELTA

Example No1

Convert the following Delta Resistive Network into an equivalent Star Network.

Star Delta Transformation

We have seen above that when converting from a delta network to an equivalent star network that the resistor
connected to one terminal is the product of the two delta resistances connected to the same terminal, for
example resistor P is the product of resistors A and B connected to terminal 1. By rewriting the previous
formulas a little we can also find the transformation formulas for converting a resistive star network to an
equivalent delta network giving us a way of producing a star delta transformation as shown below.

Star to Delta Network.

The value of the resistor on any one side of the delta, Δ network is the sum of all the two-product combinations
of resistors in the star network divide by the star resistor located "directly opposite" the delta resistor being
found. For example, resistor A is given as:

K. Adisesha Page 18


with respect to terminal 3 and resistor B is given as:

with respect to terminal 2 with resistor C given as:

with respect to terminal 1.

By dividing out each equation by the value of the denominator we end up with three separate transformation
formulas that can be used to convert any Delta resistive network into an equivalent star network as given below.

Star Delta Transformation Equations

Star Delta Transformations allow us to convert one circuit type of circuit connection to another in order for us
to easily analyise a circuit and one final point about converting a star resistive network to an equivalent delta
network. If all the resistors in the star network are all equal in value then the resultant resistors in the equivalent
delta network will be three times the value of the star resistors and equal, giving: RDELTA = 3RSTAR

SEMICONDUCTOR DEVICES

Semiconductor Basics

If Resistors are the most basic passive component in electrical or electronic circuits, then we have to consider
the Signal Diode as being the most basic "Active" component. However, unlike a resistor, a diode does not
behave linearly with respect to the applied voltage as it has an exponential I-V relationship and therefore can
not be described simply by using Ohm's law as we do for resistors. Diodes are basic unidirectional
semiconductor devices that will only allow current to flow through them in one direction only, acting more like
a one way electrical valve, (Forward Biased Condition). But, before we have a look at how signal or power
diodes work we first need to understand the semiconductors basic construction and concept.

Diodes are made from a single piece of Semiconductor material which has a positive "P-region" at one end and
a negative "N-region" at the other, and which has a resistivity value somewhere between that of a conductor and
an insulator. But what is a "Semiconductor" material?, firstly let's look at what makes something either a
Conductor or an Insulator.

Resistivity

The electrical Resistance of an electrical or electronic component or device is generally defined as being the
ratio of the voltage difference across it to the current flowing through it, basic Ohm´s Law principals. The
problem with using resistance as a measurement is that it depends very much on the physical size of the
material being measured as well as the material out of which it is made. For example, If we were to increase the
length of the material (making it longer) its resistance would also increase. Likewise, if we increased its
diameter (making it fatter) its resistance would then decrease. So we want to be able to define the material in
such a way as to indicate its ability to either conduct or oppose the flow of electrical current through it no matter
what its size or shape happens to be. The quantity that is used to indicate this specific resistance is called
Resistivity and is given the Greek symbol of ρ, (Rho). Resistivity is measured in Ohm-metres, ( Ω-m ) and is
the inverse to conductivity.

If the resistivity of various materials is compared, they can be classified into three main groups, Conductors,
Insulators and Semi-conductors as shown below.

Resistivity Chart

K. Adisesha Page 19


Notice also that there is a very small
margin between the resistivity of the
conductors such as silver and gold,
compared to a much larger margin
for the resistivity of the insulators
between glass and quartz. The
resistivity of all the materials at any
one time also depends upon their
temperature.

Conductors

From above we now know that Conductors are materials that have a low value of resistivity allowing them to
easily pass an electrical current due to there being plenty of free electrons floating about within their basic atom
structure. When a positive voltage potential is applied to the material these "free electrons" leave their parent
atom and travel together through the material forming an electron drift. Examples of good conductors are
generally metals such as Copper, Aluminium, Silver or non metals such as Carbon because these materials have
very few electrons in their outer "Valence Shell" or ring, resulting in them being easily knocked out of the
atom's orbit. This allows them to flow freely through the material until they join up with other atoms, producing
a "Domino Effect" through the material thereby creating an electrical current.
Generally speaking, most metals are good conductors of electricity, as they have very small resistance values,
usually in the region of micro-ohms per metre with the resistivity of conductors increasing with temperature
because metals are also generally good conductors of heat.

Insulators

Insulators on the other hand are the exact opposite of conductors. They are made of materials, generally non-
metals, that have very few or no "free electrons" floating about within their basic atom structure because the
electrons in the outer valence shell are strongly attracted by the positively charged inner nucleus. So if a
potential voltage is applied to the material no current will flow as there are no electrons to move and which
gives these materials their insulating properties. Insulators also have very high resistances, millions of ohms per
metre, and are generally not affected by normal temperature changes (although at very high temperatures wood
becomes charcoal and changes from an insulator to a conductor). Examples of good insulators are marble, fused
quartz, p.v.c. plastics, rubber etc.
Insulators play a very important role within electrical and electronic circuits, because without them electrical
circuits would short together and not work. For example, insulators made of glass or porcelain are used for
insulating and supporting overhead transmission cables while epoxy-glass resin materials are used to make
printed circuit boards, PCB's etc.

Semiconductor Basics
Semiconductors materials such as silicon (Si), germanium (Ge) and gallium arsenide (GaAs), have electrical
properties somewhere in the middle, between those of a "conductor" and an "insulator". They are not good
conductors nor good insulators (hence their name "semi"-conductors). They have very few "fee electrons"
because their atoms are closely grouped together in a crystalline pattern called a "crystal lattice". However, their
ability to conduct electricity can be greatly improved by adding certain "impurities" to this crystalline structure
thereby, producing more free electrons than holes or vice versa. By controlling the amount of impurities added
to the semiconductor material it is possible to control its conductivity. These impurities are called donors or
acceptors depending on whether they produce electrons or holes respectively. This process of adding impurity
atoms to semiconductor atoms (the order of 1 impurity atom per 10 million (or more) atoms of the
semiconductor) is called Doping.
The most commonly used semiconductor basics material by far is silicon. Silicon has four valence electrons in
its outermost shell which it shares with its neighbouring silicon atoms to form full orbital's of eight electrons.
The structure of the bond between the two silicon atoms is such that each atom shares one electron with its
neighbour making the bond very stable. As there are very few free electrons available to move around the

K. Adisesha Page 20


silicon crystal, crystals of pure silicon (or germanium) are therefore good insulators, or at the very least very
high value resistors.
Silicon atoms are arranged in a definite symmetrical pattern making them a crystalline solid structure. A crystal
of pure silica (silicon dioxide or glass) is generally said to be an intrinsic crystal (it has no impurities) and
therefore has no free electrons. But simply connecting a silicon crystal to a battery supply is not enough to
extract an electric current from it. To do that we need to create a "positive" and a "negative" pole within the
silicon allowing electrons and therefore electric current to flow out of the silicon. These poles are created by
doping the silicon with certain impurities.

The diagram above shows the structure and lattice of a 'normal' pure
crystal of Silicon.

N-type Semiconductor Basics

In order for our silicon crystal to conduct electricity, we need to introduce an impurity atom such as Arsenic,
Antimony or Phosphorus into the crystalline structure making it extrinsic (impurities are added). These atoms
have five outer electrons in their outermost orbital to share with neighbouring atoms and are commonly called
"Pentavalent" impurities. This allows four out of the five orbital electrons to bond with its neighbouring silicon
atoms leaving one "free electron" to become mobile when an electrical voltage is applied (electron flow). As
each impurity atom "donates" one electron, pentavalent atoms are generally known as "donors".

Antimony (symbol Sb) or Phosphorus (symbol P), are frequently used as a pentavalent additive as they have
51 electrons arranged in five shells around their nucleus with the outermost orbital having five electrons. The
resulting semiconductor basics material has an excess of current-carrying electrons, each with a negative
charge, and is therefore referred to as an "N-type" material with the electrons called "Majority Carriers" while
the resulting holes are called "Minority Carriers".

When stimulated by an external power source, the electrons freed from the silicon atoms by this stimulation are
quickly replaced by the free electrons available from the doped Antimony atoms. But this action still leaves an
extra electron (the freed electron) floating around the doped crystal making it negatively charged. Then a
semiconductor material is classed as N-type when its donor density is greater than its acceptor density, in other
words, it has more electrons than holes thereby creating a negative pole.

The diagram above shows the structure and lattice of the donor impurity atom Antimony.

P-Type Semiconductor Basics

If we go the other way, and introduce a "Trivalent" (3-electron) impurity into the crystalline structure, such as
Aluminium, Boron or Indium, which have only three valence electrons available in their outermost orbital, the
fourth closed bond cannot be formed. Therefore, a complete connection is not possible, giving the
semiconductor material an abundance of positively charged carriers known as "holes" in the structure of the
crystal where electrons are effectively missing.

K. Adisesha Page 21


As there is now a hole in the silicon crystal, a neighbouring electron is attracted to it and will try to move into
the hole to fill it. However, the electron filling the hole leaves another hole behind it as it moves. This in turn
attracts another electron which in turn creates another hole behind it, and so forth giving the appearance that the
holes are moving as a positive charge through the crystal structure (conventional current flow). This movement
of holes results in a shortage of electrons in the silicon turning the entire doped crystal into a positive pole. As
each impurity atom generates a hole, trivalent impurities are generally known as "Acceptors" as they are
continually "accepting" extra or free electrons.

Boron (symbol B) is commonly used as a trivalent additive as it has only five electrons arranged in three shells
around its nucleus with the outermost orbital having only three electrons. The doping of Boron atoms causes
conduction to consist mainly of positive charge carriers resulting in a "P-type" material with the positive holes
being called "Majority Carriers" while the free electrons are called "Minority Carriers". Then a semiconductor
basics material is classed as P-type when its acceptor density is greater than its donor density. Therefore, a P-
type semiconductor has more holes than electrons.

The diagram above shows the structure and lattice of the acceptor impurity
atom Boron.
Semiconductor Basics Summary

N-type (e.g. add Antimony)

These are materials which have Pentavalent impurity atoms (Donors) added and conduct by "electron"
movement and are called, N-type Semiconductors.

In these types of materials are:

1. The Donors are positively charged.
2. There are a large number of free electrons.
3. A small number of holes in relation to the number of free electrons.
4. Doping gives:
o positively charged donors.
o negatively charged free electrons.
5. Supply of energy gives:
o negatively charged free electrons.
o positively charged holes.
P-type (e.g. add Boron)

These are materials which have Trivalent impurity atoms (Acceptors) added and conduct by "hole" movement
and are called, P-type Semiconductors.

In these types of materials are:

1. The Acceptors are negatively charged.
2. There are a large number of holes.
3. A small number of free electrons in relation to the number of holes.
4. Doping gives:
negatively charged acceptors.
positively charged holes.
5. Supply of energy gives:
positively charged holes.
negatively charged free electrons.
and both P and N-types as a whole, are electrically neutral on their own.
K. Adisesha Page 22


Antimony (Sb) and Boron (B) are two of the most commony used doping agents as they are more feely
available compared to others and are also classed as metalloids. However, the periodic table groups together a
number of other different chemical elements all with either three, or five electrons in their outermost orbital
shell. These other chemical elements can also be used as doping agents to a base material of either Silicon (S) or
Germanium (Ge) to produce different types of basic semiconductor materials for use in electronic components
and these are given below.

Periodic Table of Semiconductors

Elements Group 13 Elements Group 14 Elements Group 15
3-Electrons in Outer Shell 4-Electrons in Outer Shell 5-Electrons in Outer Shell
(Positively Charged) (Neutrally Charged) (Negatively Charged)
(5) Boron ( B ) (6) Carbon ( C )
(13) Aluminium ( Al ) (14) Silicon ( Si ) (15) Phosphorus ( P )
(31) Gallium ( Ga ) (32) Germanium ( Ge ) (33) Arsenic ( As )
(51) Antimony ( Sb )
The PN junction

In the previous tutorial we saw how to make an N-type semiconductor material by doping it with Antimony and
also how to make a P-type semiconductor material by doping that with Boron. This is all well and good, but
these semiconductor N and P-type materials do very little on their own as they are electrically neutral, but when
we join (or fuse) them together these two materials behave in a very different way producing what is generally
known as a PN Junction.

When the N and P-type semiconductor materials are first joined together a very large density gradient exists
between both sides of the junction so some of the free electrons from the donor impurity atoms begin to migrate
across this newly formed junction to fill up the holes in the P-type material producing negative ions. However,
because the electrons have moved across the junction from the N-type silicon to the P-type silicon, they leave
behind positively charged donor ions (ND) on the negative side and now the holes from the acceptor impurity
migrate across the junction in the opposite direction into the region were there are large numbers of free
electrons. As a result, the charge density of the P-type along the junction is filled with negatively charged
acceptor ions (NA), and the charge density of the N-type along the junction becomes positive. This charge
transfer of electrons and holes across the junction is known as diffusion.

This process continues back and forth until the number of electrons which have crossed the junction have a
large enough electrical charge to repel or prevent any more carriers from crossing the junction. The regions on
both sides of the junction become depleted of any free carriers in comparison to the N and P type materials
away from the junction. Eventually a state of equilibrium (electrically neutral situation) will occur producing a
"potential barrier" zone around the area of the junction as the donor atoms repel the holes and the acceptor
atoms repel the electrons. Since no free charge carriers can rest in a position where there is a potential barrier
the regions on both sides of the junction become depleted of any more free carriers in comparison to the N and
P type materials away from the junction. This area around the junction is now called the Depletion Layer.

The PN junction

The total charge on each side of the junction must be equal and opposite to maintain a neutral charge condition
K. Adisesha Page 23


around the junction. If the depletion layer region has a distance D, it therefore must therefore penetrate into the
silicon by a distance of Dp for the positive side, and a distance of Dn for the negative side giving a relationship
between the two of Dp.NA = Dn.ND in order to maintain charge neutrality also called equilibrium.

PN junction Distance

As the N-type material has lost electrons and the P-type has lost holes, the N-type material has become positive
with respect to the P-type. Then the presence of impurity ions on both sides of the junction cause an electric
field to be established across this region with the N-side at a positive voltage relative to the P-side. The problem
now is that a free charge requires some extra energy to overcome the barrier that now exists for it to be able to
cross the depletion region junction.

This electric field created by the diffusion process has created a "built-in potential difference" across the
junction with an open-circuit (zero bias) potential of:

Where: Eo is the zero bias junction voltage, VT the thermal voltage of 26mV at room temperature, ND and NA
are the impurity concentrations and ni is the intrinsic concentration.

A suitable positive voltage (forward bias) applied between the two ends of the PN junction can supply the free
electrons and holes with the extra energy. The external voltage required to overcome this potential barrier that
now exists is very much dependent upon the type of semiconductor material used and its actual temperature.
Typically at room temperature the voltage across the depletion layer for silicon is about 0.6 - 0.7 volts and for
germanium is about 0.3 - 0.35 volts. This potential barrier will always exist even if the device is not connected
to any external power source.

The significance of this built-in potential across the junction, is that it opposes both the flow of holes and
electrons across the junction and is why it is called the potential barrier. In practice, a PN junction is formed
within a single crystal of material rather than just simply joining or fusing together two separate pieces.
Electrical contacts are also fused onto either side of the crystal to enable an electrical connection to be made to
an external circuit. Then the resulting device that has been made is called a PN junction Diode or Signal Diode.

The Junction Diode

The effect described in the previous tutorial is achieved without any external voltage being applied to the actual
PN junction resulting in the junction being in a state of equilibrium. However, if we were to make electrical
connections at the ends of both the N-type and the P-type materials and then connect them to a battery source,
an additional energy source now exists to overcome the barrier resulting in free charges being able to cross the
depletion region from one side to the other. The behaviour of the PN junction with regards to the potential
barrier width produces an asymmetrical conducting two terminal device, better known as the Junction Diode.

A diode is one of the simplest semiconductor devices, which has the characteristic of passing current in one
direction only. However, unlike a resistor, a diode does not behave linearly with respect to the applied voltage
as the diode has an exponential I-V relationship and therefore we can not described its operation by simply
using an equation such as Ohm's law.

If a suitable positive voltage (forward bias) is applied between the two ends of the PN junction, it can supply
free electrons and holes with the extra energy they require to cross the junction as the width of the depletion

K. Adisesha Page 24


layer around the PN junction is decreased. By applying a negative voltage (reverse bias) results in the free
charges being pulled away from the junction resulting in the depletion layer width being increased. This has the
effect of increasing or decreasing the effective resistance of the junction itself allowing or blocking current flow
through the diode.

Then the depletion layer widens with an increase in the application of a reverse voltage and narrows with an
increase in the application of a forward voltage. This is due to the differences in the electrical properties on the
two sides of the PN junction resulting in physical changes taking place. One of the results produces rectification
as seen in the PN junction diodes static I-V (current-voltage) characteristics. Rectification is shown by an
asymmetrical current flow when the polarity of bias voltage is altered as shown below.

Junction Diode Symbol and Static I-V Characteristics.

But before we can use the PN junction as a practical device or as a rectifying device we need to firstly bias the
junction, ie connect a voltage potential across it. On the voltage axis above, "Reverse Bias" refers to an external
voltage potential which increases the potential barrier. An external voltage which decreases the potential barrier
is said to act in the "Forward Bias" direction.
There are two operating regions and three possible "biasing" conditions for the standard Junction Diode and
these are:
1. Zero Bias - No external voltage potential is applied to the PN-junction.
2. Reverse Bias - The voltage potential is connected negative, (-ve) to the P-type material and
positive, (+ve) to the N-type material across the diode which has the effect of Increasing the
PN-junction width.
3. Forward Bias - The voltage potential is connected positive, (+ve) to the P-type material and
negative, (-ve) to the N-type material across the diode which has the effect of Decreasing the
PN-junction width.
Zero Biased Junction Diode

When a diode is connected in a Zero Bias condition, no external potential energy is applied to the PN junction.
However if the diodes terminals are shorted together, a few holes (majority carriers) in the P-type material with
enough energy to overcome the potential barrier will move across the junction against this barrier potential.
This is known as the "Forward Current" and is referenced as IF
Likewise, holes generated in the N-type material (minority carriers), find this situation favourable and move
across the junction in the opposite direction. This is known as the "Reverse Current" and is referenced as IR.
This transfer of electrons and holes back and forth across the PN junction is known as diffusion, as shown
below.

Zero Biased Junction Diode

K. Adisesha Page 25


The potential barrier that now exists discourages the diffusion of any more majority carriers across the junction.
However, the potential barrier helps minority carriers (few free electrons in the P-region and few holes in the N-
region) to drift across the junction. Then an "Equilibrium" or balance will be established when the majority
carriers are equal and both moving in opposite directions, so that the net result is zero current flowing in the
circuit. When this occurs the junction is said to be in a state of "Dynamic Equilibrium".

The minority carriers are constantly generated due to thermal energy so this state of equilibrium can be broken
by raising the temperature of the PN junction causing an increase in the generation of minority carriers, thereby
resulting in an increase in leakage current but an electric current cannot flow since no circuit has been
connected to the PN junction.

Reverse Biased Junction Diode

When a diode is connected in a Reverse Bias condition, a positive voltage is applied to the N-type material and
a negative voltage is applied to the P-type material. The positive voltage applied to the N-type material attracts
electrons towards the positive electrode and away from the junction, while the holes in the P-type end are also
attracted away from the junction towards the negative electrode. The net result is that the depletion layer grows
wider due to a lack of electrons and holes and presents a high impedance path, almost an insulator. The result is
that a high potential barrier is created thus preventing current from flowing through the semiconductor material.

Reverse Biased Junction Diode showing an Increase in the Depletion Layer

This condition represents a high resistance value to the PN junction and practically zero current flows through
the junction diode with an increase in bias voltage. However, a very small leakage current does flow through
the junction which can be measured in microamperes, (μA). One final point, if the reverse bias voltage Vr
applied to the diode is increased to a sufficiently high enough value, it will cause the PN junction to overheat
and fail due to the avalanche effect around the junction. This may cause the diode to become shorted and will
result in the flow of maximum circuit current, and this shown as a step downward slope in the reverse static
characteristics curve below.

Reverse Characteristics Curve for a Junction Diode

Sometimes this avalanche effect has practical applications in voltage stabilising circuits where a series limiting
resistor is used with the diode to limit this reverse breakdown current to a preset maximum value thereby
producing a fixed voltage output across the diode. These types of diodes are commonly known as Zener Diodes
and are discussed in a later tutorial.

Forward Biased Junction Diode

When a diode is connected in a Forward Bias condition, a negative voltage is applied to the N-type material
and a positive voltage is applied to the P-type material. If this external voltage becomes greater than the value of
K. Adisesha Page 26


the potential barrier, approx. 0.7 volts for silicon and 0.3 volts for germanium, the potential barriers opposition
will be overcome and current will start to flow. This is because the negative voltage pushes or repels electrons
towards the junction giving them the energy to cross over and combine with the holes being pushed in the
opposite direction towards the junction by the positive voltage. This results in a characteristics curve of zero
current flowing up to this voltage point, called the "knee" on the static curves and then a high current flow
through the diode with little increase in the external voltage as shown below.

Forward Characteristics Curve for a Junction Diode

The application of a forward biasing voltage on the junction diode results in the depletion layer becoming very
thin and narrow which represents a low impedance path through the junction thereby allowing high currents to
flow. The point at which this sudden increase in current takes place is represented on the static I-V
characteristics curve above as the "knee" point.

Forward Biased Junction Diode showing a Reduction in the Depletion Layer

This condition represents the low resistance path through the PN junction allowing very large currents to flow
through the diode with only a small increase in bias voltage. The actual potential difference across the junction
or diode is kept constant by the action of the depletion layer at approximately 0.3v for germanium and
approximately 0.7v for silicon junction diodes. Since the diode can conduct "infinite" current above this knee
point as it effectively becomes a short circuit, therefore resistors are used in series with the diode to limit its
current flow. Exceeding its maximum forward current specification causes the device to dissipate more power
in the form of heat than it was designed for resulting in a very quick failure of the device.

Junction Diode Summary

The PN junction region of a Junction Diode has the following important characteristics:

1). Semiconductors contain two types of mobile charge carriers, Holes and Electrons.
2). The holes are positively charged while the electrons negatively charged.
3). A semiconductor may be doped with donor impurities such as Antimony (N-type doping), so that it
contains mobile charges which are primarily electrons.
4). A semiconductor may be doped with acceptor impurities such as Boron (P-type doping), so that it
contains mobile charges which are mainly holes.
5). The junction region itself has no charge carriers and is known as the depletion region.
6). The junction (depletion) region has a physical thickness that varies with the applied voltage.
7).When a diode is Zero Biased no external energy source is applied and a natural Potential Barrier is
developed across a depletion layer which is approximately 0.5 to 0.7v for silicon diodes and
approximately 0.3 of a volt for germanium diodes.
8). When a junction diode is Forward Biased the thickness of the depletion region reduces and the
diode acts like a short circuit allowing full current to flow.
9). When a junction diode is Reverse Biased the thickness of the depletion region increases and the
diode acts like an open circuit blocking any current flow, (only a very small leakage current).

K. Adisesha Page 27


The Signal Diode

The semiconductor Signal Diode is a small non-linear semiconductor devices generally used in electronic
circuits, where small currents or high frequencies are involved such as in radio, television and digital logic
circuits. The signal diode which is also sometimes known by its older name of the Point Contact Diode or the
Glass Passivated Diode, are physically very small in size compared to their larger Power Diode cousins.

Generally, the PN junction of a small signal diode is encapsulated in glass to protect the PN junction, and
usually have a red or black band at one end of their body to help identify which end is the cathode terminal. The
most widely used of all the glass encapsulated signal diodes is the very common 1N4148 and its equivalent
1N914 signal diode. Small signal and switching diodes have much lower power and current ratings, around
150mA, 500mW maximum compared to rectifier diodes, but they can function better in high frequency
applications or in clipping and switching applications that deal with short-duration pulse waveforms.

The characteristics of a signal point contact diode are different for both germanium and silicon types and are
given as:

Germanium Signal Diodes - These have a low reverse resistance value giving a lower forward volt drop
across the junction, typically only about 0.2-0.3v, but have a higher forward resistance value because of
their small junction area.
Silicon Signal Diodes - These have a very high value of reverse resistance and give a forward volt drop
of about 0.6-0.7v across the junction. They have fairly low values of forward resistance giving them
high peak values of forward current and reverse voltage.
The electronic symbol given for any type of diode is that of an arrow with a bar or line at its end and this is
illustrated below along with the Steady State V-I Characteristics Curve.

Silicon Diode V-I Characteristic Curve

The arrow points in the direction of conventional current flow through the diode meaning that the diode will
only conduct if a positive supply is connected to the Anode (a) terminal and a negative supply is connected to
the Cathode (k) terminal thus only allowing current to flow through it in one direction only, acting more like a
one way electrical valve, (Forward Biased Condition). However, we know from the previous tutorial that if we
connect the external energy source in the other direction the diode will block any current flowing through it and
instead will act like an open switch, (Reversed Biased Condition) as shown below.

Forward and Reversed Biased Diode

Then we can say that an ideal small signal diode conducts current in one direction (forward-conducting) and
blocks current in the other direction (reverse-blocking). Signal Diodes are used in a wide variety of applications
such as a switch in rectifiers, limiters, snubbers or in wave-shaping circuits.

K. Adisesha Page 28


Signal Diode Parameters

Signal Diodes are manufactured in a range of voltage and current ratings and care must be taken when choosing
a diode for a certain application. There are a bewildering array of static characteristics associated with the
humble signal diode but the more important ones are.

1. Maximum Forward Current

The Maximum Forward Current (IF(max)) is as its name implies the maximum forward current allowed to flow
through the device. When the diode is conducting in the forward bias condition, it has a very small "ON"
resistance across the PN junction and therefore, power is dissipated across this junction (Ohm´s Law) in the
form of heat. Then, exceeding its (IF(max)) value will cause more heat to be generated across the junction and the
diode will fail due to thermal overload, usually with destructive consequences. When operating diodes around
their maximum current ratings it is always best to provide additional cooling to dissipate the heat produced by
the diode.

For example, our small 1N4148 signal diode has a maximum current rating of about 150mA with a power
dissipation of 500mW at 25oC. Then a resistor must be used in series with the diode to limit the forward current,
(IF(max)) through it to below this value.

2. Peak Inverse Voltage

The Peak Inverse Voltage (PIV) or Maximum Reverse Voltage (VR(max)), is the maximum allowable Reverse
operating voltage that can be applied across the diode without reverse breakdown and damage occurring to the
device. This rating therefore, is usually less than the "avalanche breakdown" level on the reverse bias
characteristic curve. Typical values of VR(max) range from a few volts to thousands of volts and must be
considered when replacing a diode.

The peak inverse voltage is an important parameter and is mainly used for rectifying diodes in AC rectifier
circuits with reference to the amplitude of the voltage were the sinusoidal waveform changes from a positive to
a negative value on each and every cycle.

3. Total Power Dissipation

Signal diodes have a Total Power Dissipation, (PD(max)) rating. This rating is the maximum possible power
dissipation of the diode when it is forward biased (conducting). When current flows through the signal diode the
biasing of the PN junction is not perfect and offers some resistance to the flow of current resulting in power
being dissipated (lost) in the diode in the form of heat. As small signal diodes are nonlinear devices the
resistance of the PN junction is not constant, it is a dynamic property then we cannot use Ohms Law to define
the power in terms of current and resistance or voltage and resistance as we can for resistors. Then to find the
power that will be dissipated by the diode we must multiply the voltage drop across it times the current flowing
through it: PD = VxI

4. Maximum Operating Temperature

The Maximum Operating Temperature actually relates to the Junction Temperature (TJ) of the diode and is
related to maximum power dissipation. It is the maximum temperature allowable before the structure of the
diode deteriorates and is expressed in units of degrees centigrade per Watt, ( oC/W ). This value is linked
closely to the maximum forward current of the device so that at this value the temperature of the junction is not
exceeded. However, the maximum forward current will also depend upon the ambient temperature in which the
device is operating so the maximum forward current is usually quoted for two or more ambient temperature
values such as 25oC or 70oC.

Then there are three main parameters that must be considered when either selecting or replacing a signal diode
and these are:
The Reverse Voltage Rating
The Forward Current Rating
The Forward Power Dissipation Rating

Signal Diode Arrays

When space is limited, or matching pairs of switching signal diodes are required, diode arrays can be very
useful. They generally consist of low capacitance high speed silicon diodes such as the 1N4148 connected
K. Adisesha Page 29


together in multiple diode packages called an array for use in switching and clamping in digital circuits. They
are encased in single inline packages (SIP) containing 4 or more diodes connected internally to give either an
individual isolated array, common cathode, (CC), or a common anode, (CA) configuration as shown.

Signal Diode Arrays

Signal diode arrays can also be used in digital and computer circuits to protect high speed data lines or other
input/output parallel ports against electrostatic discharge, (ESD) and voltage transients. By connecting two
diodes in series across the supply rails with the data line connected to their junction as shown, any unwanted
transients are quickly dissipated and as the signal diodes are available in 8-fold arrays they can protect eight
data lines in a single package.

CPU Data Line Protection

Signal diode arrays can also be used to connect together diodes in either series or parallel combinations to form
voltage regulator or voltage reducing type circuits or to produce a known fixed voltage. We know that the
forward volt drop across a silicon diode is about 0.7v and by connecting together a number of diodes in series
the total voltage drop will be the sum of the individual voltage drops of each diode. However, when signal
diodes are connected together in series, the current will be the same for each diode so the maximum forward
current must not be exceeded.

Connecting Signal Diodes in Series
Another application for the small signal diode is to create a regulated voltage supply. Diodes are connected
together in series to provide a constant DC voltage across the diode combination. The output voltage across the
diodes remains constant in spite of changes in the load current drawn from the series combination or changes in
the DC power supply voltage that feeds them. Consider the circuit below.

Signal Diodes in Series

K. Adisesha Page 30


As the forward voltage drop across a silicon diode is almost constant at about 0.7v, while the current through it
varies by relatively large amounts, a forward-biased signal diode can make a simple voltage regulating circuit.
The individual voltage drops across each diode are subtracted from the supply voltage to leave a certain voltage
potential across the load resistor, and in our simple example above this is given as 10v - (3 x 0.7v) = 7.9v. This
is because each diode has a junction resistance relating to the small signal current flowing through it and the
three signal diodes in series will have three times the value of this resistance, along with the load resistance R,
forms a voltage divider across the supply.
By adding more diodes in series a greater voltage reduction will occur. Also series connected diodes can be
placed in parallel with the load resistor to act as a voltage regulating circuit. Here the voltage applied to the load
resistor will be 3 x 0.7v = 2.1v. We can of course produce the same constant voltage source using a single
Zener Diode. Resistor, RD is used to prevent excessive current flowing through the diodes if the load is
removed.

Freewheel Diodes
Signal diodes can also be used in a variety of clamping, protection and wave shaping circuits with the most
common form of clamping diode circuit being one which uses a diode connected in parallel with a coil or
inductive load to prevent damage to the delicate switching circuit by suppressing the voltage spikes and/or
transients that are generated when the load is suddenly turned "OFF". This type of diode is generally known as a
"Free-wheeling Diode" or Freewheel diode as it is more commonly called.
The Freewheel diode is used to protect solid state switches such as power transistors and MOSFET's from
damage by reverse battery protection as well as protection from highly inductive loads such as relay coils or
motors, and an example of its connection is shown below.

Use of the Freewheel Diode

Modern fast switching, power semiconductor devices require fast switching diodes such as free wheeling diodes
to protect them form inductive loads such as motor coils or relay windings. Every time the switching device
above is turned "ON", the freewheel diode changes from a conducting state to a blocking state as it becomes
reversed biased. However, when the device rapidly turns "OFF", the diode becomes forward biased and the
collapse of the energy stored in the coil causes a current to flow through the freewheel diode. Without the
protection of the freewheel diode high di/dt currents would occur causing a high voltage spike or transient to
flow around the circuit possibly damaging the switching device.

Previously, the operating speed of the semiconductor switching device, either transistor, MOSFET, IGBT or
digital has been impaired by the addition of a freewheel diode across the inductive load with Schottky and
Zener diodes being used instead in some applications. But during the past few years however, freewheel diodes
had regained importance due mainly to their improved reverse-recovery characteristics and the use of super fast
semiconductor materials capable at operating at high switching frequencies.

Other types of specialized diodes not included here are Photo-Diodes, PIN Diodes, Tunnel Diodes and Schottky
Barrier Diodes. By adding more PN junctions to the basic two layer diode structure other types of
semiconductor devices can be made. For example a three layer semiconductor device becomes a Transistor, a
four layer semiconductor device becomes a Thyristor or Silicon Controlled Rectifier and five layer devices
known as Triacs are also available.

Half Wave Rectification

A rectifier is a circuit which converts the Alternating Current (AC) input power into a Direct Current (DC)
output power. The input power supply may be either a single-phase or a multi-phase supply with the simplest of
all the rectifier circuits being that of the Half Wave Rectifier. The power diode in a half wave rectifier circuit
passes just one half of each complete sine wave of the AC supply in order to convert it into a DC supply. Then

K. Adisesha Page 31


this type of circuit is called a "half-wave" rectifier because it passes only half of the incoming AC power supply
as shown below.

Half Wave Rectifier Circuit

During each "positive" half cycle of the AC sine wave, the diode is forward biased as the anode is positive with
respect to the cathode resulting in current flowing through the diode. Since the DC load is resistive (resistor, R),
the current flowing in the load resistor is therefore proportional to the voltage (Ohm´s Law), and the voltage
across the load resistor will therefore be the same as the supply voltage, Vs (minus Vf), that is the "DC" voltage
across the load is sinusoidal for the first half cycle only so Vout = Vs.

During each "negative" half cycle of the AC sine wave, the diode is reverse biased as the anode is negative with
respect to the cathode therefore, No current flows through the diode or circuit. Then in the negative half cycle of
the supply, no current flows in the load resistor as no voltage appears across it so Vout = 0.

The current on the DC side of the circuit flows in one direction only making the circuit Unidirectional and the
value of the DC voltage VDC across the load resistor is calculated as follows.

Where Vmax is the maximum voltage value of the AC supply, and VS is the r.m.s. value of the supply.

Example No1.

Calculate the current, ( IDC ) flowing through a 100Ω resistor connected to a 240v single phase half-wave
rectifier as shown above. Also calculate the power consumed by the load.

During the rectification process the resultant output DC voltage and current are therefore both "ON" and "OFF"
during every cycle. As the voltage across the load resistor is only present during the positive half of the cycle
(50% of the input waveform), this results in a low average DC value being supplied to the load. The variation of
the rectified output waveform between this ON and OFF condition produces a waveform which has large
amounts of "ripple" which is an undesirable feature. The resultant DC ripple has a frequency that is equal to that
of the AC supply frequency.

Very often when rectifying an alternating voltage we wish to produce a "steady" and continuous DC voltage
free from any voltage variations or ripple. One way of doing this is to connect a large value Capacitor across
the output voltage terminals in parallel with the load resistor as shown below. This type of capacitor is known
commonly as a "Reservoir" or Smoothing Capacitor.

Half-wave Rectifier with Smoothing Capacitor

K. Adisesha Page 32


When rectification is used to provide a direct voltage power supply from an alternating source, the amount of
ripple can be further reduced by using larger value capacitors but there are limits both on cost and size. For a
given capacitor value, a greater load current (smaller load resistor) will discharge the capacitor more quickly
( RC Time Constant ) and so increases the ripple obtained. Then for single phase, half-wave rectifier circuits it
is not very practical to try and reduce the ripple voltage by capacitor smoothing alone, it is more practical to use
"Full-wave Rectification" instead.

The Full Wave Rectifier

In the previous Power Diodes tutorial we discussed ways of reducing the ripple or voltage variations on a direct
DC voltage by connecting capacitors across the load resistance. While this method may be suitable for low
power applications it is unsuitable to applications which need a "steady and smooth" DC supply voltage. One
method to improve on this is to use every half-cycle of the input voltage instead of every other half-cycle. The
circuit which allows us to do this is called a Full Wave Rectifier.

Like the half wave circuit, a full wave rectifier circuit produces an output voltage or current which is purely DC
or has some specified DC component. Full wave rectifiers have some fundamental advantages over their half
wave rectifier counterparts. The average (DC) output voltage is higher than for half wave, the output of the full
wave rectifier has much less ripple than that of the half wave rectifier producing a smoother output waveform.

In a Full Wave Rectifier circuit two diodes are now used, one for each half of the cycle. A transformer is used
whose secondary winding is split equally into two halves with a common centre tapped connection, (C). This
configuration results in each diode conducting in turn when its anode terminal is positive with respect to the
transformer centre point C producing an output during both half-cycles, twice that for the half wave rectifier so
it is 100% efficient as shown below.

Full Wave Rectifier Circuit

The full wave rectifier circuit consists of two power diodes connected to a single load resistance (RL) with each
diode taking it in turn to supply current to the load. When point A of the transformer is positive with respect to
point C, diode D1 conducts in the forward direction as indicated by the arrows. When point B is positive (in the
negative half of the cycle) with respect to point C, diode D2 conducts in the forward direction and the current
flowing through resistor R is in the same direction for both half-cycles. As the output voltage across the resistor
R is the phasor sum of the two waveforms combined, this type of full wave rectifier circuit is also known as a
"bi-phase" circuit.

K. Adisesha Page 33


As the spaces between each half-wave developed by each diode is now being filled in by the other diode the
average DC output voltage across the load resistor is now double that of the single half-wave rectifier circuit
and is about 0.637Vmax of the peak voltage, assuming no losses.

Where: VMAX is the maximum peak value in one half of the secondary winding and VRMS is the rms value.

The peak voltage of the output waveform is the same as before for the half-wave rectifier provided each half of
the transformer windings have the same rms voltage value. To obtain a different DC voltage output different
transformer ratios can be used. The main disadvantage of this type of full wave rectifier circuit is that a larger
transformer for a given power output is required with two separate but identical secondary windings making this
type of full wave rectifying circuit costly compared to the "Full Wave Bridge Rectifier" circuit equivalent.

The Full Wave Bridge Rectifier

Another type of circuit that produces the same output waveform as the full wave rectifier circuit above, is that
of the Full Wave Bridge Rectifier. This type of single phase rectifier uses four individual rectifying diodes
connected in a closed loop "bridge" configuration to produce the desired output. The main advantage of this
bridge circuit is that it does not require a special centre tapped transformer, thereby reducing its size and cost.
The single secondary winding is connected to one side of the diode bridge network and the load to the other side
as shown below.

The Diode Bridge Rectifier

The four diodes labelled D1 to D4 are arranged in "series pairs" with only two diodes conducting current during
each half cycle. During the positive half cycle of the supply, diodes D1 and D2 conduct in series while diodes
D3 and D4 are reverse biased and the current flows through the load as shown below.

The Positive Half-cycle

During the negative half cycle of the supply, diodes D3 and D4 conduct in series, but diodes D1 and D2 switch
"OFF" as they are now reverse biased. The current flowing through the load is the same direction as before.

The Negative Half-cycle

K. Adisesha Page 34


As the current flowing through the load is unidirectional, so the voltage developed across the load is also
unidirectional the same as for the previous two diode full-wave rectifier, therefore the average DC voltage
across the load is 0.637Vmax. However in reality, during each half cycle the current flows through two diodes
instead of just one so the amplitude of the output voltage is two voltage drops ( 2 x 0.7 = 1.4V ) less than the
input VMAX amplitude. The ripple frequency is now twice the supply frequency (e.g. 100Hz for a 50Hz supply)

Typical Bridge Rectifier

Although we can use four individual power diodes to make a full wave bridge rectifier, pre-made bridge
rectifier components are available "off-the-shelf" in a range of different voltage and current sizes that can be
soldered directly into a PCB circuit board or be connected by spade connectors. The image to the right shows a
typical single phase bridge rectifier with one corner cut off. This cut-off corner indicates that the terminal
nearest to the corner is the positive or +ve output terminal or lead with the opposite (diagonal) lead being the
negative or -ve output lead. The other two connecting leads are for the input alternating voltage from a
transformer secondary winding.

The Smoothing Capacitor

We saw in the previous section that the single phase half-wave rectifier produces an output wave every half
cycle and that it was not practical to use this type of circuit to produce a steady DC supply. The full-wave
bridge rectifier however, gives us a greater mean DC value (0.637 Vmax) with less superimposed ripple while
the output waveform is twice that of the frequency of the input supply frequency. We can therefore increase its
average DC output level even higher by connecting a suitable smoothing capacitor across the output of the
bridge circuit as shown below.

Full-wave Rectifier with Smoothing Capacitor

The smoothing capacitor converts the full-wave rippled output of the rectifier into a smooth DC output voltage.
Generally for DC power supply circuits the smoothing capacitor is an Aluminium Electrolytic type that has a
capacitance value of 100uF or more with repeated DC voltage pulses from the rectifier charging up the
capacitor to peak voltage. However, their are two important parameters to consider when choosing a suitable
smoothing capacitor and these are its Working Voltage, which must be higher than the no-load output value of
the rectifier and its Capacitance Value, which determines the amount of ripple that will appear superimposed on
top of the DC voltage. Too low a value and the capacitor has little effect but if the smoothing capacitor is large
enough (parallel capacitors can be used) and the load current is not too large, the output voltage will be almost
as smooth as pure DC. As a general rule of thumb, we are looking to have a ripple voltage of less than 100mV
peak to peak.

K. Adisesha Page 35


The maximum ripple voltage present for a Full Wave Rectifier circuit is not only determined by the value of
the smoothing capacitor but by the frequency and load current, and is calculated as:

Bridge Rectifier Ripple Voltage

Where: I is the DC load current in amps, ƒ is the frequency of the ripple or twice the input frequency in Hertz,
and C is the capacitance in Farads.

The main advantages of a full-wave bridge rectifier is that it has a smaller AC ripple value for a given load and
a smaller reservoir or smoothing capacitor than an equivalent half-wave rectifier. Therefore, the fundamental
frequency of the ripple voltage is twice that of the AC supply frequency (100Hz) where for the half-wave
rectifier it is exactly equal to the supply frequency (50Hz).

The amount of ripple voltage that is superimposed on top of the DC supply voltage by the diodes can be
virtually eliminated by adding a much improved π-filter (pi-filter) to the output terminals of the bridge rectifier.
This type of low-pass filter consists of two smoothing capacitors, usually of the same value and a choke or
inductance across them to introduce a high impedance path to the alternating ripple component. Another more
practical and cheaper alternative is to use a 3-terminal voltage regulator IC, such as a LM78xx for a positive
output voltage or the LM79xx for a negative output voltage which can reduce the ripple by more than 70dB
(Datasheet) while delivering a constant output current of over 1 amp.

The Zener Diode

In the previous Signal Diode tutorial, we saw that a "reverse biased" diode blocks current in the reverse
direction, but will suffer from premature breakdown or damage if the reverse voltage applied across it is too
high. However, the Zener Diode or "Breakdown Diode" as they are sometimes called, are basically the same as
the standard PN junction diode but are specially designed to have a low pre-determined Reverse Breakdown
Voltage that takes advantage of this high reverse voltage. The zener diode is the simplest types of voltage
regulator and the point at which a zener diode breaks down or conducts is called the "Zener Voltage" (Vz).

The Zener diode is like a general-purpose signal diode consisting of a silicon PN junction. When biased in the
forward direction it behaves just like a normal signal diode passing the rated current, but as soon as a reverse
voltage applied across the zener diode exceeds the rated voltage of the device, the diodes breakdown voltage V B
is reached at which point a process called Avalanche Breakdown occurs in the semiconductor depletion layer
and a current starts to flow through the diode to limit this increase in voltage.

The current now flowing through the zener diode increases dramatically to the maximum circuit value (which is
usually limited by a series resistor) and once achived this reverse saturation current remains fairly constant over
a wide range of applied voltages. This breakdown voltage point, VB is called the "zener voltage" for zener
diodes and can range from less than one volt to hundreds of volts.

The point at which the zener voltage triggers the current to flow through the diode can be very accurately
controlled (to less than 1% tolerance) in the doping stage of the diodes semiconductor construction giving the
diode a specific zener breakdown voltage, (Vz) for example, 4.3V or 7.5V. This zener breakdown voltage on
the I-V curve is almost a vertical straight line.

Zener Diode I-V Characteristics

K. Adisesha Page 36


The Zener Diode is used in its "reverse bias" or reverse breakdown mode, i.e. the diodes anode connects to the
negative supply. From the I-V characteristics curve above, we can see that the zener diode has a region in its
reverse bias characteristics of almost a constant negative voltage regardless of the value of the current flowing
through the diode and remains nearly constant even with large changes in current as long as the zener diodes
current remains between the breakdown current IZ(min) and the maximum current rating IZ(max).
This ability to control itself can be used to great effect to regulate or stabilise a voltage source against supply or
load variations. The fact that the voltage across the diode in the breakdown region is almost constant turns out
to be an important application of the zener diode as a voltage regulator. The function of a regulator is to provide
a constant output voltage to a load connected in parallel with it in spite of the ripples in the supply voltage or the
variation in the load current and the zener diode will continue to regulate the voltage until the diodes current
falls below the minimum IZ(min) value in the reverse breakdown region.

The Zener Diode Regulator

Zener Diodes can be used to produce a stabilised voltage output with low ripple under varying load current
conditions. By passing a small current through the diode from a voltage source, via a suitable current limiting
resistor (RS), the zener diode will conduct sufficient current to maintain a voltage drop of Vout. We remember
from the previous tutorials that the DC output voltage from the half or full-wave rectifiers contains ripple
superimposed onto the DC voltage and that as the load value changes so to does the average output voltage. By
connecting a simple zener stabiliser circuit as shown below across the output of the rectifier, a more stable
output voltage can be produced.

Zener Diode Regulator

The resistor, RS is connected in series with the zener diode to limit the current flow through the diode with the
voltage source, VS being connected across the combination. The stabilised output voltage Vout is taken from
across the zener diode. The zener diode is connected with its cathode terminal connected to the positive rail of
the DC supply so it is reverse biased and will be operating in its breakdown condition. Resistor RS is selected so
to limit the maximum current flowing in the circuit.

With no load connected to the circuit, the load current will be zero, ( IL = 0 ), and all the circuit current passes
through the zener diode which inturn dissipates its maximum power. Also a small value of the series resistor R S
will result in a greater diode current when the load resistance RL is connected and large as this will increase the
power dissipation requirement of the diode so care must be taken when selecting the appropriate value of series
resistance so that the zeners maximum power rating is not exceeded under this no-load or high-impedance
condition.

The load is connected in parallel with the zener diode, so the voltage across RL is always the same as the zener
voltage, ( VR = VZ ). There is a minimum zener current for which the stabilization of the voltage is effective and
the zener current must stay above this value operating under load within its breakdown region at all times. The
upper limit of current is of course dependant upon the power rating of the device. The supply voltage V S must
be greater than VZ.

One small problem with zener diode stabiliser circuits is that the diode can sometimes generate electrical noise
on top of the DC supply as it tries to stabilise the voltage. Normally this is not a problem for most applications
but the addition of a large value decoupling capacitor across the zeners output may be required to give
additional smoothing.

Then to summarise a little. A zener diode is always operated in its reverse biased condition. A voltage regulator
circuit can be designed using a zener diode to maintain a constant DC output voltage across the load in spite of

K. Adisesha Page 37


variations in the input voltage or changes in the load current. The zener voltage regulator consists of a current
limiting resistor RS connected in series with the input voltage VS with the zener diode connected in parallel with
the load RL in this reverse biased condition. The stabilized output voltage is always selected to be the same as
the breakdown voltage VZ of the diode.

Example No1

A 5.0V stabilised power supply is required to be produced from a 12V DC power supply input source. The
maximum power rating PZ of the zener diode is 2W. Using the zener regulator circuit above calculate:

a) The maximum current flowing through the zener diode.

b) The minimum value of the series resistor, RS

c) The load current IL if a load resistor of 1kΩ is connected across the Zener diode.

d) The total supply current IS at full load.

Zener Diode Voltages

As well as producing a single stabilised voltage output, zener diodes can also be connected together in series
along with normal silicon signal diodes to produce a variety of different reference voltage output values as
shown below.

Zener Diodes Connected in Series

The values of the individual Zener diodes can be chosen to suit the application while the silicon diode will
always drop about 0.6 - 0.7V in the forward bias condition. The supply voltage, Vin must of course be higher
than the largest output reference voltage and in our example above this is 19v.

A typical zener diode for general electronic circuits is the 500mW, BZX55 series or the larger 1.3W, BZX85
series were the zener voltage is given as, for example, C7V5 for a 7.5V diode giving a diode reference number
of BZX55C7V5. The 500mW series of zener diodes are available from about 2.4 up to about 100 volts and
typically have the same sequence of values as used for the 5% (E24) resistor series with the individual voltage
ratings for these small but very useful diodes are given in the table below.

Zener Diode Clipping Circuits

Diode clipping and clamping circuits are circuits that are used to shape or modify an input AC waveform (or
any sinusoid) producing a differently shape output waveform depending on the circuit arrangement. Diode

K. Adisesha Page 38


clipper circuits are also called limiters because they limit or clip-off the positive (or negative) part of an input
AC signal. As zener clipper circuits limit or cut-off part of the waveform across them, they are mainly used for
circuit protection or in waveform shaping circuits. For example, if we wanted to clip an output waveform at
+7.5V, we would use a 7.5V zener diode. If the output waveform tries to exceed the 7.5V limit, the zener diode
will "clip-off" the excess voltage from the input producing a waveform with a flat top still keeping the output
constant at +7.5V. Note that in the forward bias condition a zener diode is still a diode and when the AC
waveform output goes negative below -0.7V, the zener diode turns "ON" like any normal silicon diode would
and clips the output at -0.7V as shown below.

Square Wave Signal

The back to back connected zener diodes can be used as an AC regulator producing what is jokingly called a
"poor man's square wave generator". Using this arrangement we can clip the waveform between a positive value
of +8.2V and a negative value of -8.2V for a 7.5V zener diode. If we wanted to clip an output waveform
between different minimum and maximum values for example, +8V and -6V, use would simply use two
differently rated zener diodes.

Note that the output will actually clip the AC waveform between +8.7V and -6.7V due to the addition of the
forward biasing diode voltage, which adds another 0.7V voltage drop to it. This type of clipper configuration is
fairly common for protecting an electronic circuit from over voltage. The two zeners are generally placed across
the power supply input terminals and during normal operation, one of the zener diodes is "OFF" and the diodes
have little or no affect. However, if the input voltage waveform exceeds its limit, then the zeners turn "ON" and
clip the input to protect the circuit.

Introduction to Digital Logic Gates

A Digital Logic Gate is an electronic device that makes logical decisions based on the different combinations
of digital signals present on its inputs. A digital logic gate may have more than one input but only has one
digital output. Standard commercially available digital logic gates are available in two basic families or forms,
TTL which stands for Transistor-Transistor Logic such as the 7400 series, and CMOS which stands for
Complementary Metal-Oxide-Silicon which is the 4000 series of chips. This notation of TTL or CMOS refers to
the logic technology used to manufacture the integrated circuit, (IC) or a "chip" as it is more commonly called.

Digital Logic Gate

Generally speaking, TTL IC's use NPN (or PNP) type Bipolar Junction Transistors while CMOS IC's use
Field Effect Transistors or FET's for both their input and output circuitry. As well as TTL and CMOS
technology, simple digital logic gates can also be made by connecting together diodes, transistors and resistors
to produce RTL, Resistor-Transistor logic gates, DTL, Diode-Transistor logic gates or ECL, Emitter-Coupled
logic gates but these are less common now compared to the popular CMOS family.

K. Adisesha Page 39


Integrated Circuits or IC's as they are more commonly called, can be grouped together into families according
to the number of transistors or "gates" that they contain. For example, a simple AND gate my contain only a
few individual transistors, were as a more complex microprocessor may contain many thousands of individual
transistor gates. Integrated circuits are categorised according to the number of logic gates or the complexity of
the circuits within a single chip with the general classification for the number of individual gates given as:

Classification of Integrated Circuits

Small Scale Integration or (SSI) - Contain up to 10 transistors or a few gates within a single package
such as AND, OR, NOT gates.
Medium Scale Integration or (MSI) - between 10 and 100 transistors or tens of gates within a single
package and perform digital operations such as adders, decoders, counters, flip-flops and multiplexers.
Large Scale Integration or (LSI) - between 100 and 1,000 transistors or hundreds of gates and perform
specific digital operations such as I/O chips, memory, arithmetic and logic units.
Very-Large Scale Integration or (VLSI) - between 1,000 and 10,000 transistors or thousands of gates
and perform computational operations such as processors, large memory arrays and programmable logic
devices.
Super-Large Scale Integration or (SLSI) - between 10,000 and 100,000 transistors within a single
package and perform computational operations such as microprocessor chips, micro-controllers, basic
PICs and calculators.
Ultra-Large Scale Integration or (ULSI) - more than 1 million transistors - the big boys that are used in
computers CPUs, GPUs, video processors, micro-controllers, FPGAs and complex PICs.
While the "ultra large scale" ULSI classification is less well used, another level of integration which represents
the complexity of the Integrated Circuit is known as the System-on-Chip or (SOC) for short. Here the
individual components such as the microprocessor, memory, peripherals, I/O logic etc, are all produced on a
single piece of silicon and which represents a whole electronic system within one single chip, literally putting
the word "integrated" into integrated circuit.

Moore's Law

In 1965, Gordon Moore co-founder of the Intel corporation predicted that "The number of transistors and
resistors on a single chip will double every 18 months" regarding the development of semiconductor gate
technology. When Moore made his famous comment way back in 1965 there were approximately only 60
individual transistor gates on a single silicon chip or die. Today, the Intel Corporation have placed around 2.0
Billion individual transistor gates onto its new Quad-core Itanium 64-bit microprocessor chip and the count is
still rising!.

Digital Logic States

The Digital Logic Gate is the basic building block from which all digital electronic circuits and microprocessor
based systems are constructed from. Basic digital logic gates perform logical operations of AND, OR and NOT
on binary numbers. In digital logic design only two voltage levels or states are allowed and these states are
generally referred to as Logic "1" and Logic "0", High and Low, True and False and which are represented in
Boolean Algebra and Truth Tables by the binary digits of "1" and "0" respectively. A good example of a
digital signal is a simple light as it is either "ON" or "OFF" but not both at the same time.

Most digital logic gates and logic systems use "Positive logic", in which a logic level "0" or "LOW" is
represented by a zero voltage, 0v or ground and a logic level "1" or "HIGH" is represented by a higher voltage
such as +5 volts, with the switching from one voltage level to the other, from either a logic level "0" to a "1" or
a "1" to a "0" being made as quickly as possible to prevent any faulty operation of the logic circuit. There also
exists a complementary "Negative Logic" system in which the values and the rules of a logic "0" and a logic "1"
are reversed but in this tutorial section about digital logic gates we shall only refer to the positive logic
convention as it is the most commonly used.
In standard TTL (transistor-transistor logic) IC's there is a pre-defined voltage range for the input and output
voltage levels which define exactly what is a logic "1" level and what is a logic "0" level and these are shown
below.

TTL Input & Output Voltage Levels

K. Adisesha Page 40


There are a large variety of logic gate types in both the bipolar 7400 and the CMOS 4000 families of digital
logic gates such as 74Lxx, 74LSxx, 74ALSxx, 74HCxx, 74HCTxx, 74ACTxx etc, with each one having its own
distinct advantages and disadvantages compared to the other. The exact switching voltage required to produce
either a logic "0" or a logic "1" depends upon the specific logic group or family. However, when using a
standard +5 volt supply any TTL voltage input between 2.0v and 5v is considered to be a logic "1" or "HIGH"
while any voltage input below 0.8v is recognised as a logic "0" or "LOW". The voltage region in between these
two voltage levels either as an input or as an output is called the Indeterminate Region and operating within this
region may cause the logic gate to produce a false output. The CMOS 4000 logic family uses a different level of
voltages compared to the TTL types with a logic "1" level operating between 3.0 and 18 volts and a logic "0"
level below 1.5 volts.

Then from the above observations, we can define the ideal Digital Logic Gate as one that has a "LOW" level
logic "0" of 0 volts (ground) and a "HIGH" level logic "1" of +5 volts and this can be demonstrated as:

Ideal Digital Logic Voltage Levels

Where the opening or closing of the switch produces either a logic level "1" or a logic level "0" with the resistor
R being known as a "pull-up" resistor.

Simple Basic Digital Logic Gates

Simple digital logic gates can be made by combining transistors, diodes and resistors with a simple example of
a Diode-Resistor Logic (DRL) AND gate and a Diode-Transistor Logic (DTL) NAND gate given below.

Diode-Resistor circuit Diode-Transistor circuit

2-input AND gate 2-input NAND gate

The simple 2-input Diode-Resistor AND gate can be converted into a NAND gate by the addition of a single
transistor inverting (NOT) stage. Using discrete components such as diodes, resistors and transistors to make
digital logic gate circuits are not used in practical commercially available logic IC's as these circuits suffer from
propagation delay or gate delay and power loss due to the pull-up resistors, also there is no "Fan-out" facility
which is the ability of a single output to drive many inputs of the next stages. Also this type of design does not

K. Adisesha Page 41


turn fully "OFF" as a Logic "0" produces an output voltage of 0.6v (diode voltage drop), so the following TTL
and CMOS circuit designs are used instead.

Basic TTL Logic Gates

The simple Diode-Resistor AND gate above uses separate diodes for its inputs, one for each input. As a
transistor is made up off two diode circuits connected together representing an NPN or a PNP device, the input
diodes of the DTL circuit can be replaced by one single NPN transistor with multiple emitter inputs as shown.

2-input NAND gate

As the gate contains a single stage inverting NPN transistor circuit (TR2) an output logic level "1" at Q is only
present when both the emitters of TR1 are connected to logic level "0" or ground allowing base current to pass
through the PN junctions of the emitter and not the collector. The multiple emitters of TR1 are connected as
inputs thus producing a NAND gate function.
In standard TTL logic gates, the transistors operate either completely in the "cut off" region, or else completely
in the saturated region, Transistor as a Switch type operation.

Emitter-Coupled Digital Logic Gate

Emitter Coupled Logic or ECL is another type of digital logic gate that uses bipolar transistor logic where the
transistors are not operated in the saturation region, as they are with the standard TTL digital logic gate. Instead
the input and output circuits are push-pull connected transistors with the supply voltage negative with respect to
ground. This has the effect of increasing the speed of operation of the ECL gates up to the Gigahertz range
compared with the standard TTL types, but noise has a greater effect in ECL logic, because the unsaturated
transistors operate within their active region and amplify as well as switch signals.

The "74" Sub-families of Integrated Circuits

With improvements in the circuit design to take account of propagation delays, current consumption, fan-in and
fan-out requirements etc, this type of TTL bipolar transistor technology forms the basis of the prefixed "74"
family of digital logic IC's, such as the "7400" Quad 2-input AND gate, or the "7402" Quad 2-input OR gate.
Sub-families of the 74xx series IC's are available relating to the different technologies used to fabricate the
gates and they are denoted by the letters in between the 74 designation and the device number. There are a
number of TTL sub-families available that provide a wide range of switching speeds and power consumption
such as the 74L00 or 74ALS00 AND gate, were the "L" stands for "Low-power TTL" and the "ALS" stands for
"Advanced Low-power Schottky TTL" and these are listed below.

74xx or 74Nxx: Standard TTL - These devices are the original TTL family of logic gates introduced in
the early 70's. They have a propagation delay of about 10ns and a power consumption of about 10mW.
74Lxx: Low Power TTL - Power consumption was improved over standard types by increasing the
number of internal resistances but at the cost of a reduction in switching speed.
74Hxx: High Speed TTL - Switching speed was improved by reducing the number of internal
resistances. This also increased the power consumption.
74Sxx: Schottky TTL - Schottky technology is used to improve input impedance, switching speed and
power consumption (2mW) compared to the 74Lxx and 74Hxx types.
74LSxx: Low Power Schottky TTL - Same as 74Sxx types but with increased internal resistances to
improve power consumption.
74ASxx: Advanced Schottky TTL - Improved design over 74Sxx Schottky types optimised to increase
switching speed at the expense of power consumption of about 22mW.
74ALSxx: Advanced Low Power Schottky TTL - Lower power consumption of about 1mW and higher
switching speed of about 4nS compared to 74LSxx types.

K. Adisesha Page 42


74HCxx: High Speed CMOS - CMOS technology and transistors to reduce power consumption of less
than 1uA with CMOS compatible inputs.
74HCTxx: High Speed CMOS - CMOS technology and transistors to reduce power consumption of less
than 1uA but has increased propagation delay of about 16nS due to the TTL compatible inputs.

Basic CMOS Digital Logic Gate

One of the main disadvantages of the TTL logic series is that the gates are based on bipolar transistor logic
technology and as transistors are current operated devices, they consume large amounts of power from a fixed
+5 volt power supply. Also, TTL bipolar transistor gates have a limited operating speed when switching from
an "OFF" state to an "ON" state and vice-versa called the "gate" or "propagation delay". To overcome these
limitations complementary MOS called "CMOS" logic gates using "Field Effect Transistors" or FET's were
developed.
As these gates use both P-channel and N-channel MOSFET's as their input device, at quiescent conditions with
no switching, the power consumption of CMOS gates is almost zero, (1 to 2uA) making them ideal for use in
low-power battery circuits and with switching speeds upwards of 100MHz for use in high frequency timing and
computer circuits.

2-input NAND gate
This CMOS gate example contains 3 N-channel MOSFET's, one for each input FET1 and FET2 and one for the
output FET3. When both the inputs A and B are at logic level "0", FET1 and FET2 are both switched "OFF"
giving an output logic "1" from the source of FET3. When one or both of the inputs are at logic level "1" current
flows through the corresponding FET giving an output state at Q equivalent to logic "0", thus producing a
NAND gate function.
Improvements in the circuit design with regards to switching speed, low power consumption and improved
propagation delays has resulted in the standard CMOS 4000 "CD" family of logic IC's being developed that
complement the TTL range. As with the standard TTL digital logic gates, all the major digital logic gates and
devices are available in the CMOS package such as the CD4011, a Quad 2-input NAND gate, or the CD4001, a
Quad 2-input NOR gate along with all their sub-families.
Like TTL logic, complementary MOS (CMOS) circuits take advantage of the fact that both N-channel and P-
channel devices can be fabricated on the same substrate and connected together to form logic functions. One
main disadvantage with the CMOS range of IC's compared to their equivalent TTL types is that they are easily
damaged by static electricity so extra care must be taken when handling these devices. Also unlike TTL logic
gates that operate on single +5V voltages for both their input and output levels, CMOS digital logic gates
operate on a single supply voltage of between +3 and +18 volts.

The Logic "AND" Gate
Definition

A Logic AND Gate is a type of digital logic gate that has an output which is normally at logic level "0" and
only goes "HIGH" to a logic level "1" when ALL of its inputs are at logic level "1". The output of a Logic AND
Gate only returns "LOW" again when ANY of its inputs are at a logic level "0". The logic or Boolean
expression given for a logic AND gate is that for Logical Multiplication which is denoted by a single dot or full
stop symbol, (.) giving us the Boolean expression of: A.B = Q.
Then we can define the operation of a 2-input logic AND gate as being:
"If both A and B are true, then Q is true"

2-input Transistor AND Gate

A simple 2-input logic AND gate can be constructed using RTL Resistor-transistor switches connected together
as shown below with the inputs connected directly to the transistor bases. Both transistors must be saturated
"ON" for an output at Q.

K. Adisesha Page 43


Logic AND Gates are available using digital circuits to produce the desired logical function and is given a
symbol whose shape represents the logical operation of the AND gate.

The Digital Logic "AND" Gate
2-input AND Gate
Symbol Truth Table
B A Q
0 0 0
0 1 0
2-input AND Gate 1 0 0
1 1 1
Boolean Expression Q = A.B Read as A AND B gives Q
Commonly available digital logic AND gate IC's include:

TTL Logic Types CMOS Logic Types
74LS08 Quad 2-input CD4081 Quad 2-input
74LS11 Triple 3-input CD4073 Triple 3-input
74LS21 Dual 4-input CD4082 Dual 4-input
Quad 2-input AND Gate 7408

The Logic "OR" Gate
Definition

A Logic OR Gate or Inclusive-OR gate is a type of digital logic gate that has an output which is normally at
logic level "0" and only goes "HIGH" to a logic level "1" when ANY of its inputs are at logic level "1". The
output of a Logic OR Gate only returns "LOW" again when ALL of its inputs are at a logic level "0". The logic
or Boolean expression given for a logic OR gate is that for Logical Addition which is denoted by a plus sign, (+)
giving us the Boolean expression of: A+B = Q.
Then we can define the operation of a 2-input logic OR gate as being:
"If either A or B is true, then Q is true"

2-input Transistor OR Gate

A simple 2-input logic OR gate can be constructed using RTL Resistor-transistor switches connected together
as shown below with the inputs connected directly to the transistor bases. Either transistor must be saturated
"ON" for an output at Q.

K. Adisesha Page 44


Logic OR Gates are available using digital circuits to produce the desired logical function and is given a
symbol whose shape represents the logical operation of the OR gate.

The Digital Logic "OR" Gate

2-input OR Gate

Symbol Truth Table
B A Q
0 0 0
0 1 1
2-input OR Gate 1 0 1
1 1 1
Boolean Expression Q = A+B Read as A OR B gives Q
Commonly available OR gate IC's include:

CD4075 Triple 3-input
CD4072 Dual 4-input
Quad 2-input OR Gate 7432

In the next tutorial about Digital Logic Gates, we will look at the digital logic NOT Gate function as used in
both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth table.

The Digital Logic "NOT" Gate
Definition

The digital Logic NOT Gate is the most basic of all the logical gates and is sometimes referred to as an
Inverting Buffer or simply a Digital Inverter. It is a single input device which has an output level that is
normally at logic level "1" and goes "LOW" to a logic level "0" when its single input is at logic level "1", in
other words it "inverts" (complements) its input signal. The output from a NOT gate only returns "HIGH" again
when its input is at logic level "0" giving us the Boolean expression of: A = Q.
Then we can define the operation of a single input logic NOT gate as being:
"If A is NOT true, then Q is true"

Transistor NOT Gate

K. Adisesha Page 45


A simple 2-input logic NOT gate can be constructed using a RTL Resistor-transistor switches as shown below
with the input connected directly to the transistor base. The transistor must be saturated "ON" for an inversed
output "OFF" at Q.

Logic NOT Gates are available using digital circuits to produce the desired logical function. The standard NOT
gate is given a symbol whose shape is of a triangle pointing to the right with a circle at its end. This circle is
known as an "inversion bubble" and is used in NOT, NAND and NOR symbols at their output to represent the
logical operation of the NOT function. This bubble denotes a signal inversion (complementation) of the signal
and can be present on either or both the output and/or the input terminals.

The Digital Inverter or NOT gate

Symbol Truth Table
A Q
0 1

Inverter or NOT Gate 1 0

Boolean Expression Q = not A or A Read as inverse of A gives Q
Logic NOT gates provide the complement of their input signal and are so called because when their input signal
is "HIGH" their output state will NOT be "HIGH". Likewise, when their input signal is "LOW" their output
state will NOT be "LOW". As they are single input devices, logic NOT gates are not normally classed as
"decision" making devices or even as a gate, such as the AND or OR gates which have two or more logic
inputs. Commercial available NOT gates IC's are available in either 4 or 6 individual gates within a single i.c.
package.
The "bubble" (o) present at the end of the NOT gate symbol above denotes a signal inversion (complimentation)
of the output signal. But this bubble can also be present at the gates input to indicate an active-LOW input. This
inversion of the input signal is not restricted to the NOT gate only but can be used on any digital circuit or gate
as shown with the operation of inversion being exactly the same whether on the input or output terminal. The
easiest way is to think of the bubble as simply an inverter.

Signal Inversion using Active-low input Bubble

Bubble Notation for Input Inversion
NAND and NOR Gate Equivalents

An Inverter or logic NOT gate can also be made using standard NAND and NOR gates by connecting together
ALL their inputs to a common input signal for example.

K. Adisesha Page 46


Also a very simple inverter can also be made using just a single stage
transistor switching circuit as shown. When the transistors base input at
"A" is high, the transistor conducts and collector current flows producing
a voltage drop across the resistor R thereby connecting the output point
at "Q" to ground thus resulting in a zero voltage output at "Q". When the
transistors base input at "A" is low, the transistor now switches "OFF"
and no collector current flows through the resistor resulting in an output
voltage at "Q" high at a value near to +Vcc.

Then, with an input voltage at "A" HIGH, the output at "Q" will be LOW and an input voltage at "A" LOW the
resulting output voltage at "Q" is HIGH producing the complement of the input signal.

Hex Schmitt Inverters

A standard Inverter or Logic NOT Gate, is usually made up from transistor switching circuits that do not
switch from one state to the next instantly, there is some delay. Also as a transistor is a basic current amplifier,
it can also operate in a linear mode and any small variation to its input level will cause a variation to its output
level or may even switch "ON" and "OFF" several times if there is any noise present in the circuit. One way to
overcome these problems is to use a Schmitt Inverter or Hex Inverter.
We know from the previous pages that all digital gates use only two logic voltage states and that these are
generally referred to as Logic "1" and Logic "0" any TTL voltage input between 2.0v and 5v is recognised as
a logic "1" and any voltage input below 0.8v is recognised as a logic "0" respectively. A Schmitt Inverter is
designed to operate or switch state when its input signal goes above an "Upper Threshold Voltage" limit in
which case the output changes and goes "LOW", and will remain in that state until the input signal falls below
the "Lower Threshold Voltage" level in which case the output signal goes "HIGH". In other words a Schmitt
Inverter has some form of Hysteresis built into its switching circuit. This switching action between an upper
and lower threshold limit provides a much cleaner and faster "ON/OFF" switching output signal and makes the
Schmitt inverter ideal for switching any slow-rising or slow-falling input signal either an analogue or digital
signal.
Schmitt Inverter

A very useful application of Schmitt inverters is when they are used as oscillators or sine-to-square wave
converters for use as square wave clock signals.

Schmitt Inverter Oscillator & Converter

The first circuit shows a very simple low power RC type oscillator using a Schmitt inverter to generate square
waves. Initially the capacitor C is fully discharged so the input to the inverter is "LOW" resulting in an inverted
output which is "HIGH". As the output from the inverter is fed back to its input and the capacitor via the resistor
R the capacitor begins to charge up. When the capacitors charging voltage reaches the upper threshold limit of
the inverter, the inverter changes state, the output becomes "LOW" and the capacitor begins to discharge
through the resistor until it reaches the lower threshold level were the inverter changes state again. This
switching back and forth by the inverter produces a square wave output signal with a 33% duty cycle and whose
frequency is given as: ƒ = 680/RC.

K. Adisesha Page 47


The second circuit converts a sine wave input (or any oscillating input for that matter) into a square wave
output. The input to the inverter is connected to the junction of the potential divider network which is used to
set the quiescent point of the circuit. The input capacitor blocks any DC component present in the input signal
only allowing the sine wave signal to pass. As this signal passes the upper and lower threshold points of the
inverter the output also changes from "HIGH" to "LOW" and so on producing a square wave output waveform.
This circuit produces an output pulse on the positive rising edge of the input waveform, but by connecting a
second Schmitt inverter to the output of the first, the basic circuit can be modified to produce an output pulse on
the negative falling edge of the input signal.

Commonly available logic NOT gate and Inverter IC's include

74LS04 Hex Inverting NOT Gate CD4009 Hex Inverting NOT Gate
74LS04 Hex Inverting NOT Gate CD4069 Hex Inverting NOT Gate
74LS14 Hex Schmitt Inverting NOT Gate
74LS1004 Hex Inverting Drivers

Inverter or NOT Gate 7404

The Logic "NAND" Gate
Definition

The Logic NAND Gate is a combination of the digital logic AND gate with that of an inverter or NOT gate
connected together in series. The NAND (Not - AND) gate has an output that is normally at logic level "1" and
only goes "LOW" to logic level "0" when ALL of its inputs are at logic level "1". The Logic NAND Gate is the
reverse or "Complementary" form of the AND gate we have seen previously.

Logic NAND Gate Equivalence

The logic or Boolean expression given for a logic NAND gate is that for Logical Addition, which is the opposite
to the AND gate, and which it performs on the complements of the inputs. The Boolean expression for a logic
NAND gate is denoted by a single dot or full stop symbol, (.) with a line or Overline, ( ‾‾ ) over the expression
to signify the NOT or logical negation of the NAND gate giving us the Boolean expression of: A.B = Q.
Then we can define the operation of a 2-input logic NAND gate as being:
"If either A or B are NOT true, then Q is true"

Transistor NAND Gate

A simple 2-input logic NAND gate can be constructed using RTL Resistor-transistor switches connected
together as shown below with the inputs connected directly to the transistor bases. Either transistor must be cut-
off "OFF" for an output at Q.

K. Adisesha Page 48


Logic NAND Gates are available using digital circuits to produce the desired logical function and is given a
symbol whose shape is that of a standard AND gate with a circle, sometimes called an "inversion bubble" at its
output to represent the NOT gate symbol with the logical operation of the NAND gate given as.

The Digital Logic "NAND" Gate

2-input NAND Gate

Symbol Truth Table
B A Q
0 0 1
0 1 1
2-input NAND Gate 1 0 1
1 1 0
Boolean Expression Q = A.B Read as A AND B gives NOT Q
The "Universal" NAND Gate

The Logic NAND Gate is generally classed as a "Universal" gate because it is one of the most commonly used
logic gate types. NAND gates can also be used to produce any other type of logic gate function, and in practice
the NAND gate forms the basis of most practical logic circuits. By connecting them together in various
combinations the three basic gate types of AND, OR and NOT function can be formed using only NAND's, for
example.

Various Logic Gates using only NAND Gates

As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can be formed using just
individual NAND gates.

Commonly available logic NAND gate IC's include:

74LS30 Single 8-input
Quad 2-input NAND Gate 7400

The Logic "NOR" Gate

Definition
The Logic NOR Gate or Inclusive-NOR gate is a combination of the digital logic OR gate with that of an
inverter or NOT gate connected together in series. The NOR (Not - OR) gate has an output that is normally at
logic level "1" and only goes "LOW" to logic level "0" when ANY of its inputs are at logic level "1". The Logic
NOR Gate is the reverse or "Complementary" form of the OR gate we have seen previously.

K. Adisesha Page 49


NOR Gate Equivalent

The logic or Boolean expression given for a logic NOR gate is that for Logical Multiplication which it performs
on the complements of the inputs. The Boolean expression for a logic NOR gate is denoted by a plus sign, (+)
with a line or Overline, ( ‾‾ ) over the expression to signify the NOT or logical negation of the NOR gate giving
us the Boolean expression of: A+B = Q.
Then we can define the operation of a 2-input logic NOR gate as being:
"If both A and B are NOT true, then Q is true"

Transistor NOR Gate

A simple 2-input logic NOR gate can be constructed using RTL Resistor-transistor switches connected together
as shown below with the inputs connected directly to the transistor bases. Both transistors must be cut-off
"OFF" for an output at Q.

Logic NOR Gates are available using digital circuits to produce the desired logical function and is given a
symbol whose shape is that of a standard OR gate with a circle, sometimes called an "inversion bubble" at its
output to represent the NOT gate symbol with the logical operation of the NOR gate given as.

The Digital Logic "NOR" Gate
2-input NOR Gate

Symbol Truth Table
B A Q
0 0 1
0 1 0
2-input NOR Gate 1 0 0
1 1 0
Boolean Expression Q = A+B Read as A OR B gives NOT Q
As with the OR function, the NOR function can also have any number of individual inputs and commercial
available NOR Gate IC's are available in standard 2, 3, or 4 input types. If additional inputs are required, then
the standard NOR gates can be cascaded together to provide more inputs for example.

Various Logic Gates using only NOR Gates

K. Adisesha Page 50


As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can also be formed using
just individual NOR gates.
Commonly available NOR gate IC's include:


Quad 2-input NOR Gate 7402

The Exclusive-OR Gate
Definition

Previously, we have seen that for a 2-input OR gate, if A = "1", OR B = "1", OR BOTH A + B = "1" then the
output from the gate is also at logic level "1" and this is known as an Inclusive-OR function because it includes
the case of Q = "1" when both A and B = "1". If however, an output "1" is obtained ONLY when A = "1" or
when B = "1" but NOT both together at the same time, then this type of gate is known as an Exclusive-OR
function or an Ex-Or function for short because it excludes the "OR BOTH" case of Q = "1" when both A and
B = "1".
In other words the output of an Exclusive-OR gate ONLY goes "HIGH" when its two input terminals are at
"DIFFERENT" logic levels with respect to each other and they can both be at logic level "1" or both at logic
level "0" giving us the Boolean expression of: Q = (A B) = A.B + A.B
The Exclusive-OR Gate function is achieved is achieved by combining standard gates together to form more
complex gate functions. An example of a 2-input Exclusive-OR gate is given below.

The Digital Logic "Ex-OR" Gate
2-input Ex-OR Gate

Symbol Truth Table
B A Q
0 0 0
0 1 1
2-input Ex-OR Gate 1 0 1
1 1 0
Boolean Expression Q = A B Read as A OR B but NOT BOTH gives Q
Then, the logic function implemented by a 2-input Ex-OR is given as "either A OR B but NOT both" will give
an output at Q. In general, an Ex-OR gate will give an output value of logic "1" ONLY when there are an ODD
number of 1's on the inputs to the gate. Then an Ex-OR function with more than two inputs is called an "odd
function" or modulo-2-sum (Mod-2-SUM), not an Ex-OR. This description can be expanded to apply to any
number of individual inputs as shown below for a 3-input Ex-OR gate.

Ex-OR Function Realisation using NAND gates

K. Adisesha Page 51


Exclusive-OR Gates are used mainly to build circuits that perform arithmetic operations and calculations
especially Adders and Half-Adders as they can provide a "carry-bit" function or as a controlled inverter, where
one input passes the binary data and the other input is supplied with a control signal.

Commonly available Exclusive-OR gate IC's include:

Quad 2-input Ex-OR Gate 7486

The Exclusive-NOR Gate

Definition

The Exclusive-NOR Gate function or Ex-NOR for short, is a digital logic gate that is the reverse or
complementary form of the Exclusive-OR function we look at in the previous section. It is a combination of the
Exclusive-OR gate and the NOT gate but has a truth table similar to the standard NOR gate in that it has an
output that is normally at logic level "1" and goes "LOW" to logic level "0" when ANY of its inputs are at logic
level "1". However, an output "1" is also obtained if BOTH of its inputs are at logic level "1". For example, A =
"1" and B = "1" at the same time giving us the Boolean expression of: Q = (A B) = A.B + A.B

In other words, the output of an Exclusive-NOR gate ONLY goes "HIGH" when its two input terminals, A and
B are at the "SAME" logic level which can be either at a logic level "1" or at a logic level "0". Then this type of
gate gives and output "1" when its inputs are "logically equal" or "equivalent" to each other, which is why an
Exclusive-NOR gate is sometimes called an Equivalence Gate. The logic symbol for an Exclusive-NOR gate
is simply an Exclusive-OR gate with a circle or "inversion bubble", ( ο ) at its output to represent the NOT
function. Then the Logic Exclusive-NOR Gate is the reverse or "Complementary" form of the Exclusive-OR
gate, ( ) we have seen previously.

Ex-NOR Gate Equivalent

The Exclusive-NOR Gate function is achieved by combining standard gates together to form more complex
gate functions and an example of a 2-input Exclusive-NOR gate is given below.

The Digital Logic "Ex-NOR" Gate

2-input Ex-NOR Gate

Symbol Truth Table
B A Q
0 0 1
0 1 0
2-input Ex-NOR Gate 1 0 0
1 1 1
Boolean Expression Q = A B Read if A AND B the SAME gives Q
Then, the logic function implemented by a 2-input Ex-NOR gate is given as "when both A AND B are the
SAME" will give an output at Q. In general, an Exclusive-NOR gate will give an output value of logic "1"

K. Adisesha Page 52


ONLY when there are an EVEN number of 1's on the inputs to the gate (the inverse of the Ex-OR gate) except
when all its inputs are "LOW". Then an Ex-NOR function with more than two inputs is called an "even
function" or modulo-2-sum (Mod-2-SUM), not an Ex-NOR. This description can be expanded to apply to any
number of individual inputs as shown below for a 3-input Exclusive-NOR gate.

Ex-NOR Gate Equivalent Circuit

One of the main disadvantages of implementing the Ex-NOR function above is that it contains three different
types logic gates the AND, NOT and finally an OR gate within its basic design. One easier way of producing
the Ex-NOR function from a single gate type is to use NAND gates as shown below.

Ex-NOR Function Realisation using NAND gates

Ex-NOR gates are used mainly in electronic circuits that perform arithmetic operations and data checking such
as Adders, Subtractors or Parity Checkers, etc. As the Ex-NOR gate gives an output of logic level "1"
whenever its two inputs are equal it can be used to compare the magnitude of two binary digits or numbers and
so Ex-NOR gates are used in Digital Comparator circuits.

Commonly available Exclusive-NOR gate IC's include:



Quad 2-input Ex-NOR Gate 74266

The Digital Tri-state Buffer
Definition

In a previous tutorial we look at the digital Not Gate or Inverter, and we saw that the NOT gates output is the
"complement" or inverse of its input signal. For example, when its input signal is "HIGH" its output state will
NOT be "HIGH" and when its input signal is "LOW" its output state will NOT be "LOW", in other words it
inverts the signal. Another single input logical device used a lot in electronic circuits and which is the reverse of
the NOT gate inverter is called a Buffer, Digital Buffer or Non-inverting Buffer.
A Digital Buffer is another single input device that does no invert or perform any type of logical operation on
its input signal as its output exactly matches that of its input signal. In other words, its Output equals its Input. It
is a "Non-inverting" device and so will give us the Boolean expression of: Q = A.
Then we can define the operation of a single input Digital Buffer as being:

"If A is true, then Q is true"
K. Adisesha Page 53


The Tri-state Buffer
Symbol Truth Table
A Q
0 0

A Tri-state Buffer 1 1
Boolean Expression Q = A Read as A gives Q
The Digital Tri-state Buffer can also be made by connecting together two NOT gates as shown below. The
first will "invert" the input signal A and the second will "re-invert" it back to its original level.

Double Inversion using NOT Gates

You may think "what is the point of a Digital Buffer", if it does not alter its input signal in any way or make any
logical operations like the AND or OR gates, then why not use a piece of wire instead and that's a good point.
But a non-inverting digital Buffer has many uses in digital electronic circuits, as they can be used to isolate
other gates or circuits from each other or they can be used to drive high current loads such as transistor switches
because their output drive capability is much higher than their input signal requirements, in other words buffers
are uses for power amplification giving them a high fan-out capability.

Buffer Fan-out Example

Fan-out is the output driving capability or output current capability of a logic gate giving greater power
amplification of the signal. It may be necessary to connect more than just one logic gate to the output of another
or to switch a high current load such as an LED, then a Buffer will allow us to do just that by having a high fan-
out rating of up to 50.

The "Tri-state Buffer"

As well as the standard Digital Buffer seen above, there is another type of digital Buffer circuit whose output
can be "electronically" disconnected from its output circuitry when required. This type of Buffer is known as a
3-State Buffer or commonly Tri-state Buffer.
A Tri-state Buffer can be thought of as an input controlled switch which has an output that can be electronically
turned "ON" or "OFF" by means of an external "Control" or "Enable" signal input. This control signal can be
either a logic "0" or a logic "1" type signal resulting in the Tri-state Buffer being in one state allowing its output
to operate normally giving either a logic "0" or logic "1" output. But when activated in the other state it disables
or turns "OFF" its output producing an open circuit condition that is neither "High" or "low", but instead gives
an output state of very high impedance, high-Z, or more commonly Hi-Z. Then this type of device has two
logic state inputs, "0" or a "1" but can produce three different output states, "0", "1" or "Hi-Z" which is why it is
called a "3-state" device.
There are two different types of Tri-state Buffer, one whose output is controlled by an "Active-HIGH" control
signal and the other which is controlled by an "Active-LOW" control signal, as shown below.

Active "HIGH" Tri-state Buffer
Symbol Truth Table
Enable A Q
1 0 0
1 1 1
0 0 Hi-Z
Tri-state Buffer
0 1 Hi-Z
Read as Output = Input if Enable is equal to "1"

K. Adisesha Page 54


An Active-high Tri-state Buffer is activated when a logic level "1" is applied to its "enable" control line and the
data passes through from its input to its output. When the enable control line is at logic level "0", the buffer
output is disabled and a high impedance condition, Hi-Z is present on the output.

Active "LOW" Tri-state Buffer

Symbol Truth Table
Enable A Q
0 0 0
0 1 1
1 0 Hi-Z
Tri-state Buffer
1 1 Hi-Z
Read as Output = Input if Enable is NOT equal to "1"
An Active-low Tri-state Buffer is the opposite to the above, and is activated when a logic level "0" is applied to
its "enable" control line. The data passes through from its input to its output. When the enable control line is at
logic level "1", the buffer output is disabled and a high impedance condition, Hi-Z is present on the output.

Tri-state Buffer Control

The Tri-state Buffer is used in many electronic and microprocessor circuits as they allow multiple logic devices
to be connected to the same wire or bus without damage or loss of data. For example, suppose we have a data
line or data bus with some memory, peripherals, I/O or a CPU connected to it. Each of these devices is capable
of sending or receiving data onto this data bus. If these devices start to send or receive data at the same time a
short circuit may occur when one device outputs to the bus a logic "1" the supply voltage, while another is set at
logic level "0" or ground, resulting in a short circuit condition and possibly damage to the devices.

Then, the Tri-state Buffer can be used to isolate devices and circuits from the data bus and one another. If the
outputs of several Tri-state Buffers are electrically connected together Decoders are used to allow only one Tri-
state Buffer to be active at any one time while the other devices are in their high impedance state. An example
of Tri-state Buffers connected to a single wire or bus is shown below.

Tri-state Buffer Control

It is also possible to connect Tri-state Buffer "back-to-back" to produce a Bi-directional Buffer circuit with one
"active-high buffer" connected in parallel but in reverse with one "active-low buffer". Here, the "enable" control
input acts more like a directional control signal causing the data to be both read "from" and transmitted "to" the
same data bus wire.

Commonly available Digital Buffer and Tri-state Buffer IC's include:

74LS07 Hex Non-inverting Buffer CD4050 Hex Non-inverting Buffer
74LS17 Hex Buffer/Driver CD4503 Hex Tri-state Buffer
74LS244 Octal Buffer/Line Driver HEF40244 Octal Buffer with 3-state Output
74LS245 Octal Bi-directional Buffer
Digital Non-inverting Buffer 7407

K. Adisesha Page 55


Octal Tri-state Buffer 74244

Combinational Logic Circuits

Combinational Logic Circuit, the output is dependent at all times on the combination of its inputs and if one
of its inputs condition changes state so does the output as combinational circuits have "no memory", "timing" or
"feedback loops".

Combinational Logic

Combinational Logic Circuits are made up from basic logic NAND, NOR or NOT gates that are "combined"
or connected together to produce more complicated switching circuits. These logic gates are the building blocks
of combinational logic circuits. An example of a combinational circuit is a decoder, which converts the binary
code data present at its input into a number of different output lines, one at a time producing an equivalent
decimal code at its output.
Combinational logic circuits can be very simple or very complicated and any combinational circuit can be
implemented with only NAND and NOR gates as these are classed as "universal" gates. The three main ways of
specifying the function of a combinational logic circuit are:
Truth Table Truth tables provide a concise list that shows the output values in tabular form for each
possible combination of input variables.
Boolean Algebra Forms an output expression for each input variable that represents a logic "1"
Logic Diagram Shows the wiring and connections of each individual logic gate that implements the
circuit.
and all three are shown below.

As combinational logic circuits are made up from individual logic gates only, they can also be considered as
"decision making circuits" and combinational logic is about combining logic gates together to process two or
more signals in order to produce at least one output signal according to the logical function of each logic gate.
Common combinational circuits made up from individual logic gates that carry out a desired application include
Multiplexers, De-multiplexers, Encoders, Decoders, Full and Half Adders etc.

K. Adisesha Page 56


Classification of Combinational Logic

One of the most common uses of combinational logic is in Multiplexer and De-multiplexer type circuits. Here,
multiple inputs or outputs are connected to a common signal line and logic gates are used to decode an address
to select a single data input or output switch. A multiplexer consist of two separate components, a logic decoder
and some solid state switches, but before we can discuss multiplexers, decoders and de-multiplexers in more
detail we first need to understand how these devices use these "solid state switches" in their design.

The Binary Adder

Another common and very useful combinational logic circuit which can be constructed using just a few basic
logic gates and adds together binary numbers is the Binary Adder circuit. The Binary Adder is made up from
standard AND and Ex-OR gates and allow us to "add" together single bit binary numbers, a and b to produce
two outputs, the SUM of the addition and a CARRY called the Carry-out, ( Cout ) bit. One of the main uses for
the Binary Adder is in arithmetic and counting circuits.

Consider the addition of two denary (base 10) numbers below.

123 A (Augend)
+ 789 B (Addend)
912 SUM
Each column is added together starting from the right hand side and each digit has a weighted value depending
upon its position in the columns. As each column is added together a carry is generated if the result is greater or
equal to ten, the base number. This carry is then added to the result of the addition of the next column to the left
and so on, simple school math's addition. The adding of binary numbers is basically the same as that of adding
decimal numbers but this time a carry is only generated when the result in any column is greater or equal to "2",
the base number of binary.

Binary Addition

Binary Addition follows the same basic rules as for the denary addition above except in binary there are only
two digits and the largest digit is "1", so any "SUM" greater than 1 will result in a "CARRY". This carry 1 is
passed over to the next column for addition and so on. Consider the single bit addition below.

0 0 1 1
+0 +1 +0 +1
0 1 1 10
The single bits are added together and "0 + 0", "0 + 1", or "1 + 0" results in a sum of "0" or "1" until you get to
"1 + 1" then the sum is equal to "2". For a simple 1-bit addition problem like this, the resulting carry bit could
be ignored which would result in an output truth table resembling that of an Ex-OR Gate as seen in the Logic
Gates section and whose result is the sum of the two bits but without the carry. An Ex-OR gate only produces
an output "1" when either input is at logic "1", but not both. However, all microprocessors and electronic
calculators require the carry bit to correctly calculate the equations so we need to rewrite them to include 2 bits
of output data as shown below.
00 00 01 01
+ 00 + 01 + 00 + 01
00 01 01 10
From the above equations we know that an Ex-OR gate will only produce an output "1" when "EITHER" input
is at logic "1", so we need an additional output to produce a carry output, "1" when "BOTH" inputs "A" and "B"

K. Adisesha Page 57


are at logic "1" and a standard AND Gate fits the bill nicely. By combining the Ex-OR gate with the AND gate
results in a simple digital binary adder circuit known commonly as the "Half Adder" circuit.

The Half Adder Circuit
1-bit Adder with Carry-Out

Symbol Truth Table
A B SUM CARRY
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Boolean Expression: Sum = A ⊕ B Carry = A . B
From the truth table we can see that the SUM (S) output is the result of the Ex-OR gate and the Carry-out
(Cout) is the result of the AND gate. One major disadvantage of the Half Adder circuit when used as a binary
adder, is that there is no provision for a "Carry-in" from the previous circuit when adding together multiple data
bits. For example, suppose we want to add together two 8-bit bytes of data, any resulting carry bit would need
to be able to "ripple" or move across the bit patterns starting from the least significant bit (LSB). The most
complicated operation the half adder can do is "1 + 1" but as the half adder has no carry input the resultant
added value would be incorrect. One simple way to overcome this problem is to use a Full Adder type binary
adder circuit.

The Full Adder Circuit
The main difference between the Full Adder and the previous seen Half Adder is that a full adder has three
inputs, the same two single bit binary inputs A and B as before plus an additional Carry-In (C-in) input as
shown below.

Full Adder with Carry-In

Symbol Truth Table
A B C-in Sum C-out
0 0 0 0 0
0 1 0 1 0
1 0 0 1 0
1 1 0 0 1
0 0 1 1 0
0 1 1 0 1
1 0 1 0 1
1 1 1 1 1
Boolean Expression: Sum = A ⊕ B ⊕ C-in
The 1-bit Full Adder circuit above is basically two half adders connected together and consists of three Ex-OR
gates, two AND gates and an OR gate, six logic gates in total. The truth table for the full adder includes an
additional column to take into account the Carry-in input as well as the summed output and carry-output. 4-bit
full adder circuits are available as standard IC packages in the form of the TTL 74LS83 or the 74LS283 which
can add together two 4-bit binary numbers and generate a SUM and a CARRY output. But what if we wanted to
add together two n-bit numbers, then n 1-bit full adders need to be connected together to produce what is known
as the Ripple Carry Adder.

The 4-bit Binary Adder

The Ripple Carry Binary Adder is simply n, full adders cascaded together with each full adder represents a
single weighted column in the long addition with the carry signals producing a "ripple" effect through the binary
adder from right to left. For example, suppose we want to "add" together two 4-bit numbers, the two outputs of
the first full adder will provide the first place digit sum of the addition plus a carry-out bit that acts as the carry-
in digit of the next binary adder. The second binary adder in the chain also produces a summed output (the 2nd
K. Adisesha Page 58


bit) plus another carry-out bit and we can keep adding more full adders to the combination to add larger
numbers, linking the carry bit output from the first full binary adder to the next full adder, and so forth. An
example of a 4-bit adder is given below.

A 4-bit Binary Adder

One main disadvantage of "cascading" together 1-bit binary adders to add large binary numbers is that if
inputs A and B change, the sum at its output will not be valid until any carry-input has "rippled" through every
full adder in the chain. Consequently, there will be a finite delay before the output of a adder responds to a
change in its inputs resulting in the accumulated delay especially in large multi-bit binary adders becoming
prohibitively large. This delay is called Propagation delay. Also "overflow" occurs when an n-bit adder adds
two numbers together whose sum is greater than or equal to 2n

One solution is to generate the carry-input signals directly from the A and B inputs rather than using the ripple
arrangement above. This then produces another type of binary adder circuit called a Carry Look Ahead
Binary Adder were the speed of the parallel adder can be greatly improved using carry-look ahead logic.

The 4-bit Binary Subtractor

Now that we know how to "ADD" together two 4-bit binary numbers
how would we subtract two 4-bit binary numbers, for example, A - B
using the circuit above. The answer is to use 2’s-complement notation
on all the bits in B must be complemented (inverted) and an extra one
added using the carry-input. This can be achieved by inverting each B
input bit using an inverter or NOT-gate.

Also, in the above circuit for the 4-bit binary adder, the first carry-in
input is held LOW at logic "0", for the circuit to perform subtraction
this input needs to be held HIGH at "1". With this in mind a ripple
carry adder can with a small modification be used to perform half
subtraction, full subtraction and/or comparison.

There are a number of 4-bit full-adder ICs available such as the 74LS283 and CD4008. which will add two 4-bit
binary number and provide an additional input carry bit, as well as an output carry bit, so you can cascade them
together to produce 8-bit, 12-bit, 16-bit, etc. adders.

Sequential Logic Basics

Unlike Combinational Logic circuits that change state depending upon the actual signals being applied to their
inputs at that time, Sequential Logic circuits have some form of inherent "Memory" built in to them as they are
able to take into account their previous input state as well as those actually present, a sort of "before" and
"after" is involved with sequential circuits.
In other words, the output state of a sequential logic circuit is a function of the following three states, the
"present input", the "past input" and/or the "past output". Sequential Logic circuits remember these conditions
and stay fixed in their current state until the next clock signal changes one of the states, giving sequential logic
circuits "Memory".
Sequential logic circuits are generally termed as two state or Bistable devices which can have their output or
outputs set in one of two basic states, a logic level "1" or a logic level "0" and will remain "latched" (hence the
name latch) indefinitely in this current state or condition until some other input trigger pulse or signal is applied
which will cause the bistable to change its state once again.

Sequential Logic Representation

K. Adisesha Page 59


The word "Sequential" means that things happen in a "sequence", one after another and in Sequential Logic
circuits, the actual clock signal determines when things will happen next. Simple sequential logic circuits can be
constructed from standard Bistable circuits such as Flip-flops, Latches and Counters and which themselves can
be made by simply connecting together universal NAND Gates and/or NOR Gates in a particular
combinational way to produce the required sequential circuit.

Classification of Sequential Logic

As standard logic gates are the building blocks of combinational circuits, bistable latches and flip-flops are the
building blocks of Sequential Logic Circuits. Sequential logic circuits can be constructed to produce either
simple edge-triggered flip-flops or more complex sequential circuits such as storage registers, shift registers,
memory devices or counters. Either way sequential logic circuits can be divided into the following three main
categories:
1. Event Driven - asynchronous circuits that change state immediately when enabled.
2. Clock Driven - synchronous circuits that are synchronised to a specific clock signal.
3. Pulse Driven - which is a combination of the two that responds to triggering pulses.

As well as the two logic states mentioned above logic level "1" and logic level "0", a third element is introduced
that separates sequential logic circuits from their combinational logic counterparts, namely TIME. Sequential
logic circuits that return back to their original state once reset, i.e. circuits with loops or feedback paths are said
to be "cyclic" in nature.

We now know that in sequential circuits changes occur only on the application of a clock signal making it
synchronous, otherwise the circuit is asynchronous and depends upon an external input. To retain their current
state, sequential circuits rely on feedback and this occurs when a fraction of the output is fed back to the input
and this is demonstrated as:

Sequential Feedback Loop

The two inverters or NOT gates are connected in series with the output at Q fed back to the input.
Unfortunately, this configuration never changes state because the output will always be the same, either a "1" or
a "0", it is permanently set. However, we can see how feedback works by examining the most basic sequential
logic components, called the SR flip-flop.

SR Flip-Flop

The SR flip-flop, also known as a SR Latch, can be considered as one of the most basic sequential logic circuit
possible. This simple flip-flop is basically a one-bit memory bistable device that has two inputs, one which will

K. Adisesha Page 60


"SET" the device (meaning the output = "1"), and is labelled S and another which will "RESET" the device
(meaning the output = "0"), labelled R. Then the SR description stands for "Set-Reset". The reset input resets
the flip-flop back to its original state with an output Q that will be either at a logic level "1" or logic "0"
depending upon this set/reset condition.

A basic NAND gate SR flip-flop circuit provides feedback from both of its outputs back to its opposing inputs
and is commonly used in memory circuits to store a single data bit. Then the SR flip-flop actually has three
inputs, Set, Reset and its current output Q relating to it's current state or history. The term "Flip-flop" relates to
the actual operation of the device, as it can be "flipped" into one logic Set state or "flopped" back into the
opposing logic Reset state.

The NAND Gate SR Flip-Flop

The simplest way to make any basic single bit set-reset SR flip-flop is to connect together a pair of cross-
coupled 2-input NAND gates as shown, to form a Set-Reset Bistable also known as an active LOW SR NAND
Gate Latch, so that there is feedback from each output to one of the other NAND gate inputs. This device
consists of two inputs, one called the Set, S and the other called the Reset, R with two corresponding outputs Q
and its inverse or complement Q (not-Q) as shown below.

The Basic SR Flip-flop

The Set State

Consider the circuit shown above. If the input R is at logic level "0" (R = 0) and input S is at logic level "1" (S =
1), the NAND gate Y has at least one of its inputs at logic "0" therefore, its output Q must be at a logic level "1"
(NAND Gate principles). Output Q is also fed back to input "A" and so both inputs to NAND gate X are at logic
level "1", and therefore its output Q must be at logic level "0". Again NAND gate principals. If the reset input R
changes state, and goes HIGH to logic "1" with S remaining HIGH also at logic level "1", NAND gate Y inputs
are now R = "1" and B = "0". Since one of its inputs is still at logic level "0" the output at Q still remains HIGH
at logic level "1" and there is no change of state. Therefore, the flip-flop circuit is said to be "Latched" or "Set"
with Q = "1" and Q = "0".

Reset State

In this second stable state, Q is at logic level "0", (not Q = "0") its inverse output at Q is at logic level "1", (Q =
"1"), and is given by R = "1" and S = "0". As gate X has one of its inputs at logic "0" its output Q must equal
logic level "1" (again NAND gate principles). Output Q is fed back to input "B", so both inputs to NAND gate Y
are at logic "1", therefore, Q = "0". If the set input, S now changes state to logic "1" with input R remaining at
logic "1", output Q still remains LOW at logic level "0" and there is no change of state. Therefore, the flip-flop
circuits "Reset" state has also been latched and we can define this "set/reset" action in the following truth table.

Truth Table for this Set-Reset Function

State S R Q Q Description
1 0 1 0 Set Q » 1
Set
1 1 1 0 no change
0 1 0 1 Reset Q » 0
Reset
1 1 0 1 no change
0 0 0 1 memory with Q = 0
Invalid
0 0 1 0 memory with Q = 1

It can be seen that when both inputs S = "1" and R = "1" the outputs Q and Q can be at either logic level "1" or
K. Adisesha Page 61


"0", depending upon the state of inputs S or R BEFORE this input condition existed. However, input state R =
"0" and S = "0" is an undesirable or invalid condition and must be avoided because this will give both outputs Q
and Q to be at logic level "1" at the same time and we would normally want Q to be the inverse of Q. However,
if the two inputs are now switched HIGH again after this condition to logic "1", both the outputs will go LOW
resulting in the flip-flop becoming unstable and switch to an unknown data state based upon the unbalance. This
unbalance can cause one of the outputs to switch faster than the other resulting in the flip-flop switching to one
state or the other which may not be the required state and data corruption will exist. This unstable condition is
known as its Meta-stable state.

Then, a bistable SR flip-flop or SR latch is activated or set by a logic "1" applied to its S input and deactivated
or reset by a logic "1" applied to its R. The SR flip-flop is said to be in an "invalid" condition (Meta-stable) if
both the set and reset inputs are activated simultaneously.

As well as using NAND gates, it is also possible to construct simple one-bit SR Flip-flops using two cross-
coupled NOR gates connected in the same configuration. The circuit will work in a similar way to the NAND
gate circuit above, except that the inputs are active HIGH and the invalid condition exists when both its inputs
are at logic level "1", and this is shown below.

The NOR Gate SR Flip-flop

Switch Debounce Circuits

Edge-triggered flip-flops require a nice clean signal transition, and one practical use of this type of set-reset
circuit is as a latch used to help eliminate mechanical switch "bounce". As its name implies, switch bounce
occurs when the contacts of any mechanically operated switch, push-button or keypad are operated and the
internal switch contacts do not fully close cleanly, but bounce together first before closing (or opening) when
the switch is pressed. This gives rise to a series of individual pulses which can be as long as tens of milliseconds
that an electronic system or circuit such as a digital counter may see as a series of logic pulses instead of one
long single pulse and behave incorrectly. For example, during this bounce period the output voltage can
fluctuate wildly and may register multiple input counts instead of one single count. Then set-reset SR Flip-flops
or Bistable Latch circuits can be used to eliminate this kind of problem and this is demonstrated below.

SR Bistable Switch Debounce Circuit

Depending upon the current state of the output, if the set or reset buttons are depressed the output will change
over in the manner described above and any additional unwanted inputs (bounces) from the mechanical action

K. Adisesha Page 62


of the switch will have no effect on the output at Q. When the other button is pressed, the very first contact will
cause the latch to change state, but any additional mechanical switch bounces will also have no effect. The SR
flip-flop can then be RESET automatically after a short period of time, for example 0.5 seconds, so as to
register any additional and intentional repeat inputs from the same switch contacts, for example multiple inputs
from a keyboards "RETURN" key.

Commonly available IC's specifically made to overcome the problem of switch bounce are the MAX6816,
single input, MAX6817, dual input and the MAX6818 octal input switch debouncer IC's. These chips contain
the necessary flip-flop circuitry to provide clean interfacing of mechanical switches to digital systems.

Set-Reset bistable latches can also be used as Monostable (one-shot) pulse generators to generate a single output
pulse, either high or low, of some specified width or time period for timing or control purposes. The 74LS279 is
a Quad SR Bistable Latch IC, which contains four individual NAND type bistable's within a single chip
enabling switch debounce or monostable/astable clock circuits to be easily constructed.

Quad SR Bistable Latch 74LS279

Gated or Clocked SR Flip-Flop

It is sometimes desirable in sequential logic circuits to have a bistable SR flip-flop that only changes state when
certain conditions are met regardless of the condition of either the Set or the Reset inputs. By connecting a 2-
input AND gate in series with each input terminal of the SR Flip-flop a Gated SR Flip-flop can be created. This
extra conditional input is called an "Enable" input and is given the prefix of "EN". The addition of this input
means that the output at Q only changes state when it is HIGH and can therefore be used as a clock (CLK) input
making it level-sensitive as shown below.

Gated SR Flip-flop

When the Enable input "EN" is at logic level "0", the outputs of the two AND gates are also at logic level "0",
(AND Gate principles) regardless of the condition of the two inputs S and R, latching the two outputs Q and Q
into their last known state. When the enable input "EN" changes to logic level "1" the circuit responds as a
normal SR bistable flip-flop with the two AND gates becoming transparent to the Set and Reset signals. This
enable input can also be connected to a clock timing signal adding clock synchronisation to the flip-flop
creating what is sometimes called a "Clocked SR Flip-flop". So a Gated Bistable SR Flip-flop operates as a
standard bistable latch but the outputs are only activated when a logic "1" is applied to its EN input and
deactivated by a logic "0".

The JK Flip-flop
From the previous tutorial we now know that the basic gated SR NAND flip-flop suffers from two basic
problems: number one, the S = 0 and R = 0 condition or S = R = 0 must always be avoided, and number two, if
S or R change state while the enable input is high the correct latching action may not occur. Then to overcome
these two fundamental design problems with the SR flip-flop, the JK flip-Flop was developed.

This simple JK flip-Flop is the most widely used of all the flip-flop designs and is considered to be a universal
flip-flop circuit. The sequential operation of the JK flip-flop is exactly the same as for the previous SR flip-flop
with the same "set" and "reset" inputs. The difference this time is that the JK flip-flop has no invalid or
forbidden input states of the SR Latch (when S and R are both 1).

K. Adisesha Page 63


The JK flip-flop is basically a gated SR flip-flop with the addition of a clock input circuitry that prevents the
illegal or invalid output condition that can occur when both inputs S and R are equal to logic level "1". Due to
this additional clocked input, a JK flip-flop has four possible input combinations, "logic 1", "logic 0", "no
change" and "toggle". The symbol for a JK flip-flop is similar to that of an SR Bistable Latch as seen in the
previous tutorial except for the addition of a clock input.

The Basic JK Flip-flop

Both the S and the R inputs of the previous SR bistable have now been replaced by two inputs called the J and
K inputs, respectively after its inventor Jack Kilby. Then this equates to: J = S and K = R.

The two 2-input AND gates of the gated SR bistable have now been replaced by two 3-input NAND gates with
the third input of each gate connected to the outputs at Q and Q. This cross coupling of the SR flip-flop allows
the previously invalid condition of S = "1" and R = "1" state to be used to produce a "toggle action" as the two
inputs are now interlocked. If the circuit is "SET" the J input is inhibited by the "0" status of Q through the
lower NAND gate. If the circuit is "RESET" the K input is inhibited by the "0" status of Q through the upper
NAND gate. As Q and Q are always different we can use them to control the input. When both inputs J and K
are equal to logic "1", the JK flip-flop toggles as shown in the following truth table.

The Truth Table for the JK Function

Input Output
Description
J K Q Q
0 0 0 0 Memory
same as 0 0 0 1 no change
for the
SR Latch 0 1 1 0
Reset Q » 0
0 1 0 1
1 0 0 1
Set Q » 1
1 0 1 0
toggle 1 1 0 1
Toggle
action 1 1 1 0

Then the JK flip-flop is basically an SR flip-flop with feedback which enables only one of its two input
terminals, either SET or RESET to be active at any one time thereby eliminating the invalid condition seen
previously in the SR flip-flop circuit. Also when both the J and the K inputs are at logic level "1" at the same
time, and the clock input is pulsed either "HIGH", the circuit will "toggle" from its SET state to a RESET state,
or visa-versa. This results in the JK flip-flop acting more like a T-type toggle flip-flop when both terminals are
"HIGH".

Although this circuit is an improvement on the clocked SR flip-flop it still suffers from timing problems called
"race" if the output Q changes state before the timing pulse of the clock input has time to go "OFF". To avoid
this the timing pulse period (T) must be kept as short as possible (high frequency). As this is sometimes not
possible with modern TTL IC's the much improved Master-Slave JK Flip-flop was developed. This eliminates
all the timing problems by using two SR flip-flops connected together in series, one for the "Master" circuit,
which triggers on the leading edge of the clock pulse and the other, the "Slave" circuit, which triggers on the
falling edge of the clock pulse. This results in the two sections, the master section and the slave section being
enabled during opposite half-cycles of the clock signal.

K. Adisesha Page 64


The 74LS73 is a Dual JK flip-flop IC, which contains two individual JK type bistable's within a single chip
enabling single or master-slave toggle flip-flops to be made. Other JK flip-flop IC's include the 74LS107 Dual
JK flip-flop with clear, the 74LS109 Dual positive-edge triggered JK flip-flop and the 74LS112 Dual negative-
edge triggered flip-flop with both preset and clear inputs.

Dual JK Flip-flop 74LS73

The Master-Slave JK Flip-flop

The Master-Slave Flip-Flop is basically two gated SR flip-flops connected together in a series configuration
with the slave having an inverted clock pulse. The outputs from Q and Q from the "Slave" flip-flop are fed back
to the inputs of the "Master" with the outputs of the "Master" flip-flop being connected to the two inputs of the
"Slave" flip-flop. This feedback configuration from the slave's output to the master's input gives the
characteristic toggle of the JK flip-flop as shown below.

The Master-Slave JK Flip-Flop

The input signals J and K are connected to the gated "master" SR flip-flop which "locks" the input condition
while the clock (Clk) input is "HIGH" at logic level "1". As the clock input of the "slave" flip-flop is the inverse
(complement) of the "master" clock input, the "slave" SR flip-flop does not toggle. The outputs from the
"master" flip-flop are only "seen" by the gated "slave" flip-flop when the clock input goes "LOW" to logic level
"0". When the clock is "LOW", the outputs from the "master" flip-flop are latched and any additional changes to
its inputs are ignored. The gated "slave" flip-flop now responds to the state of its inputs passed over by the
"master" section. Then on the "Low-to-High" transition of the clock pulse the inputs of the "master" flip-flop
are fed through to the gated inputs of the "slave" flip-flop and on the "High-to-Low" transition the same inputs
are reflected on the output of the "slave" making this type of flip-flop edge or pulse-triggered.
Then, the circuit accepts input data when the clock signal is "HIGH", and passes the data to the output on the
falling-edge of the clock signal. In other words, the Master-Slave JK Flip-flop is a "Synchronous" device as it
only passes data with the timing of the clock signal.

The D flip-flop

One of the main disadvantages of the basic SR NAND Gate bistable circuit is that the indeterminate input
condition of "SET" = logic "0" and "RESET" = logic "0" is forbidden. This state will force both outputs to be at
logic "1", over-riding the feedback latching action and whichever input goes to logic level "1" first will lose
control, while the other input still at logic "0" controls the resulting state of the latch. In order to prevent this
from happening an inverter can be connected between the "SET" and the "RESET" inputs to produce another
type of flip-flop circuit called a Data Latch, Delay flip-flop, D-type Bistable or simply a D-type flip-flop as it
is more generally called.

The D flip-flop is by far the most important of the clocked flip-flops as it ensures that ensures that inputs S and
R are never equal to one at the same time. D-type flip-flops are constructed from a gated SR flip-flop with an
inverter added between the S and the R inputs to allow for a single D (data) input. This single data input D is
used in place of the "set" signal, and the inverter is used to generate the complementary "reset" input thereby
making a level-sensitive D-type flip-flop from a level-sensitive RS-latch as now S = D and R = not D as shown.
K. Adisesha Page 65


D flip-flop Circuit

We remember that a simple SR flip-flop requires two inputs, one to "SET" the output and one to "RESET" the
output. By connecting an inverter (NOT gate) to the SR flip-flop we can "SET" and "RESET" the flip-flop
using just one input as now the two input signals are complements of each other. This complement avoids the
ambiguity inherent in the SR latch when both inputs are LOW, since that state is no longer possible.

Thus the single input is called the "DATA" input. If this data input is HIGH the flip-flop would be "SET" and
when it is LOW the flip-flop would be "RESET". However, this would be rather pointless since the flip-flop's
output would always change on every data input. To avoid this an additional input called the "CLOCK" or
"ENABLE" input is used to isolate the data input from the flip-flop after the desired data has been stored. The
effect is that D is only copied to the output Q when the clock is active. This then forms the basis of a D flip-
flop.
The D flip-flop will store and output whatever logic level is applied to its data terminal so long as the clock
input is HIGH. Once the clock input goes LOW the "set" and "reset" inputs of the flip-flop are both held at logic
level "1" so it will not change state and store whatever data was present on its output before the clock transition
occurred. In other words the output is "latched" at either logic "0" or logic "1".

Truth Table for the D Flip-flop

Clk D Q Q Description
Memory
↓»0 X Q Q
no change
↑»1 0 0 1 Reset Q » 0
↑»1 1 1 0 Set Q » 1
Note: ↓ and ↑ indicates direction of clock pulse as it is assumed D flip-flops are edge triggered

The Shift Register

The Shift Register is another type of sequential logic circuit that is used for the storage or transfer of data in the
form of binary numbers and then "shifts" the data out once every clock cycle, hence the name "shift register". It
basically consists of several single bit "D-Type Data Latches", one for each bit (0 or 1) connected together in a
serial or daisy-chain arrangement so that the output from one data latch becomes the input of the next latch and
so on. The data bits may be fed in or out of the register serially, i.e. one after the other from either the left or the
right direction, or in parallel, i.e. all together. The number of individual data latches required to make up a
single Shift Register is determined by the number of bits to be stored with the most common being 8-bits wide,
i.e. eight individual data latches.
The Shift Register is used for data storage or data movement and are used in calculators or computers to store
data such as two binary numbers before they are added together, or to convert the data from either a serial to
parallel or parallel to serial format. The individual data latches that make up a single shift register are all driven
by a common clock (Clk) signal making them synchronous devices. Shift register IC's are generally provided
with a clear or reset connection so that they can be "SET" or "RESET" as required.
Generally, shift registers operate in one of four different modes with the basic movement of data through a shift
register being:
Serial-in to Parallel-out (SIPO) - the register is loaded with serial data, one bit at a time, with the
stored data being available in parallel form.
Serial-in to Serial-out (SISO) - the data is shifted serially "IN" and "OUT" of the register, one bit at a
time in either a left or right direction under clock control.
Parallel-in to Serial-out (PISO) - the parallel data is loaded into the register simultaneously and is
shifted out of the register serially one bit at a time under clock control.
Parallel-in to Parallel-out (PIPO) - the parallel data is loaded simultaneously into the register, and
transferred together to their respective outputs by the same clock pulse.
K. Adisesha Page 66


The effect of data movement from left to right through a shift register can be presented graphically as:

Also, the directional movement of the data through a shift register can be either to the left, (left shifting) to the
right, (right shifting) left-in but right-out, (rotation) or both left and right shifting within the same register
thereby making it bidirectional. In this tutorial it is assumed that all the data shifts to the right, (right shifting).

Serial-in to Parallel-out (SIPO)
4-bit Serial-in to Parallel-out Shift Register

The operation is as follows. Lets assume that all the flip-flops (FFA to FFD) have just been RESET (CLEAR
input) and that all the outputs QA to QD are at logic level "0" i.e, no parallel data output. If a logic "1" is
connected to the DATA input pin of FFA then on the first clock pulse the output of FFA and therefore the
resulting QA will be set HIGH to logic "1" with all the other outputs still remaining LOW at logic "0". Assume
now that the DATA input pin of FFA has returned LOW again to logic "0" giving us one data pulse or 0-1-0.
The second clock pulse will change the output of FFA to logic "0" and the output of FFB and QB HIGH to logic
"1" as its input D has the logic "1" level on it from QA. The logic "1" has now moved or been "shifted" one
place along the register to the right as it is now at QA. When the third clock pulse arrives this logic "1" value
moves to the output of FFC (QC) and so on until the arrival of the fifth clock pulse which sets all the outputs Q A
to QD back again to logic level "0" because the input to FFA has remained constant at logic level "0".
The effect of each clock pulse is to shift the data contents of each stage one place to the right, and this is shown
in the following table until the complete data value of 0-0-0-1 is stored in the register. This data value can now
be read directly from the outputs of QA to QD. Then the data has been converted from a serial data input signal
to a parallel data output. The truth table and following waveforms show the propagation of the logic "1" through
the register from left to right as follows.

Basic Movement of Data through a Shift Register
Clock Pulse No QA QB QC QD
0 0 0 0 0
1 1 0 0 0
2 0 1 0 0
3 0 0 1 0
4 0 0 0 1
5 0 0 0 0

K. Adisesha Page 67


Note that after the fourth clock pulse has ended the 4-bits of data (0-0-0-1) are stored in the register and will
remain there provided clocking of the register has stopped. In practice the input data to the register may consist
of various combinations of logic "1" and "0". Commonly available SIPO IC's include the standard 8-bit
74LS164 or the 74LS594.

Serial-in to Serial-out (SISO)

This shift register is very similar to the SIPO above, except were before the data was read directly in a parallel
form from the outputs QA to QD, this time the data is allowed to flow straight through the register and out of the
other end. Since there is only one output, the DATA leaves the shift register one bit at a time in a serial pattern,
hence the name Serial-in to Serial-Out Shift Register or SISO.

The SISO shift register is one of the simplest of the four configurations as it has only three connections, the
serial input (SI) which determines what enters the left hand flip-flop, the serial output (SO) which is taken from
the output of the right hand flip-flop and the sequencing clock signal (Clk). The logic circuit diagram below
shows a generalized serial-in serial-out shift register.

4-bit Serial-in to Serial-out Shift Register

You may think what's the point of a SISO shift register if the output data is exactly the same as the input data.
Well this type of Shift Register also acts as a temporary storage device or as a time delay device for the data,
with the amount of time delay being controlled by the number of stages in the register, 4, 8, 16 etc or by varying
the application of the clock pulses. Commonly available IC's include the 74HC595 8-bit Serial-in/Serial-out
Shift Register all with 3-state outputs.

Parallel-in to Serial-out (PISO)

The Parallel-in to Serial-out shift register acts in the opposite way to the serial-in to parallel-out one above. The
data is loaded into the register in a parallel format i.e. all the data bits enter their inputs simultaneously, to the
parallel input pins PA to PD of the register. The data is then read out sequentially in the normal shift-right mode
from the register at Q representing the data present at PA to PD. This data is outputted one bit at a time on each
clock cycle in a serial format. It is important to note that with this system a clock pulse is not required to
parallel load the register as it is already present, but four clock pulses are required to unload the data.

4-bit Parallel-in to Serial-out Shift Register

As this type of shift register converts parallel data, such as an 8-bit data word into serial format, it can be used
to multiplex many different input lines into a single serial DATA stream which can be sent directly to a
computer or transmitted over a communications line. Commonly available IC's include the 74HC166 8-bit
Parallel-in/Serial-out Shift Registers.

Parallel-in to Parallel-out (PIPO)

The final mode of operation is the Parallel-in to Parallel-out Shift Register. This type of register also acts as a
temporary storage device or as a time delay device similar to the SISO configuration above. The data is
presented in a parallel format to the parallel input pins PA to PD and then transferred together directly to their
respective output pins QA to QA by the same clock pulse. Then one clock pulse loads and unloads the register.
This arrangement for parallel loading and unloading is shown below.

K. Adisesha Page 68


4-bit Parallel-in to Parallel-out Shift Register

The PIPO shift register is the simplest of the four configurations as it has only three connections, the parallel
input (PI) which determines what enters the flip-flop, the parallel output (PO) and the sequencing clock signal
(Clk).
Similar to the Serial-in to Serial-out shift register, this type of register also acts as a temporary storage device or
as a time delay device, with the amount of time delay being varied by the frequency of the clock pulses. Also, in
this type of register there are no interconnections between the individual flip-flops since no serial shifting of the
data is required.

Universal Shift Register
Today, high speed bi-directional "universal" type Shift Registers such as the TTL 74LS194, 74LS195 or the
CMOS 4035 are available as a 4-bit multi-function devices that can be used in either serial-to-serial, left
shifting, right shifting, serial-to-parallel, parallel-to-serial, and as a parallel-to-parallel multifunction data
register, hence the name "Universal". These devices can perform any combination of parallel and serial input to
output operations but require additional inputs to specify desired function and to pre-load and reset the device.

4-bit Universal Shift Register 74LS194

Universal shift registers are very useful digital devices. They can be configured to respond to operations that
require some form of temporary memory, delay information such as the SISO or PIPO configuration modes or
transfer data from one point to another in either a serial or parallel format. Universal shift registers are
frequently used in arithmetic operations to shift data to the left or right for multiplication or division.

Summary of Shift Registers
Then to summarise.
A simple Shift Register can be made using only D-type flip-Flops, one flip-Flop for each data bit.
The output from each flip-Flop is connected to the D input of the flip-flop at its right.
Shift registers hold the data in their memory which is moved or "shifted" to their required positions on
each clock pulse.
Each clock pulse shifts the contents of the register one bit position to either the left or the right.
The data bits can be loaded one bit at a time in a series input (SI) configuration or be loaded
simultaneously in a parallel configuration (PI).
Data may be removed from the register one bit at a time for a series output (SO) or removed all at the
same time from a parallel output (PO).
One application of shift registers is converting between serial and parallel data.
Shift registers are identified as SIPO, SISO, PISO, PIPO, and universal shift registers.

K. Adisesha Page 69

Digital electronics

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