Digital Signal processor ADSP 21XX family
- 1. INTRODUCTION TO DIGITAL SIGNAL PROCESSOR ADSP 21XX FAMILY By, Neeta S. Jadhav(45) Saloni B. Rane(48)
- 2. WHAT IS DSP ? • A digital signal processor (DSP) is a special type of microprocessor that processes data in real time. • DSPs are fabricated on MOS integrated circuit chips. • The goal of a DSP is usually to measure, filter or compress continuous real-world analog signals. • Digital Signal Processors (DSP) take real-world signals like voice, audio, video, temperature, pressure, or position that have been digitized and then mathematically manipulate them. • Its applications focus on the processing of digital data that represents analog signals. • A DSP is designed for performing mathematical functions like "add", "subtract", "multiply" and "divide" very quickly.
- 3. WHY DSP ?? Operations: • Filtering , level detection • encoding/decoding • compression/decompression, • amplification, modulation, pattern matching, mathematical/logical operations and many more. These processes are performed on a signal for a number of reasons: • to enhance it • reduce its component noise • make its transmission and reception more effective, efficient, and faster • make it interact with other signals in special ways • facilitate its use in digital analysis, monitoring, or control; etc. A DSP has built-in capabilities to perform these signal processing functions easily.
- 4. Micro Processor DSP Processor In a DSP processor, instructions are executed in a single clock cycle.In a microprocessor, instructions are executed in multiple clock cycles. In a microprocessor, we do not have any separate memory. In a DSP processor, we have separate data and program memory. In a microprocessor, we have serial execution of instructions. In a DSP processor, we have parallel executions of instructions.. Micro processors are most suitable for general purpose processing. DSP processors are most suitable for array processing. In microprocessors, there is only one main unit for computation, i.e., ALU. In DSP processors, computation is done by ALU, MAC, shifter. In a DSP processor, multiple operands are fetched simultaneously. In a microprocessor, operands are fetched sequentially. In Micro processors, Queing is explicate by 1 que for pipelining of instructions. In DSP processors, Queing is implicate through instruction register and instruction cache. In microprocessors, address/data bus may be separate on chip but are multiplexed off chip. In DSP processors, address and data bus are not multiplexed. They are separated on chip as well as off chip. In microprocessors, Queuing is performed explicate by one que register for pipelining of instructions. In DSP processor, addresses are generated combinedly by DAG's and programs sequencer.In a microprocessor, Program Counter is incremented sequentially to generate address. It takes care of flow of execution. In DSP processor, programs sequencer and instruction register takes care of program flow. Difference between DSP Processor and Micro Processor
- 5. Selection Of DSP Processor Word Length Execution Speed Architectura l Types of Arithmetic Fixed Point Floating Point On-chip Memor y Size I/O Capabili ty Special Instructio n
- 6. 1. It is 16 bit fixed DSP microprocessor. 2. It enhances Harvard architecture for three bus performance. 3. Separate on chip buses for program and data memory. 4. It runs 25 (Million instructions per second)MIPS, 40 ns maximum instruction set 25Mhz frequency. 5. Single cycle instruction execution i.e. True instruction cycle. 6. Independent computational units ALU, MAC and shifter. 7. On chip program and data memories which can be extended off chip. 8. Dual purpose program memory for instruction and data. 9. Single cycle direct access to 16K × 16 of data memory. 10.Single cycle direct access to 16K × 24 of program memory. FEATURES OF ADSP-21xx PROCESSOR
- 7. BASIC ARCHITECTURE OF ADSP-21xx PROCESSOR
- 8. COMPONENTS OF INTERNAL ARCHITECTURE OF ADSP-21xx PROCESSOR High speed numeric processing applications. Two Data Address generators (DAG) Program sequencer On chip peripheral Options Data Memory Timer Serial Port ADSP-21xx architecture consists of Five Internal Buses Program Memory Address(PMA) Data memory address (DMA) Program memory data(PMD) Data memory data (DMD) Result (R) Three Computational Units ALU MAC Shifter
- 9. BUSES The ADSP-21xx processors have five internal buses to ensure data transfer. 1. Program Memory Address(PMA) :- • They are used internally for addresses associated with Program memory. • PMA bus is 14-bits wide allowing direct access of up to 16k words of code and data. 2. Data memory address (DMA) • DMA buses are used internally for addresses associated with data memory. • The DMA bus 14 bits wide allowing direct access of up to 16k words of data. • DMA address comes from two sources. 3. Program memory data(PMD) • PMD bus is 24 bits wide to accommodate the 24 bit instruction width. • The PMD is used for data associated with memory spaces. • The PMD bus can also be used to transfer data to and from the computational units thro direct path or via PMD-DMD bus exchange unit. 4. Data memory data (DMD) • The DMD bus is 16 bit wide. • The DMD are used for data associated with memory spaces. • The DMD bus provides a path for the contents of any register in the processor to be transferred to any other register or to any external data memory location in a single cycle. 5. Result (R) • The Result (R) bus transfers the intermediate results directly between various computational units. • An absolute value specified in the instruction code (direct addressing) or the output of DAG (Indirect addressing).
- 10. COMPUTATIONAL UNITS Every processor in the ADSP-2100 family contains three independent, full function computational units. The processor contains three -independent computational units. a) ALU, b) MAC (Multiplier-accumulator) and c) Barrel shifter. The computational units process 16-bit data directly. ALU is 16 bits wide with two 16 bit input ports and one output port. The ALU provides a standard set of arithmetic and logic functions. a) ALU Features ALU Features Bitwise operators, Constant operators Multi-precision Math Capability Divide Primitives and overflow support. Negate, increment, decrement, Absolute value AND, OR, EX-OR, NOT etc.
- 11. b) MAC: • A MAC operation is simple the sequence of two elementary operations: 1. Two operands are B and C are multiplied 2. The result is added to the accumulator A=A+B*C c)SHIFTER: • The shifter performs a complete set of shifting functions like logical and arithmetic shifts (circular or linear shift) , normalization (fixed point to floating point conversion), demoralization (floating point to fixed point conversion) etc.
- 12. DIGITAL ADDRESS GENERATOR (DAG) Every device in the ADSP-218x family contains two independent data address generators so that both program and data memories can be accessed simultaneously. The DAGs provide indirect addressing capabilities. Both perform automatic address modification. For circular buffers, the DAGs can perform modulo address modification. The two DAGs differ: a) DAG1 generates only Data Memory (DM) addresses, but provides an optional bit- reversal capability; b) DAG2 can generate both Data Memory and Program Memory (PM) addresses, but has no bit-reversal capability.
- 13. PROGRAM SEQUENCER The program sequencer determines the next instruction address by exam- ining both the current instruction being executed and the current state of the processor. If no conditions require otherwise, the DSP executes instructions from program memory in sequential order by incrementing the fetch address.
- 14. Thank you
- 15. REFERENCES • https://en.wikipedia.org/wiki/Digital_signal_processor. • https://www.soundguys.com/what-is-dsp-28013/ • https://www.analog.com/en/design-center/landing-pages/001/beginners-guide-to- dsp.html • https://www.brainkart.com/article/Core-Architecture-Of-ADSP-21xx_13164 • https://studfile.net/preview/3499075/page:3/ • B Venkataramani Bhaskar, “Digital signal processor”, • S Salivahanan, “Digital Signal Processing”, 1st edition, TMH, 2000