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DIRECT MEMORY
ACCESS(DMA)
NAME:HARISH CHANDRA MAHANTA
ROLL NO:18
STREAM:BSC(ITM) 3RD SEM
KUSHAGRA INSTITUTE OF INFORMATION AND MANAGEMENT SCIENCE
 WHAT IS DMA ?
 PRINCIPLE
 DMA OPERATION
 DMA IN COMPUTER ARCHITECTURE
 POTENTIAL IMPROVEMENT OF DMA
 USES
 LIMITATION
 CONCLUSION
CONTENTS
WHAT IS DMA ?
 DIRECT MEMORY ACCESS(DMA) is a feature of modern
computers and microprocessors that allow certain
hardware subsystems within the computer to access
system memory for reading and writing independently
of the central processing unit.
 Many hardware systems use DMA including disk drive
controllers , graphic cards , network cards , and sound
cards.
 DMA is used for transferring data between the local
memory and the main memory .
PRINCIPLE
 DMA is an essential feature of all modern
computers , as it allows devices to transfer data
without subjecting the CPU to a heavy overhead.
 Otherwise , the CPU would have to copy each
piece of data from the source to destination ,
making itself unavailable for other tasks.
 This situation is aggravated because access to I/O
devices over a peripheral bus is generally slower
than the normal system RAM.
DMA OPERATION
 There are three independent channels for DMA
operation :
 SINGLE TRANSFER
 BLOCK TRANSFER
 BRUST BLOCK TRANSFER
SINGLE TRANSFER
 SINGLE TRANSFER – each trigger causes a single
transfer .
 The module will disable itself when DMAXSZ number
of transfers have occurred (setting it to zero prevents
transfer).
 The DMAXSA and DMAXDA registers set the addresses
to be transferred to and from.
 The DMAXCTL register also allows these addresses to
be incremented or decremented by one or two bytes
with each transfer.
BLOCK TRANSFER
 BLOCK TRANSFER – an entire block is transferred
on each trigger .
 The module disables itself when this block
transfer is complete.
 This transfer halts the CPU , and will transfer
each memory location one at a time.
 This module disables the module when the
transfer is complete.
BURST- BLOCK TRANSFER
 BURST BLOCK TRANSFER – this is very similar to
block transfer mode except that the CPU and the
DMA transfer can interleave their operation.
 This reduces the CPU to 20% while the DMA is
going on , but the CPU will not be stopped
altogether.
 The interrupt occurs when the block has
completely transfer and this mode disables the
module when the transfer is complete.
Direct memory access
Direct memory access
USES
 DMA is essential to high performance embedded
systems.
 It is also essential in providing so called zero copy
implementations of peripheral device drivers as well
as functionalities such as network packet routing ,
audio playback and streaming video.
 Normal transfer of one data byte takes up to 29 clock
cycles . The DMA transfer requires only 5 clock cycles.
 Nowadays , DMA can transfer data as fast as 60 M byte
per second.
LIMITATIONS
 Writing to flash requires setting the DMA ON
FETCH bit . If this is not done , the results of the
DMA operation are “unpredictable”.
 Also the behaviour and settings of the DMA
module should only be modified when the module
is disabled.
 Each DMA channel has its own flag but the
interrupt vector is shared with the DAC .
CONCLUSION
DMA is essential to high performance
embedded systems and also playing an
essential feature of all modern
computers , as it allows devices to
transfer data without subjecting the
CPU to a heavy overhead .
Direct memory access

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Direct memory access

  • 1. DIRECT MEMORY ACCESS(DMA) NAME:HARISH CHANDRA MAHANTA ROLL NO:18 STREAM:BSC(ITM) 3RD SEM KUSHAGRA INSTITUTE OF INFORMATION AND MANAGEMENT SCIENCE
  • 2.  WHAT IS DMA ?  PRINCIPLE  DMA OPERATION  DMA IN COMPUTER ARCHITECTURE  POTENTIAL IMPROVEMENT OF DMA  USES  LIMITATION  CONCLUSION CONTENTS
  • 3. WHAT IS DMA ?  DIRECT MEMORY ACCESS(DMA) is a feature of modern computers and microprocessors that allow certain hardware subsystems within the computer to access system memory for reading and writing independently of the central processing unit.  Many hardware systems use DMA including disk drive controllers , graphic cards , network cards , and sound cards.  DMA is used for transferring data between the local memory and the main memory .
  • 4. PRINCIPLE  DMA is an essential feature of all modern computers , as it allows devices to transfer data without subjecting the CPU to a heavy overhead.  Otherwise , the CPU would have to copy each piece of data from the source to destination , making itself unavailable for other tasks.  This situation is aggravated because access to I/O devices over a peripheral bus is generally slower than the normal system RAM.
  • 5. DMA OPERATION  There are three independent channels for DMA operation :  SINGLE TRANSFER  BLOCK TRANSFER  BRUST BLOCK TRANSFER
  • 6. SINGLE TRANSFER  SINGLE TRANSFER – each trigger causes a single transfer .  The module will disable itself when DMAXSZ number of transfers have occurred (setting it to zero prevents transfer).  The DMAXSA and DMAXDA registers set the addresses to be transferred to and from.  The DMAXCTL register also allows these addresses to be incremented or decremented by one or two bytes with each transfer.
  • 7. BLOCK TRANSFER  BLOCK TRANSFER – an entire block is transferred on each trigger .  The module disables itself when this block transfer is complete.  This transfer halts the CPU , and will transfer each memory location one at a time.  This module disables the module when the transfer is complete.
  • 8. BURST- BLOCK TRANSFER  BURST BLOCK TRANSFER – this is very similar to block transfer mode except that the CPU and the DMA transfer can interleave their operation.  This reduces the CPU to 20% while the DMA is going on , but the CPU will not be stopped altogether.  The interrupt occurs when the block has completely transfer and this mode disables the module when the transfer is complete.
  • 11. USES  DMA is essential to high performance embedded systems.  It is also essential in providing so called zero copy implementations of peripheral device drivers as well as functionalities such as network packet routing , audio playback and streaming video.  Normal transfer of one data byte takes up to 29 clock cycles . The DMA transfer requires only 5 clock cycles.  Nowadays , DMA can transfer data as fast as 60 M byte per second.
  • 12. LIMITATIONS  Writing to flash requires setting the DMA ON FETCH bit . If this is not done , the results of the DMA operation are “unpredictable”.  Also the behaviour and settings of the DMA module should only be modified when the module is disabled.  Each DMA channel has its own flag but the interrupt vector is shared with the DAC .
  • 13. CONCLUSION DMA is essential to high performance embedded systems and also playing an essential feature of all modern computers , as it allows devices to transfer data without subjecting the CPU to a heavy overhead .