This document discusses multiplexers, demultiplexers, encoders, and decoders. It provides examples and exercises for designing logic circuits using these components. Specifically, it describes how to use multiplexers and decoders to realize logic functions by mapping the minterms of the function to the inputs/outputs of the components. Exercises are included for designing an 8-to-1 multiplexer from 4-to-1 and 2-to-1 multiplexers, and designing a 4-to-16 decoder from 2-to-4 decoders. Priority encoders and decoders with enables are also covered.