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Hyper-Threading Technology IQxplorer
Outline What is  Hyper-Threading Technology ? Hyper-Threadig Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs  Performance Results Conclusion
Outline What is  Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs  Performance Results Conclusion
Hyper-Threading Technology Simultaneous Multi-threading –  2 logical processors (LP) simultaneously share one physical processor’s execution resources  Appears to software as 2 processors (2-way shared memory multiprocessor)  –  O perating  S ystem schedules software threads/processes to both logical processors  –  Fully compatible to existing multi-processor system software and hardware.  Integral part of Intel Netburst Microarchitecture
Die Size Increase is Small Total die area added is small  – A few small structures duplicated  – Some additional control logic and pointers
Complexity is Large Challenged many basic assumptions  New microarchitecture algorithms – To address new uop (micro-operation)   prioritization issues  – To solve potential new livelock scenarios High logic  design  complexity  Validation Effort  – Explosion of validation space
Outline What is  Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs  Performance Results Conclusion
HT Technology in Intel microprocessors Hyper-Threading is the Intel implementation of simultanious multi-threading Integral part of Intel Netburst Microarchitecture –   e.g. Intel Xeon Processors
Intel Processors with Netburst Microarchitecture Intel Xeon MP Processor  Intel Xeon Processor  Intel Xeon Processor 256 KB 2nd-Level Cache  256 KB 2nd-Level Cache  512 KB 2nd-Level Cache 1 MB 3rd-Level Cache
What was added
Outline What is  Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs  Performance Results Conclusion
Managing Resources Choices –  Partition –  Half of resource dedicated to each logical processor  –  Threshold   –  Flexible resource sharing with limit on maximum  resource usage  –  Full Sharing –  Flexible resource sharing with no limit on maximum resource usage  Considerations –  Throughput and fairness –  Die size and Complexity
Partitioning Half of resource dedicated to each logical processor  –  Simple, low complexity  Good for structures where  –  Occupancy time can be high and unpredictable  –  High average utilization  Major pipeline queues are a good example  –  Provide buffering to avoid pipeline stalls  –  Allow slip between logical processors
Execution Pipeline
Execution Pipeline Partition queues between major pipestages of pipeline
Partitioned Queue Example W ith full sharing, a slow thread can get  unfair share of resources !   So, Partitioning c an prevent a faster thread from making rapid progress.
 
 
 
Partitioned Queue Example Partitioning resource ensures fairness and  ensures progress for both logical processors !
Thresholds Flexible resource sharing with limit on maximum resource usage  Good for small structures where  –  Occupancy time is low and predictable  –  Low average utilization with occasional high peaks  Schedulers are a good example  –  Throughput is high because of data   speculation   (get data regardless of cache hit) –  uOps pass through scheduler very quickly  –  Schedulers are small for speed
Schedulers, Queues 5 schedulers: MEM ALU0 ALU1 FP Move FP/MMX/SSE Threshold prevents one logical processor from consuming all entries   ( Round Robin  until reach threshold)
Variable partitioning allows a logical processor to use most resources when the other doesn’t need them
Full Sharing Flexible resource sharing with no limit on maximum resource usage  Good for large structures where  –  Working set sizes are variable –  Sharing between logical processors possible  –  Not possible for one logical processor to starve  Caches are a good example  –  All caches are shared –  Better overall performance vs. partitioned caches –  Some applications share code and/or data  –  High set associativity minimizes conflict misses. –  Level 2 and 3 caches are 8-way set associative
On   average, a shared cache has 40% better hit rate and 12% better performance for these applications.
Outline What is  Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs   Performance Results Conclusion
Server Performance Good performance benefit from small die area investment
Multi-tasking Larger gains can be realized by running dissimilar  applications due to different resource requirements
Outline What is  Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs  Performance Results Conclusion
Conclusions Hyper-Threading Technology is an integral part of the part of the Netburst Microarchitecture  –  Very little additional die area needed  –  Compelling performance –  Currently enabled for  both  server  and desktop  processors Microarchitecture design choices  –  Resource sharing policy matched to traffic and   performance requirements  New challenging microarchitecture direction
Any Questions ???

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Hyper Threading Technology

  • 2. Outline What is Hyper-Threading Technology ? Hyper-Threadig Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs Performance Results Conclusion
  • 3. Outline What is Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs Performance Results Conclusion
  • 4. Hyper-Threading Technology Simultaneous Multi-threading – 2 logical processors (LP) simultaneously share one physical processor’s execution resources Appears to software as 2 processors (2-way shared memory multiprocessor) – O perating S ystem schedules software threads/processes to both logical processors – Fully compatible to existing multi-processor system software and hardware. Integral part of Intel Netburst Microarchitecture
  • 5. Die Size Increase is Small Total die area added is small – A few small structures duplicated – Some additional control logic and pointers
  • 6. Complexity is Large Challenged many basic assumptions New microarchitecture algorithms – To address new uop (micro-operation) prioritization issues – To solve potential new livelock scenarios High logic design complexity Validation Effort – Explosion of validation space
  • 7. Outline What is Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs Performance Results Conclusion
  • 8. HT Technology in Intel microprocessors Hyper-Threading is the Intel implementation of simultanious multi-threading Integral part of Intel Netburst Microarchitecture – e.g. Intel Xeon Processors
  • 9. Intel Processors with Netburst Microarchitecture Intel Xeon MP Processor Intel Xeon Processor Intel Xeon Processor 256 KB 2nd-Level Cache 256 KB 2nd-Level Cache 512 KB 2nd-Level Cache 1 MB 3rd-Level Cache
  • 11. Outline What is Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs Performance Results Conclusion
  • 12. Managing Resources Choices – Partition – Half of resource dedicated to each logical processor – Threshold – Flexible resource sharing with limit on maximum resource usage – Full Sharing – Flexible resource sharing with no limit on maximum resource usage Considerations – Throughput and fairness – Die size and Complexity
  • 13. Partitioning Half of resource dedicated to each logical processor – Simple, low complexity Good for structures where – Occupancy time can be high and unpredictable – High average utilization Major pipeline queues are a good example – Provide buffering to avoid pipeline stalls – Allow slip between logical processors
  • 15. Execution Pipeline Partition queues between major pipestages of pipeline
  • 16. Partitioned Queue Example W ith full sharing, a slow thread can get unfair share of resources ! So, Partitioning c an prevent a faster thread from making rapid progress.
  • 17.  
  • 18.  
  • 19.  
  • 20. Partitioned Queue Example Partitioning resource ensures fairness and ensures progress for both logical processors !
  • 21. Thresholds Flexible resource sharing with limit on maximum resource usage Good for small structures where – Occupancy time is low and predictable – Low average utilization with occasional high peaks Schedulers are a good example – Throughput is high because of data speculation (get data regardless of cache hit) – uOps pass through scheduler very quickly – Schedulers are small for speed
  • 22. Schedulers, Queues 5 schedulers: MEM ALU0 ALU1 FP Move FP/MMX/SSE Threshold prevents one logical processor from consuming all entries ( Round Robin until reach threshold)
  • 23. Variable partitioning allows a logical processor to use most resources when the other doesn’t need them
  • 24. Full Sharing Flexible resource sharing with no limit on maximum resource usage Good for large structures where – Working set sizes are variable – Sharing between logical processors possible – Not possible for one logical processor to starve Caches are a good example – All caches are shared – Better overall performance vs. partitioned caches – Some applications share code and/or data – High set associativity minimizes conflict misses. – Level 2 and 3 caches are 8-way set associative
  • 25. On average, a shared cache has 40% better hit rate and 12% better performance for these applications.
  • 26. Outline What is Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs Performance Results Conclusion
  • 27. Server Performance Good performance benefit from small die area investment
  • 28. Multi-tasking Larger gains can be realized by running dissimilar applications due to different resource requirements
  • 29. Outline What is Hyper-Threading Technology ? Hyper-Threading Technology in Intel microprocessors Microarchitecture Choices & Tradeoffs Performance Results Conclusion
  • 30. Conclusions Hyper-Threading Technology is an integral part of the part of the Netburst Microarchitecture – Very little additional die area needed – Compelling performance – Currently enabled for both server and desktop processors Microarchitecture design choices – Resource sharing policy matched to traffic and performance requirements New challenging microarchitecture direction