Improved 8 point approximate dct for image and video compression requiring only 14 additions
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This document presents a novel 8-point approximate DCT for image and video compression that uses only 14 additions, eliminating the need for multiplications. The proposed transform, aimed at low energy consumption for video processing systems like HEVC, offers significant reductions in circuit complexity, chip area, and power consumption. The design is mapped to digital prototype circuits using FPGA technology and emphasizes its potential for reconfigurable video standards.
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Improved 8 point approximate dct for image and video compression requiring only 14 additions
- 1. Logic Mind Technologies Vijayangar (Near Maruthi Medicals), Bangalore-40 Ph: 8123668124 // 8123668066 Improved 8-Point Approximate DCT for Image and Video Compression Requiring Only 14 Additions Abstract—Video processing systems such as HEVC requiring low energy consumption needed for the multimedia market has lead to extensive development in fast algorithms for the efficient approximation of 2-D DCT transforms. The DCT is employed in a multitude of compression standards due to its remarkable energy compaction properties. Multiplier-free approximate DCT transforms have been proposed that offer superior compression performance at very low circuit complexity. Such approximations can be realized in digital VLSI hardware using additions and subtractions only, leading to significant reductions in chip area and power consumption compared to conventional DCTs and integer transforms. In this paper, we introduce a novel 8-point DCT approximation that requires only 14 addition operations and no multiplications. The proposed transform possesses low computational complexity and is compared to state-of-the-art DCT approximations in terms of both algorithm complexity and peak signal-to-noise ratio. The proposed DCT approximation is a candidate for reconfigurable video standards such as HEVC. The proposed transform and several other DCT approximations are mapped to systolic-array digital architectures and physically realized as digital prototype circuits using FPGA technology and mapped to 45 nm CMOS technology.
- 2. SOFTWARE REQUIREMENT: ModelSim6.4c. Xilinx 9.1/13.2. HARDWARE REQUIREMENT: FPGA Spartan 3. PROJECT FLOW: First Review: Literature Survey Paper Explanation Design of Project Project Enhancement explanation Second Review: Implementing 40% of Base Paper Third Review Implementing Remaining 60% of Base Paper with Future Enhancement (Modification) For More Details please contact Logic Mind Technologies Vijayangar (NearMaruthi Medicals), Bangalore-40 Ph: 8123668124 // 8123668066 Mail: logicmindtech@gmail.com