![teamvlsi2014@gmail.com Team VLSI Phy•,ic,1/ DC'sig11 Team VLSI
Various files in Physical Design
Like and Subu:ribe Tearn VLSI channel
Technology LEF
• Technology lef contains:
I. LEF Version - 5.5 I 5.6 I 5.7 I 5.8 I
II. Units - DATABASE I TIME I RESISTANCE I
CAPACITANCE I ....
Ill. Manufacturing grid -0.005 I 0.0025 I ..
youtube.com/c/teamvlsi
UNITS
DATABASt MICRONS 2000 ;
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JllSU':"A.'ICI: O~ convertr•ctor : J
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![1t•,lfllVhi)O] ,l (:t'f',llld ll.turn Team VLSI
Various files in Physical Design
I 1k1• ,!IHI 11h111tw f l'dlll II ',I ( h,1111wl
. . .. . Physical MACRO IV
cell size ~
CLASS CORE ;
FOREIGN IV 0 . 000 0 . 000
ORIGIN 0 . 00 0.00
SIZE J. 00 8Y 12 . 00
Terminals s=TRY x y ;
with physical ;~~coR£ '
Placement "-.. · D1REcr10N :t1Pu: ,
" - ANTENNASIZE 1.4 :
PORT
UYE..R. a:etall ;
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END
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Obstructions
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RECT
r. Adam Teman· Bar-llan Universit , Israel.](https://image.slidesharecdn.com/random-240902104437-4f9c2dc2/85/Input-files-for-Physical-Design-Lef-and-tf-file-8-320.jpg)
Input files for Physical Design -> Lef and tf file
- 1. teamvlsi2014@gmail.com youtube.com/c/teamvlsi Team VLSI Physical Design Various files in Physical Design 1) .v file 2) .vhd file 3) .lib file 4) .db file 5) .lef file 6) .tf file 7) .mw file 8) .def file 9) .sdc file 10).tlu file (TLU+ Library) 11) .saif file 12) .spef 13) .sbpf 14) .sdf 15).map 16).itf 17) .io file 18) .tel file 19).rspf 20)Simv 21).gds file Team VLSI like and Suburibe Team VLSI channel IUCI I CRl ■ ~. NOW
- 2. teamvlsi20l 4@gmail.com Team VLSI Physical Design Team VLSI Various files in Physical Design Like and Suburibe Team VLSIchannel 5) LEF file • LEF stands for "Library Exchange Format" file • LEF file is in ASCII format which is readable • A LEF file describing the library has two parts 1. Technology LEF 2. Cell LEF • Technology LEF contains the information of available metal layers, via information, Design rules whereas Cell LEF contains the information related to geometry of each cell's in abstract view. youtube.com/c/teamvlsi
- 3. teamvlsi2014@gmail.com Team VLSI Phy•,ic,1/ DC'sig11 Team VLSI Various files in Physical Design Like and Subu:ribe Tearn VLSI channel Technology LEF • Technology lef contains: I. LEF Version - 5.5 I 5.6 I 5.7 I 5.8 I II. Units - DATABASE I TIME I RESISTANCE I CAPACITANCE I .... Ill. Manufacturing grid -0.005 I 0.0025 I .. youtube.com/c/teamvlsi UNITS DATABASt MICRONS 2000 ; !tw!?S it:.~ HANOSl:CONDS convertr•ctor :} ICA.PAtITAlfC!. ncorAl.lrls t'Ollv•rtr•ctor :1 JllSU':"A.'ICI: O~ convertr•ctor : J lfowtk JUUill'A':"":"S convercr•ctor 1) fetJQ.DIT H!UIA.'t1S conw-.rtr•ctor 1] IVC:t.:Jwl w:..rs convertru:tor : J (t.TAUS.t MICaoafS urconli'ertr•ctor : J f'Ulr.."t»CY 111~?: C011v•rtr•ctor :) 1r:) L'X:?S
- 4. teamvlsi2014@gmail.com Team VLSI l'ily'.ic.il ll, ..,ic11 Various files in Physical Design Technology LEF V. Layer name - poly Icontact Imetall I vial etc VI. Type - Masterslice IRouting I cut etc.. VII. Direction - Horizontal I Vertical VI 11. Pitch IX. Width X. Spacing XI. Resistance (per sq. unit) w idth • • ·- -- - u . - youtube.com/c/teamvlsi • Layer definition must be ordered from bottom to top Team VLSI Like and ~ hCribe Te~m VLSI channel
- 5. teamvlsi2014@gmail.com Team VLSI Physical Design Various files in Physical Design • Cell LEF • Cell LEF contains: I. Cell name - AND2X2 I CLKBUFl I ... II. Class - CORE I PAD Ill. Origin - 0 0 IV. Size (width by height of cell, PR boundary) - 0.95 BY 2.47 V. Symmetry - X Y I X I Y VI. Site - CoreSite I PAD youtube'.com/c/teamvlsi Team VLSI Like and Subw:ribe Team VLSI channel
- 6. teamvlsi2014@gmail.com Team VLSI Physical Design Team VLSI Various files in Physical Design Like and Subw:ribe Te~m VLSI channel • Cell LEF vii. Details of each pins VIII.Pin name - A I BI YI .. IX. Direction -INPUT I OUTPUT I INOUT X. Use -SIGNAL I CLOCK I POWER I GROUND XI. Shape -ABUTMENT in case of pwr and gnd pin XII. Layer metall I metal2 I ... XIII.rectangle coordinates -RECT llx lly urx ury youtube.com/c/teamvlsi USE (ANALOO I CLOCK I GROUND I POWER SIGNAL) Specifies how the pin is used Pin use Is required for timing anatysis. Default· SIGNAL =s- - = nr'I . O.t175 0. 6025 1.0525 END END B PIN Y DIR.tCTION OUTPUT 1 !J!t SIGUAL I l'ORT UY?R utall ; RECT 0 . 7275 0.1725 0.7!US 2.235 : UCT O.ll:75 1 -lOlS o.aou .Z.235 ; PIN 'fdd Oiltctiotf UtOUT: en ,owu J ISKAn Al1fflCDT l POltT U.YUl -tall I UCT 0.0f'15 1.lU 0.lllS 2,SU I Rtct 0. 4425 1.lU o.son l,515 1 uct o 2.405 o.n l.Sl5 ; u.na uu11 : UC'? O.Oll5 0.2015 0.16l5 O.H25 : Uct 0.0125 0 .6275 0.1525 O. H25 : UCT O.ll7S o.nn 0.5975 0.8525 : ltct 0.2171 0 .6275 0.)125 1.71: Rtct O.UlS l.2U 0 . 3525 l.ll :
- 7. t t·.i11ivhil(ll •l (tt 1g11ic.1il.t orn outube.com/c/teamvlsi Team VLSI Team VLSI Various files in Physical Design I 1k1• .11111 ub( 11ht> I t>dlll 1/1 I ( h,mnt>I • Abstract description of the layout for Layout P&R Abstract • Readable ASCII Format. • Contains detailed PIN information for connecting • Does not include front-end of the line (FEOL) layers (poly, diffusion, etc.) data. • Contains blockages for DRC. *Source : This picture is taken from lecture notes of Dr. Adam Teman; Bar-llan University, Israel.
- 8. 1t•,lfllVhi)O] ,l (:t'f',llld ll.turn Team VLSI Various files in Physical Design I 1k1• ,!IHI 11h111tw f l'dlll II ',I ( h,1111wl . . .. . Physical MACRO IV cell size ~ CLASS CORE ; FOREIGN IV 0 . 000 0 . 000 ORIGIN 0 . 00 0.00 SIZE J. 00 8Y 12 . 00 Terminals s=TRY x y ; with physical ;~~coR£ ' Placement "-.. · D1REcr10N :t1Pu: , " - ANTENNASIZE 1.4 : PORT UYE..R. a:etall ; RECT o . ,o ,.DO I.OD , . ,o END EIIDA Obstructions ~ 8S UYE.R. ~tall RECT I. 90 6 . 50 2. 60 1 . 20 RECT r. Adam Teman· Bar-llan Universit , Israel.
- 9. lnnovus as reference Phy~ .. ····■ / Place and Route Layout In gdsll format nming Library Design onstraints .sde flle Popular EDA tools for PnR: lnnovus (Cadence) IC Compiler ( Synopsys ) Olympus SOC ( Mentor Graphics) Other outputs/ Extractions 1. .SPEF file at the time of design import in P&R tool • LEF is also called physical library as it contains layout information of a cell in abstract view • LEF file comes with standard cell library. But in case you want to do P&R of your own costumed designed cell, you would require to generate it's LIB file, LEF file, Verilog file and .gds file • In Cadence Virtuoso, There is an integrated tool vith Virtuoso, called "Abstract" which could generate LEF file • You can refer the abstract tool manual and format for more~details about LEF tion and s ntax.
- 10. teamvlsi2014@gmail.com Team VLSI Physical Design Team VLSI Various files in Physical Design like and Subscribe Team VLSIchannel 6) .tf file • .tf file is called Technology file • Technology file is the most critical input of the physical design tool • This file contains same information as we discussed about technology LEF file. Cadence P&R tool (lnnovus) reads the Technology information in technology LEF format, whereas Synopys P&R tool ( IC Compiler) require technology Information in form of .tf file • Technology file contains detail information about all the metal layers and via and also design rule for them. • Technology file (.tf) is in ASCII format. A basic format of technology file has been demonstrated here. I youtube:com/c/teamvlsi
- 11. • •xyz:• date • •Month CS.y, dJ.eleccr1c • l,:!Se-S un1tT1atN&ae • •n•• t~Prec1.1on • 1000 unu:Len9chNaae • •a1cron• len9thPrec1•1on • 1000 9r1dR.e•oh1c1on • S un1tVoltaoeHaae • •v• volc•o•Prec1•1on • 1000 un1tC'urrentlla&,i! • •I.IA,• eun::entPrec1•1on • 1000 un1tPo'lferN.- • •pv• poverPrec1•1on • 1000 wi1t~••1•tanceNau: • •to!'.a• i:e•1•t.•ncePrec1•1on • 10000000 un1tC.pac1tanceH&ae capac1t ancePrec1a10n un1tlnduct.ance..."laae • • M• 1ndlctat1cePi:ec1a1.on • 100 a1nB•••l1neTe.iperat.1ne • 2S noda•el1neTe11perat.ui:e • 2S -d•••l1.neT•111Ptr•care • 25 nual I r;b0.t1nec1 recilnunany oreenlntenait:y bluelntenn.ty nua2 I robDef1nec1 redlnten•1ty on:enlnten•ity bluelnten.11ty youtube.com/c/teamvlsi • •20 • - 1 ✓1t contains Technology name, and unit of parameters like: Length, Time, Voltage, Current, Power, Resistance, Capacitance and Inductance ✓ Defines different colors with the varying intensity of Red, Green and Blue. These color will be assigned to different layers which will be visible in layout ✓similar to color, there are different patterns of appearance for la1 yers are also defined in this file
- 12. teamvlsi2014@gmail.com 6) .tf file 1aye::Nuaber u•ltN..,. 1•DefaUltIAyez: v1•ll)le ••hcU.ble blink color ll..neStyle pattern Pl..tcb defaultWl.dth ainMl..dth m.inSpacl.ng &ax.Width ainAl:ea OengnRule C layerl layez:2 endOtL1.netnclo•ute layerl layer2 ai~closure youtube.com/c/teamvlsi -us -"ceta12" -l -l -l - 0 -• 123• -"•ol1d• -" •Olld" • 0.36 • 0.16 -1000 • 0.07 Team VLSI I1I' ! i ' )( . I,~ 11 Team VLSI Various files in Physical Design likP and Subutibe Tedm VLSI channel ✓Basically it includes Layer name, Layer Number, Mask Name, and its appearance (like color and pattern) ✓Minimum width of layer, Minimum spacing, Pitch, default width, Minimum area for each layers are defined for each layers (as we have already discussed in technology LEF file) ✓Then it defines Design Rule for via also. It include two ayers, Minimum enc ose an en ine enc osure ✓Then this file includes various Capacitance table ✓Again .tf file and technology LEF file contains same information for different P&R tools.