Instruction Set (Part 2)
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The document discusses different addressing techniques in computer instruction sets, including immediate, direct, indirect, register, register indirect, displacement, and stack addressing. It describes how each addressing technique works, including diagrams to illustrate the addressing process. It also covers related topics like instruction formats, instruction length, allocation of bits in instructions, assemblers, and improvements to assembly languages.
Instruction Set (Part 2)
- 1. Organisasi dan Arsitektur Komputer Ajeng Savitri Puspaningrum, M.Kom Pertemuan 29
- 2. Instruction Set (Part 2)
- 3. Learning Addressing Technique
- 4. Addressing Models Immediate Direct Indirect Register Register Indirect Displacement (Indexed) Stack
- 5. Immediate Addressing Operand is part of instruction Operand = address field e.g. ADD 5 Add 5 to contents of accumulator 5 is operand No memory reference to fetch data Fast Limited range
- 7. Direct Addressing Address field contains address of operand Effective address (EA) = address field (A) e.g. ADD A Add contents of cell A to accumulator Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space
- 8. Direct Addressing Diagram Address AOpcode Instruction Memory Operand
- 9. Indirect Addressing (1) Memory cell pointed to by address field contains the address of (pointer to) the operand EA = (A) Look in A, find address (A) and look there for operand e.g. ADD (A) Add contents of cell pointed to by contents of A to accumulator
- 10. Indirect Addressing (2) Large address space 2n where n = word length May be nested, multilevel, cascaded e.g. EA = (((A))) Draw the diagram yourself Multiple memory accesses to find operand Hence slower
- 11. Indirect Addressing Diagram Address AOpcode Instruction Memory Operand Pointer to operand
- 12. Register Addressing (1) Operand is held in register named in address filed EA = R Limited number of registers Very small address field needed Shorter instructions Faster instruction fetch
- 13. Register Addressing (2) No memory access Very fast execution Very limited address space Multiple registers helps performance Requires good assembly programming or compiler writing N.B. C programming register int a; c.f. Direct addressing
- 14. Register Addressing Diagram Register Address ROpcode Instruction Registers Operand
- 15. Register Indirect Addressing C.f. indirect addressing EA = (R) Operand is in memory cell pointed to by contents of register R Large address space (2n) One fewer memory access than indirect addressing
- 16. Register Indirect Addressing Diagram Register Address ROpcode Instruction Memory OperandPointer to Operand Registers
- 17. Displacement Addressing EA = A + (R) Address field hold two values A = base value R = register that holds displacement or vice versa
- 18. Displacement Addressing Diagram Register ROpcode Instruction Memory OperandPointer to Operand Registers Address A +
- 19. Relative Addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) i.e. get operand from A cells from current location pointed to by PC c.f locality of reference & cache usage
- 20. Base-Register Addressing A holds displacement R holds pointer to base address R may be explicit or implicit e.g. segment registers in 80x86
- 21. Indexed Addressing A = base R = displacement EA = A + R Good for accessing arrays EA = A + R R++
- 22. Combinations Postindex EA = (A) + (R) Preindex EA = (A+(R)) (Draw the diagrams)
- 23. Stack Addressing Operand is (implicitly) on top of stack e.g. ADD Pop top two items from stack and add
- 24. Instruction Formats Layout of bits in an instruction Includes opcode Includes (implicit or explicit) operand(s) Usually more than one instruction format in an instruction set
- 25. Instruction Length Affected by and affects: Memory size Memory organization Bus structure CPU complexity CPU speed Trade off between powerful instruction repertoire and saving space
- 26. Allocation of Bits Number of addressing modes Number of operands Register versus memory Number of register sets Address range Address granularity
- 27. Assembler Machines store and understand binary instructions E.g. N= I + J + K initialize I=2, J=3, K=4 Program starts in location 101 Data starting 201 Code: Load contents of 201 into AC Add contents of 202 to AC Add contents of 203 to AC Store contents of AC to 204 Tedious and error prone
- 28. Improvements Use hexadecimal rather than binary Code as series of lines Hex address and memory address Need to translate automatically using program Add symbolic names or mnemonics for instructions Three fields per line Location address Three letter opcode If memory reference: address Need more complex translation program
- 29. Symbolic Addresses First field (address) now symbolic Memory references in third field now symbolic Now have assembly language and need an assembler to translate Assembler used for some systems programming Compliers I/O routines
- 30. Refference Stalling, William, Computer Organization and Architecture, 10th Edition, Pearson, 2015 Abdurohman, Maman, Organisasi dan Arsitektur Komputer revisi ke-4, Penerbit Informatika, 2017