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Module 3.1_Instruction Types and Addressing modes.pptx

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The document discusses the fundamentals of computer architecture focusing on Instruction Set Architecture (ISA), covering key elements such as instruction types, formats, and addressing modes. It details the characteristics of good ISA, outlines various instruction formats and addressing modes, and provides examples of how operands are handled in different contexts. The document also addresses specific calculations regarding instruction format bits and the range of signed integers for immediate operands.

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MODULE 3 - Fundamentals of Computer Architecture Instruction Sets: Characteristics and Functions Dr. Sunil Kumar Pradhan Associate Professor/SENSE VIT Chennai
Instruction Set Architecture 2 Instruction Set Software Hardware
ISA… 3
Elements of an ISA… Instructions Instruction Formats Addressing Modes Condition Codes Instruction sets 4
What is an Instruction Set? • The complete collection of instructions that are understood by a CPU • Machine Code • Binary • Usually represented by assembly codes
Elements of an Instruction • Operation code (Op code) – Do this • Source Operand reference – To this • Result Operand reference – Put the answer here • Next Instruction Reference – When you have done that, do this...
Simple Instruction Format
Instruction Types • Data processing • Data storage (main memory) • Data movement (I/O) • Program flow control
INSTRUCTION FORMATS 13
Number of Addresses (a) • 3 addresses – Operand 1, Operand 2, Result – a = b + c; – May be a forth - next instruction (usually implicit) – Not common – Needs very long words to hold everything
Module 3.1_Instruction Types and Addressing modes.pptx
Module 3.1_Instruction Types and Addressing modes.pptx
Number of Addresses (c) • 1 address – Implicit second address – Usually a register (accumulator) – Common on early machines
Module 3.1_Instruction Types and Addressing modes.pptx
Number of Addresses (d) • 0 (zero) addresses – All addresses implicit – Uses a stack – e.g. push a – push b – add – pop c – c = a + b
Module 3.1_Instruction Types and Addressing modes.pptx
Characteristics of good ISA Must be Clear Less usage of complex instructions Ease of compilation Ease of implementation 22
Instruction Formats… A machine has 24 bits instruction format. It has 32 registers and each of which is 32 bit long. It needs to support 49 instructions. Each instruction has two register operands and one immediate operand. If the immediate operand is signed integer, then the minimum value of it can be ________? 23
Instruction Formats… A machine has 24 bits instruction format. It has 32 registers and each of which is 32 bit long. It needs to support 49 instructions. Each instruction has two register operands and one immediate operand. If the immediate operand is signed integer, then the minimum value of it can be ________? • Instruction = 24bits (opcode,reg1,reg2,immediate_operand) • Opcode implies the instruction number => 49 instructions can be represented using 6bits (26 =64 instructions and 25 =32 instructions ) • 32 Registers can be represented using 5bits (25 =32) • 2 registers in instruction = 10 bits • Immediate operand = 8 bits (24-6-5-5) • Signed integer for immediate operand hence range = -128 to 127 • Hence, minimum value = -128 24
Addressing Modes
Addressing Modes • Microprocessor executes the instructions stored in memory (RAM). • It executes one instruction at a time. • Each of the instruction contains operations and operands. • Operation specifies the type of action to be performed. • For example: ADD, SUB, MOV, INC, LOAD, STORE • Operands are the data on which the operation is to be performed. MOV B, A ADD B Here MOV is operation and (B & A) are operands. Here ADD is operation and (B) is operand.
Addressing Modes • Operand can be place either in one of the processor register or in memory. • There are different ways to get the operands. • The way in which the operand is taken from register or memory is named as addressing mode.
Addressing Modes 1. Immediate Addressing Mode 2. Register Addressing Mode 3. Register Indirect Addressing Mode 4. Direct Addressing Mode 5. Indirect Addressing Mode 6. Implied Addressing Mode 7. Relative Addressing Mode 8. Indexed Addressing Mode 9. Base Register Addressing Mode 10. Autoincrement or Autodecrement Addressing Mode
1. Immediate Addressing Mode • The operand is specified with in the instruction. • Operand itself is provided in the instruction rather than its address. Move Immediate MVI A , 15h A ← 15h Here 15h is the immediate operand Add Immediate ADI 3Eh A ← A + 3Eh Here 3Eh is the immediate operand
2. Register Addressing Mode • The operand is specified with in one of the processor register. • Instruction specifies the register in which the operand is stored. Move C ← A Here A is the operand specified in register MOV C , A Add Here B is the operand specified in register ADD B A ← A + B
3. Register Indirect Addressing Mode • The instruction specifies the register in which the memory address of operand is placed. • It do not specify the operand itself but its location with in the memory where operand is placed. Move A ← [[H][L]] MOV A , M It moves the data from memory location specified by HL register pair to A.
3. Register Indirect Addressing Mode 2807 2806 2805 A9 2804 2803 2802 2801 2800 H 28 L 05 2807 2806 2805 A9 2804 2803 2802 2801 2800 A A9 MOV A , M A ← [[H][L]] It moves the data from memory location specified by HL register pair to A. Before After A H 28 L 05 A ← [2805] A ← A9
4. Direct Addressing Mode • The instruction specifies the direct address of the operand. • The memory address is specified where the actual operand is. Load Accumulator LDA 2805h A ← [2805] It loads the data from memory location 2805 to A. Store Accumulator STA 2803h [2803] ← A It stores the data from A to memory location 2803.
4. Direct Addressing Mode LDA 2805h A ← [2805] It loads the data from memory location 2805 to A. Before After 2807 2806 2805 5C 2804 2803 2802 2801 2800 A 2807 2806 2805 5C 2804 2803 2802 2801 2800 A 5C A ← [2805] A ← 5C
4. Direct Addressing Mode STA 2803h [2803] ← A It stores the data from A to memory location 2803. Before After 2807 2806 2805 2804 2803 2802 2801 2800 A 9B 2807 2806 2805 2804 2803 9B 2802 2801 2800 A 9B [2803] ← A [2803] ← 9B
5. Indirect Addressing Mode • The instruction specifies the indirect address where the effective address of the operand is placed. • The memory address is specified where the actual address of operand is placed. Move MOV A, 2802h A ← [[2802]] It moves the data from memory location specified by the location 2802 to A.
5. Indirect Addressing Mode MOV A, 2802h A ← [[2802]] It moves the data from memory location specified by the location 2802 to A. Before After 2807 2806 FF 2805 2804 2803 06 2802 28 2801 2800 A 2807 2806 FF 2805 2804 2803 06 2802 28 2801 2800 A FF A ← [[2802]] A ← FF
6. Implied Addressing Mode • It is also called inherent addressing mode. • The operand is implied by the instruction. • The operand is hidden/fixed inside the instruction. Complement Accumulator CMA (Here accumulator A is implied by the instruction) Complement Carry Flag CMC (Here Flags register is implied by the instruction) Set Carry Flag STC (Here Flags register is implied by the instruction)
7. Relative Addressing Mode • In relative addressing mode, contents of Program Counter PC is added to address part of instruction to obtain effective address. • The address part of the instruction is called as offset and it can +ve or –ve. • When the offset is added to the PC the resultant number is the memory location where the operand will be placed.
Effective address of operand = 2806h 7. Relative Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F PC 2801 Offset = 04h Effective address of operand = PC + 01 + offset Effective address of operand = 2801 + 01 + 04 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Actual Operand
Effective address of operand = 2807h 7. Relative Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F PC 2803 Offset = 03h Effective address of operand = PC + 01 + offset Effective address of operand = 2803 + 01 + 03 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Actual Operand
8. Indexed Addressing Mode • In index addressing mode, contents of Index register is added to address part of instruction to obtain effective address. • The address part of instruction holds the beginning/base address and is called as base. • The index register hold the index value, which is +ve. • Base remains same, the index changes. • When the base is added to the index register the resultant number is the memory location where the operand will be placed.
2800h + 0001h = 2801h 2800h + 0002h = 2802h 2800h + 0000h = 2800h 2800h + 0003h = 2803h 8. Indexed Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0000 Base = 2800h Effective address of operand = Base + IX 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0001 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0002 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0003
2802h + 0001h = 2803h 2802h + 0002h = 2804h 2802h + 0000h = 2802h 2802h + 0003h = 2805h 8. Indexed Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0000 Base = 2802h Effective address of operand = Base + IX 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0001 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0002 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0003
9. Base Register Addressing Mode • In base register addressing mode, contents of base register is added to address part of instruction to obtain effective address. • It is similar to the indexed addressing mode except the register now is called as base instead of index. • The base register hold the beginning/base address. • The address part of instruction holds the offset. • Offset remains same, the base changes. • When the offset is added to the base register the resultant number is the memory location where the operand will be placed.
9. Base Register Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Base 2800 Offset= 0001h Effective address of operand = Base Register + offset 2800h + 0001h = 2801h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2801h + 0001h = 2802h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2802h + 0001h = 2803h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2803h + 0001h = 2804h Base 2801 Base 2802 Base 2803
9. Base Register Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Base 2800 Offset= 0003h Effective address of operand = Base Register + offset 2800h + 0003h = 2803h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2801h + 0003h = 2804h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2802h + 0003h = 2805h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2803h + 0003h = 2806h Base 2801 Base 2802 Base 2803
10. Autoincrement or Autodecrement Addressing Mode • It is similar to register indirect addressing mode. • Here the register is incremented or decremented before or after its value is used.
1st Time 2nd Time 3rd Time 4th Time 10. Autoincrement or Autodecrement Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2802 At start: 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2803 HL 2804 HL 2805 HL pair incremented after its value is used HL 2802
1st Time 2nd Time 3rd Time 4th Time 10. Autoincrement or Autodecrement Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2803 At start: 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2805 HL 2806 HL 2807 HL pair incremented before its value is used HL 2804
Discussion problem Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 Address 200 201 202 Memory 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 PC = Program Counter R1 = Register XR = Index Register AC = Accumulator • Memory is having first instruction to load AC • Mode will specify the addressing mode to get operand. • Address field of instruction is 500. Find out the effective address of operand and operand value by considering different addressing modes. LDA 500; Load the accumulator (AC) register with the value as indicated by 500
Example problem Address Memory 200 201 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 202 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 1. Immediate Addressing Mode • As instruction contains immediate number 500. • It is stored as address 201. Effective Address = 201 Operand = 500 AC 500
Example problem Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 Address 200 201 202 Memory 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 2. Register Addressing Mode • Register R1 contains 400. • As operand is in register so no any memory location. Effective Address = Nil Operand = 400 AC 400
Example problem Address 200 201 202 Memory 399 400 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 500 600 702 PC 200 R1 400 XR 100 AC 800 3. Register Indirect Addressing Mode • Register R1 contains 400. • So effective address of operand is 400. • The data stored at 400 is 700. Effective Address = 400 Operand = 700 AC 700
Example problem Address 200 201 202 Memory 399 400 500 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 600 702 PC 200 R1 400 XR 100 AC 800 4. Direct Addressing Mode • Instruction contains the address 500. • So effective address of operand is 500. • The data stored at 500 is 800. Effective Address = 500 Operand = 800 AC 800
Example problem Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 Address 200 201 202 Memory 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 5. Indirect Addressing Mode • Instruction contains the address 500. • Address at 500 is 800. • So effective address of operand is 800. • The data stored at 800 is 300. Effective Address = 800 Operand = 300 AC 300
Example problem Address 200 201 202 Memory 399 400 500 600 702 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 PC 200 R1 400 XR 100 AC 800 6. PC Relative Addressing Mode • PC = 200. • Offset = 500. • Instruction is of 2 bytes. • So effective address = PC + 2 + offset = 200 + 500 +2 = 702 . • The data stored at 702 is 325. Effective Address = 702 Operand = 325 AC 325
Example problem Address 200 201 202 Memory 399 400 500 600 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 702 PC 200 R1 400 XR 100 AC 800 7. Index Register Relative Addressing Mode • XR = 100. • Base = 500. • So effective address = Base + XR = 500 + 100 = 600 . • The data stored at 600 is 900. Effective Address = 600 Operand = 900 AC 900
Example problem Address 200 201 202 Memory 399 400 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 500 600 702 PC 200 R1 400 XR 100 AC 800 8. Autoincrement Addressing Mode • It is same as register indirect addressing mode except the contents of R1 are incremented after the execution. • R1 contains 400. • So effective address of operand is 400. • The data stored at 400 is 700. Effective Address = 400 Operand = 700 AC 700 R1 401
Example problem Address 200 201 202 Memory 399 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 400 500 600 702 PC 200 R1 400 XR 100 AC 800 9. Autodecrement Addressing Mode • It is same as register indirect addressing mode except the contents of R1 are decremented before the execution. • R1 contains 400. • R1 is first decremented to 399. • So effective address of operand is 399. • The data stored at 399 is 450. Effective Address = 399 Operand = 450 AC 450 R1 399
Solution for problem Addressing Mode Effective Address Operand Immediate Addressing Mode 201 500 Register Addressing Mode Nil 400 Register Indirect Addressing Mode 400 700 Direct Addressing Mode 500 800 Indirect Addressing Mode 800 300 Relative Addressing Mode 702 325 Indexed Addressing Mode 600 900 Autoincrement Addressing Mode 400 700 Autodecrement Addressing Mode 399 450
INSTRUCTION TYPES 65
Instruction Types 66
Instruction Types… 67
Instruction Types… 68
69 Instruction Types…

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Module 3.1_Instruction Types and Addressing modes.pptx

  • 1. MODULE 3 - Fundamentals of Computer Architecture Instruction Sets: Characteristics and Functions Dr. Sunil Kumar Pradhan Associate Professor/SENSE VIT Chennai
  • 4. Elements of an ISA… Instructions Instruction Formats Addressing Modes Condition Codes Instruction sets 4
  • 5. What is an Instruction Set? • The complete collection of instructions that are understood by a CPU • Machine Code • Binary • Usually represented by assembly codes
  • 6. Elements of an Instruction • Operation code (Op code) – Do this • Source Operand reference – To this • Result Operand reference – Put the answer here • Next Instruction Reference – When you have done that, do this...
  • 8. Instruction Types • Data processing • Data storage (main memory) • Data movement (I/O) • Program flow control
  • 10. Number of Addresses (a) • 3 addresses – Operand 1, Operand 2, Result – a = b + c; – May be a forth - next instruction (usually implicit) – Not common – Needs very long words to hold everything
  • 13. Number of Addresses (c) • 1 address – Implicit second address – Usually a register (accumulator) – Common on early machines
  • 15. Number of Addresses (d) • 0 (zero) addresses – All addresses implicit – Uses a stack – e.g. push a – push b – add – pop c – c = a + b
  • 17. Characteristics of good ISA Must be Clear Less usage of complex instructions Ease of compilation Ease of implementation 22
  • 18. Instruction Formats… A machine has 24 bits instruction format. It has 32 registers and each of which is 32 bit long. It needs to support 49 instructions. Each instruction has two register operands and one immediate operand. If the immediate operand is signed integer, then the minimum value of it can be ________? 23
  • 19. Instruction Formats… A machine has 24 bits instruction format. It has 32 registers and each of which is 32 bit long. It needs to support 49 instructions. Each instruction has two register operands and one immediate operand. If the immediate operand is signed integer, then the minimum value of it can be ________? • Instruction = 24bits (opcode,reg1,reg2,immediate_operand) • Opcode implies the instruction number => 49 instructions can be represented using 6bits (26 =64 instructions and 25 =32 instructions ) • 32 Registers can be represented using 5bits (25 =32) • 2 registers in instruction = 10 bits • Immediate operand = 8 bits (24-6-5-5) • Signed integer for immediate operand hence range = -128 to 127 • Hence, minimum value = -128 24
  • 21. Addressing Modes • Microprocessor executes the instructions stored in memory (RAM). • It executes one instruction at a time. • Each of the instruction contains operations and operands. • Operation specifies the type of action to be performed. • For example: ADD, SUB, MOV, INC, LOAD, STORE • Operands are the data on which the operation is to be performed. MOV B, A ADD B Here MOV is operation and (B & A) are operands. Here ADD is operation and (B) is operand.
  • 22. Addressing Modes • Operand can be place either in one of the processor register or in memory. • There are different ways to get the operands. • The way in which the operand is taken from register or memory is named as addressing mode.
  • 23. Addressing Modes 1. Immediate Addressing Mode 2. Register Addressing Mode 3. Register Indirect Addressing Mode 4. Direct Addressing Mode 5. Indirect Addressing Mode 6. Implied Addressing Mode 7. Relative Addressing Mode 8. Indexed Addressing Mode 9. Base Register Addressing Mode 10. Autoincrement or Autodecrement Addressing Mode
  • 24. 1. Immediate Addressing Mode • The operand is specified with in the instruction. • Operand itself is provided in the instruction rather than its address. Move Immediate MVI A , 15h A ← 15h Here 15h is the immediate operand Add Immediate ADI 3Eh A ← A + 3Eh Here 3Eh is the immediate operand
  • 25. 2. Register Addressing Mode • The operand is specified with in one of the processor register. • Instruction specifies the register in which the operand is stored. Move C ← A Here A is the operand specified in register MOV C , A Add Here B is the operand specified in register ADD B A ← A + B
  • 26. 3. Register Indirect Addressing Mode • The instruction specifies the register in which the memory address of operand is placed. • It do not specify the operand itself but its location with in the memory where operand is placed. Move A ← [[H][L]] MOV A , M It moves the data from memory location specified by HL register pair to A.
  • 27. 3. Register Indirect Addressing Mode 2807 2806 2805 A9 2804 2803 2802 2801 2800 H 28 L 05 2807 2806 2805 A9 2804 2803 2802 2801 2800 A A9 MOV A , M A ← [[H][L]] It moves the data from memory location specified by HL register pair to A. Before After A H 28 L 05 A ← [2805] A ← A9
  • 28. 4. Direct Addressing Mode • The instruction specifies the direct address of the operand. • The memory address is specified where the actual operand is. Load Accumulator LDA 2805h A ← [2805] It loads the data from memory location 2805 to A. Store Accumulator STA 2803h [2803] ← A It stores the data from A to memory location 2803.
  • 29. 4. Direct Addressing Mode LDA 2805h A ← [2805] It loads the data from memory location 2805 to A. Before After 2807 2806 2805 5C 2804 2803 2802 2801 2800 A 2807 2806 2805 5C 2804 2803 2802 2801 2800 A 5C A ← [2805] A ← 5C
  • 30. 4. Direct Addressing Mode STA 2803h [2803] ← A It stores the data from A to memory location 2803. Before After 2807 2806 2805 2804 2803 2802 2801 2800 A 9B 2807 2806 2805 2804 2803 9B 2802 2801 2800 A 9B [2803] ← A [2803] ← 9B
  • 31. 5. Indirect Addressing Mode • The instruction specifies the indirect address where the effective address of the operand is placed. • The memory address is specified where the actual address of operand is placed. Move MOV A, 2802h A ← [[2802]] It moves the data from memory location specified by the location 2802 to A.
  • 32. 5. Indirect Addressing Mode MOV A, 2802h A ← [[2802]] It moves the data from memory location specified by the location 2802 to A. Before After 2807 2806 FF 2805 2804 2803 06 2802 28 2801 2800 A 2807 2806 FF 2805 2804 2803 06 2802 28 2801 2800 A FF A ← [[2802]] A ← FF
  • 33. 6. Implied Addressing Mode • It is also called inherent addressing mode. • The operand is implied by the instruction. • The operand is hidden/fixed inside the instruction. Complement Accumulator CMA (Here accumulator A is implied by the instruction) Complement Carry Flag CMC (Here Flags register is implied by the instruction) Set Carry Flag STC (Here Flags register is implied by the instruction)
  • 34. 7. Relative Addressing Mode • In relative addressing mode, contents of Program Counter PC is added to address part of instruction to obtain effective address. • The address part of the instruction is called as offset and it can +ve or –ve. • When the offset is added to the PC the resultant number is the memory location where the operand will be placed.
  • 35. Effective address of operand = 2806h 7. Relative Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F PC 2801 Offset = 04h Effective address of operand = PC + 01 + offset Effective address of operand = 2801 + 01 + 04 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Actual Operand
  • 36. Effective address of operand = 2807h 7. Relative Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F PC 2803 Offset = 03h Effective address of operand = PC + 01 + offset Effective address of operand = 2803 + 01 + 03 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Actual Operand
  • 37. 8. Indexed Addressing Mode • In index addressing mode, contents of Index register is added to address part of instruction to obtain effective address. • The address part of instruction holds the beginning/base address and is called as base. • The index register hold the index value, which is +ve. • Base remains same, the index changes. • When the base is added to the index register the resultant number is the memory location where the operand will be placed.
  • 38. 2800h + 0001h = 2801h 2800h + 0002h = 2802h 2800h + 0000h = 2800h 2800h + 0003h = 2803h 8. Indexed Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0000 Base = 2800h Effective address of operand = Base + IX 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0001 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0002 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0003
  • 39. 2802h + 0001h = 2803h 2802h + 0002h = 2804h 2802h + 0000h = 2802h 2802h + 0003h = 2805h 8. Indexed Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0000 Base = 2802h Effective address of operand = Base + IX 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0001 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0002 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F IX 0003
  • 40. 9. Base Register Addressing Mode • In base register addressing mode, contents of base register is added to address part of instruction to obtain effective address. • It is similar to the indexed addressing mode except the register now is called as base instead of index. • The base register hold the beginning/base address. • The address part of instruction holds the offset. • Offset remains same, the base changes. • When the offset is added to the base register the resultant number is the memory location where the operand will be placed.
  • 41. 9. Base Register Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Base 2800 Offset= 0001h Effective address of operand = Base Register + offset 2800h + 0001h = 2801h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2801h + 0001h = 2802h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2802h + 0001h = 2803h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2803h + 0001h = 2804h Base 2801 Base 2802 Base 2803
  • 42. 9. Base Register Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F Base 2800 Offset= 0003h Effective address of operand = Base Register + offset 2800h + 0003h = 2803h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2801h + 0003h = 2804h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2802h + 0003h = 2805h 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2803h + 0003h = 2806h Base 2801 Base 2802 Base 2803
  • 43. 10. Autoincrement or Autodecrement Addressing Mode • It is similar to register indirect addressing mode. • Here the register is incremented or decremented before or after its value is used.
  • 44. 1st Time 2nd Time 3rd Time 4th Time 10. Autoincrement or Autodecrement Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2802 At start: 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2803 HL 2804 HL 2805 HL pair incremented after its value is used HL 2802
  • 45. 1st Time 2nd Time 3rd Time 4th Time 10. Autoincrement or Autodecrement Addressing Mode 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2803 At start: 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F 2807 22 2806 FF 2805 6D 2804 59 2803 08 2802 2E 2801 F3 2800 9F HL 2805 HL 2806 HL 2807 HL pair incremented before its value is used HL 2804
  • 46. Discussion problem Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 Address 200 201 202 Memory 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 PC = Program Counter R1 = Register XR = Index Register AC = Accumulator • Memory is having first instruction to load AC • Mode will specify the addressing mode to get operand. • Address field of instruction is 500. Find out the effective address of operand and operand value by considering different addressing modes. LDA 500; Load the accumulator (AC) register with the value as indicated by 500
  • 47. Example problem Address Memory 200 201 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 202 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 1. Immediate Addressing Mode • As instruction contains immediate number 500. • It is stored as address 201. Effective Address = 201 Operand = 500 AC 500
  • 48. Example problem Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 Address 200 201 202 Memory 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 2. Register Addressing Mode • Register R1 contains 400. • As operand is in register so no any memory location. Effective Address = Nil Operand = 400 AC 400
  • 49. Example problem Address 200 201 202 Memory 399 400 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 500 600 702 PC 200 R1 400 XR 100 AC 800 3. Register Indirect Addressing Mode • Register R1 contains 400. • So effective address of operand is 400. • The data stored at 400 is 700. Effective Address = 400 Operand = 700 AC 700
  • 50. Example problem Address 200 201 202 Memory 399 400 500 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 600 702 PC 200 R1 400 XR 100 AC 800 4. Direct Addressing Mode • Instruction contains the address 500. • So effective address of operand is 500. • The data stored at 500 is 800. Effective Address = 500 Operand = 800 AC 800
  • 51. Example problem Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 Address 200 201 202 Memory 399 400 500 600 702 PC 200 R1 400 XR 100 AC 800 5. Indirect Addressing Mode • Instruction contains the address 500. • Address at 500 is 800. • So effective address of operand is 800. • The data stored at 800 is 300. Effective Address = 800 Operand = 300 AC 300
  • 52. Example problem Address 200 201 202 Memory 399 400 500 600 702 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 PC 200 R1 400 XR 100 AC 800 6. PC Relative Addressing Mode • PC = 200. • Offset = 500. • Instruction is of 2 bytes. • So effective address = PC + 2 + offset = 200 + 500 +2 = 702 . • The data stored at 702 is 325. Effective Address = 702 Operand = 325 AC 325
  • 53. Example problem Address 200 201 202 Memory 399 400 500 600 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 702 PC 200 R1 400 XR 100 AC 800 7. Index Register Relative Addressing Mode • XR = 100. • Base = 500. • So effective address = Base + XR = 500 + 100 = 600 . • The data stored at 600 is 900. Effective Address = 600 Operand = 900 AC 900
  • 54. Example problem Address 200 201 202 Memory 399 400 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 500 600 702 PC 200 R1 400 XR 100 AC 800 8. Autoincrement Addressing Mode • It is same as register indirect addressing mode except the contents of R1 are incremented after the execution. • R1 contains 400. • So effective address of operand is 400. • The data stored at 400 is 700. Effective Address = 400 Operand = 700 AC 700 R1 401
  • 55. Example problem Address 200 201 202 Memory 399 Load to AC Mode Address = 500 Next Instruction 450 700 800 900 325 300 400 500 600 702 PC 200 R1 400 XR 100 AC 800 9. Autodecrement Addressing Mode • It is same as register indirect addressing mode except the contents of R1 are decremented before the execution. • R1 contains 400. • R1 is first decremented to 399. • So effective address of operand is 399. • The data stored at 399 is 450. Effective Address = 399 Operand = 450 AC 450 R1 399
  • 56. Solution for problem Addressing Mode Effective Address Operand Immediate Addressing Mode 201 500 Register Addressing Mode Nil 400 Register Indirect Addressing Mode 400 700 Direct Addressing Mode 500 800 Indirect Addressing Mode 800 300 Relative Addressing Mode 702 325 Indexed Addressing Mode 600 900 Autoincrement Addressing Mode 400 700 Autodecrement Addressing Mode 399 450