SlideShare a Scribd company logo
Lecture 11
Data Addressing mode continued..
Review: Addressing Modes
• Operand can be place either in one of the processor register or
in memory.
• There are different ways to get the operands.
• The way in which the operand is taken from register or memory
is named as addressing mode.
THE ADDRESSING MODE:
Specifies a rule for interpreting or modifying the address field of the
instruction before the operand is actually referenced.
Review: Addressing Modes in Microprocessor
8086/8088
Types of Addressing Modes:
(1) Stack-Memory Addressing Modes
(2) Data Addressing Modes
(3) Program-Memory Addressing Modes
2. Data Addressing Modes
1. Immediate Addressing Mode
2. Direct Addressing Mode
3. Indirect Addressing Mode
4. Register Addressing Mode
5. Register Indirect Addressing Mode
6. Implied Addressing Mode
7. Auto increment or Auto decrement Addressing
Mode
8. Relative Addressing Mode
9. Indexed Addressing Mode
10. Base Register Addressing Mode
 An addressing mode means the method by which an
operand can be specified in a register or a memory
location
3. Indirect Addressing Mode
In this mode the address field of the instruction gives
• the address where the effective address is stored in memory.
• Control unit fetches the instruction from the memory and uses
its address part to access memory again to read the effective
address.
So, what you get it?
• The instruction specifies the indirect address where the
effective address of the operand is placed.
• Or, in other words: The memory address is specified
where the actual address of operand is placed.
MOV A, ([2802h])
Means: Move A ← ([2802])
It moves the data from memory location specified by the location 2802 toA.
Mechanism:
MOV A, ([2802h] ) A ← ([2802])
It moves the data from memory location specified by the
location 2802 to A.
Before After
2807
2806 FF
2805
2804
2803 06
2802 28
2801
2800
A 2807
2806 FF
2805
2804
2803 06
2802 28
2801
2800
A FF
A ← ([2802]) A ← FF
2 bytes
read
processor
4:RegisterAddressingMode
• When the address field specifies a processor register,
the instruction is said to be in register-mode.
• Instruction gets its source data from a register.
• Data resulting from the operation is storedin another register.
Data length depends on register beingused.
– 8-bit registers:AH,AL,BH,BL,CH,CL,DH, DL.
– 16-bit registers:AX,BX,CX,DX,SP,BP,SI,DI.
– 32-bit registers: EAX,EBX,ECX,EDX,ESP,EBP,EDI, ESI.
– 64-bit registers: RAX,RBX,RCX,RDX,RSP,RBP,RDI, RSI,
Advantage:
The address field of the instruction uses fewer bits to select a register than would have been required to specify a
memory address directly.
Simple Example:
• The operand is specified with in one of the processor register.
• Instruction specifies the register in which the operand is
stored.
Move
CX ← AX Here Ax has the operand move to
another register
MOV CX , AX
Add
Here Bx has the operand by default added into AXADD BX AX ← AX+ BX
Some more points:
Both the operands are in registers
Memory is not accessed when this addressing mode is executed
Limited number of registers
Very small address field is needed to address registers.
Shorter instructions
SomemoreExamples:
• – MOVAX,BX ;Copy the 16-bit content of BXto
AX
– MOVAL,BL ;Copy the 8-bit content of BLtoAL
– MOVSI,DI ;Copy DIinto SI
– MOV DS,AX ;CopyAXintoDS
Note
that the instructionmust useregisters of the
samesize.
– Cannot mix between 8-bit and 16-bitregisters.
– Will result in an error whenassembled.
•
Register Addressing Exceptions
5:Register Indirect Addressing Mode
Transfers a byte or word between a register and a memory location
addressed by an index or base
register
The address of the memory location where the operand resides is held
by a register
The registers used for this purpose are SI, DI, and BX
They must be combined with DS in order to generate the 20-bit physical
address.
 Theregisters must be specified using abracket [ ] or ().
In this mode the instruction specifies a register in the CPU
whose contents give the address of the operand in the memory. In other
words, the selected register contains the address of
the operand rather than the operand itself.
Ali Asghar Manjotho, LecturerCSE-MUET
Simple Example
• The instruction specifies the register in which the
memory address of operand is placed.
• It do not specify the operand itself but its location with in
the memory where operand is placed.
Move
Ax ← [[BH][BL]]MOV Ax , (BX)
It moves the data from memory location specified by BX register pair to
Ax.
Mechanism
2807
2806
2805 A9
2804
2803
2802
2801
2800
BH 28
Ali Asghar Manjotho, LecturerCSE-MUET
BL 05
2807
2806
2805 A9
2804
2803
2802
2801
2800
AX A9
MOV Ax , (BX) Ax ← ([BH][BL])
It moves the data from memory location specified by HL register pair to
Ax.
Before After
Ax
AX ← (2805) AX ← A9
BH 28
BL 05
Some more points
EA of operand(s) is/are specified in register.
Physical address is computed using segment register and EA.
Data in the physical address is an operand
Example 1: with physical address consideration
Example:
MOV AX, [BX] ; moves into AX the contents of
the memory location pointed
to by DS:BX, 1000:1234
The physical address is calculated as
1000x10+1234=11234H
The same rules apply when using register SI or DI.
Example:
MOV CL, [SI]
MOV [DI],AH
; move contents of DS:SI into CL
; move contents of AH into DS:DI
Example 2 with physical address consideration
Example 1 : MOV AX, [BX] given that DS = 5004, [BX] = 0020, calculatecontent
of registerAX
Solution:DS = 5004, [BX] = 0020,
Physical Address=50040+0020=50060.
50060 contain 0015H
0015H is moved to memoryAX
0000
0002
.
.
.
‘
0020 15
0021 00
50060
Little Endian
Example 3: with physical address consideration
 Example:
 Assume that DS = 1120, SI = 2498, and AX = 17FE Show the contents
of memory locations after the execution of
MOV [SI], AX ; move contents of AX into DS:SI
 Solution:
The contents of AX are moved into memory locations with logical
address DS:SI and DS:SI + 1;
The physical address starts at DS (shifted left) + SI = 11200+2498
13698. According to the little endian convention,
Low address 13698H contains FE, the low byte,
High address 13699H will contain 17, the high byte.
5: Register Indirect Addressing Mode Exceptions
Question problem
1st instruc
500
Next Instruction
950
450
700
800
900
325
300
Address
200
201
202
Memory
300
399
400
500
600
702
PC 200
AC
800
PC = Program Counter
AC/AX = Accumulator
BX= base register
DX=data register
Find out the effective address of operand
and accumulator & operand value by
addressing modes and also identify their
modes.
Load Ax , ([500])
Load Ax, BX
Load Ax, (DX)
Homework:
Load Ax, (([500]))
Load AX,DX
Load AX, ((DX))
Load AX, (((DX)))
BX 702
DX 400
Example problem
1st instruct
500
Next Instruction
950
450
700
800
900
325
300
Address
200
201
202
Memory
300
399
400
500
600
702
PC 200
AC
800
3. Indirect Addressing Mode
• Instruction contains the address 500.
• Address at 500 is 800.
• So effective address of operand is 800.
• The data stored at 800 is 300.
Load Ax , ([500])
Effective Address = 800
Operand = 300
AC 300
BX 702
DX 400
Example problem
1st instruc
500
Next Instruction
950
450
700
800
900
325
300
Address
200
201
202
Memory
300
399
400
500
600
702
PC 200
BX 702
DX 400
AX
800
4. Register Addressing Mode
• Register BX contains 702.
• As operand is in register so no any memory
location.
Effective Address = Nil
Operand = 702
AX 702
Load Ax, BX
Example problem
Address
200
201
202
Memory
300
399
400
Load to AC Mode
Address = 500
Next Instruction
950
450
500
800
900
325
300
500
600
702
PC 200
BX 702
DX 400
AX
800
Ali Asghar Manjotho, LecturerCSE-MUET
5. Register Indirect Addressing
Mode
• Register DX contains 400.
• So effective address of operand is
400.
• The data stored at 400 is 500.
Effective Address = 400
Operand = 500
AC/AX 500
Load Ax, (DX)
Example problem
Addressing Mode Effective
address
Accumulator Operand
Direct Addressing Mode
Immediate Addressing Mode null
500
500
800
500
Indirect Addressing mode 800 300 300
Register Addressing Mode Null 702 702
Register Indirect Addressing
Mode
400 500 500
Conclusion

More Related Content

DOCX
Instruction set of 8086
PDF
8086 instruction set with types
PPTX
Instruction sets of 8086
PPT
Assembly language
PPTX
Logical Instructions used in 8086 microprocessor
PPT
Assembly Language String Chapter
PPT
8086 add mod
PPT
Instruction set of 8086
Instruction set of 8086
8086 instruction set with types
Instruction sets of 8086
Assembly language
Logical Instructions used in 8086 microprocessor
Assembly Language String Chapter
8086 add mod
Instruction set of 8086

What's hot (20)

PPT
10 8086 instruction set
PDF
instruction set of 8086
PPTX
Instruction Set of 8086 Microprocessor
PPTX
Instruction set of 8086
PPT
Instruction set
PPTX
8086 microprocessor instruction set by Er. Swapnil Kaware
PPTX
Register allocation and assignment
PPT
Bca 2nd sem-u-4 central processing unit and pipeline
PPTX
Instruction set of 8086
PDF
8086 Microprocessor Instruction set
PDF
Instruction formats-in-8086
PPTX
Logical instructions (and, or, xor, not, test)
DOCX
Instruction set of 8086 Microprocessor
PPTX
ORAM: A Brief Overview
PPTX
8086 instruction set
PPTX
Assembly language (addition and subtraction)
PDF
8086 instructions
PPTX
Multiplication & division instructions microprocessor 8086
PPT
Unit iii mca 1st year
10 8086 instruction set
instruction set of 8086
Instruction Set of 8086 Microprocessor
Instruction set of 8086
Instruction set
8086 microprocessor instruction set by Er. Swapnil Kaware
Register allocation and assignment
Bca 2nd sem-u-4 central processing unit and pipeline
Instruction set of 8086
8086 Microprocessor Instruction set
Instruction formats-in-8086
Logical instructions (and, or, xor, not, test)
Instruction set of 8086 Microprocessor
ORAM: A Brief Overview
8086 instruction set
Assembly language (addition and subtraction)
8086 instructions
Multiplication & division instructions microprocessor 8086
Unit iii mca 1st year
Ad

Similar to Lecture 11 (20)

PPTX
All-addressing-modes of the 80386 /microprocessor.pptx
PPT
Chapter 3 INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING
PPTX
Chapter 4 addressing mode in microprocessor.pptx
PPTX
Lecture 10
PPTX
Mastering Assembly Language: Programming with 8086
DOCX
Notes 8086 instruction format
PPTX
8086 microprocessor pptx JNTUH ece 3rd year
PPTX
Addressing mode of 80286 microprocessor
PPTX
instructionsetsofjdtufgmictfgfjh8086.pptx
PDF
Unit 2 (Complete) - Programming of 8086.pdf
PDF
8086 instruction set (with simulator)
PPTX
Microprocessor Chapter3 hawassa Univetsi
PPTX
microprocesser Chapter three and foure.pptx
PPTX
8086 addressing modes
PDF
8086addressingmodes-200319141110.pdf
PPTX
addressing-modes-of-8086-mr-binu-joy-2 (2).pptx
PPTX
Introduction of 8086 micro processor .
PDF
lect 03- MIT Addressing Modes.pdf
PPTX
Addressing modes
PPTX
ADDRESSING MODES from the assembly4.pptx
All-addressing-modes of the 80386 /microprocessor.pptx
Chapter 3 INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING
Chapter 4 addressing mode in microprocessor.pptx
Lecture 10
Mastering Assembly Language: Programming with 8086
Notes 8086 instruction format
8086 microprocessor pptx JNTUH ece 3rd year
Addressing mode of 80286 microprocessor
instructionsetsofjdtufgmictfgfjh8086.pptx
Unit 2 (Complete) - Programming of 8086.pdf
8086 instruction set (with simulator)
Microprocessor Chapter3 hawassa Univetsi
microprocesser Chapter three and foure.pptx
8086 addressing modes
8086addressingmodes-200319141110.pdf
addressing-modes-of-8086-mr-binu-joy-2 (2).pptx
Introduction of 8086 micro processor .
lect 03- MIT Addressing Modes.pdf
Addressing modes
ADDRESSING MODES from the assembly4.pptx
Ad

More from talhashahid40 (7)

DOCX
Talha 11009 call_quiz_addressing_modes
PPTX
Only floating point lecture 7 (1)
PPTX
Lecture 9 examples (1)
PPTX
Lect 8 updated (1)
PPTX
Coal (1)
PPT
Chapter 7
PPTX
Chapter 3 caal (1)
Talha 11009 call_quiz_addressing_modes
Only floating point lecture 7 (1)
Lecture 9 examples (1)
Lect 8 updated (1)
Coal (1)
Chapter 7
Chapter 3 caal (1)

Recently uploaded (20)

PDF
Complete Guide to Website Development in Malaysia for SMEs
PDF
Cost to Outsource Software Development in 2025
PDF
Website Design Services for Small Businesses.pdf
PPTX
Reimagine Home Health with the Power of Agentic AI​
PPTX
Monitoring Stack: Grafana, Loki & Promtail
PPTX
AMADEUS TRAVEL AGENT SOFTWARE | AMADEUS TICKETING SYSTEM
PPTX
Weekly report ppt - harsh dattuprasad patel.pptx
PDF
Autodesk AutoCAD Crack Free Download 2025
PDF
Nekopoi APK 2025 free lastest update
PPTX
WiFi Honeypot Detecscfddssdffsedfseztor.pptx
PPTX
CHAPTER 2 - PM Management and IT Context
PDF
iTop VPN Free 5.6.0.5262 Crack latest version 2025
PDF
17 Powerful Integrations Your Next-Gen MLM Software Needs
PPTX
history of c programming in notes for students .pptx
PDF
Internet Downloader Manager (IDM) Crack 6.42 Build 41
PDF
EN-Survey-Report-SAP-LeanIX-EA-Insights-2025.pdf
PDF
Odoo Companies in India – Driving Business Transformation.pdf
PPTX
Why Generative AI is the Future of Content, Code & Creativity?
PDF
Download FL Studio Crack Latest version 2025 ?
PPTX
Agentic AI Use Case- Contract Lifecycle Management (CLM).pptx
Complete Guide to Website Development in Malaysia for SMEs
Cost to Outsource Software Development in 2025
Website Design Services for Small Businesses.pdf
Reimagine Home Health with the Power of Agentic AI​
Monitoring Stack: Grafana, Loki & Promtail
AMADEUS TRAVEL AGENT SOFTWARE | AMADEUS TICKETING SYSTEM
Weekly report ppt - harsh dattuprasad patel.pptx
Autodesk AutoCAD Crack Free Download 2025
Nekopoi APK 2025 free lastest update
WiFi Honeypot Detecscfddssdffsedfseztor.pptx
CHAPTER 2 - PM Management and IT Context
iTop VPN Free 5.6.0.5262 Crack latest version 2025
17 Powerful Integrations Your Next-Gen MLM Software Needs
history of c programming in notes for students .pptx
Internet Downloader Manager (IDM) Crack 6.42 Build 41
EN-Survey-Report-SAP-LeanIX-EA-Insights-2025.pdf
Odoo Companies in India – Driving Business Transformation.pdf
Why Generative AI is the Future of Content, Code & Creativity?
Download FL Studio Crack Latest version 2025 ?
Agentic AI Use Case- Contract Lifecycle Management (CLM).pptx

Lecture 11

  • 1. Lecture 11 Data Addressing mode continued..
  • 2. Review: Addressing Modes • Operand can be place either in one of the processor register or in memory. • There are different ways to get the operands. • The way in which the operand is taken from register or memory is named as addressing mode. THE ADDRESSING MODE: Specifies a rule for interpreting or modifying the address field of the instruction before the operand is actually referenced.
  • 3. Review: Addressing Modes in Microprocessor 8086/8088 Types of Addressing Modes: (1) Stack-Memory Addressing Modes (2) Data Addressing Modes (3) Program-Memory Addressing Modes
  • 4. 2. Data Addressing Modes 1. Immediate Addressing Mode 2. Direct Addressing Mode 3. Indirect Addressing Mode 4. Register Addressing Mode 5. Register Indirect Addressing Mode 6. Implied Addressing Mode 7. Auto increment or Auto decrement Addressing Mode 8. Relative Addressing Mode 9. Indexed Addressing Mode 10. Base Register Addressing Mode  An addressing mode means the method by which an operand can be specified in a register or a memory location
  • 5. 3. Indirect Addressing Mode In this mode the address field of the instruction gives • the address where the effective address is stored in memory. • Control unit fetches the instruction from the memory and uses its address part to access memory again to read the effective address.
  • 6. So, what you get it? • The instruction specifies the indirect address where the effective address of the operand is placed. • Or, in other words: The memory address is specified where the actual address of operand is placed. MOV A, ([2802h]) Means: Move A ← ([2802]) It moves the data from memory location specified by the location 2802 toA.
  • 7. Mechanism: MOV A, ([2802h] ) A ← ([2802]) It moves the data from memory location specified by the location 2802 to A. Before After 2807 2806 FF 2805 2804 2803 06 2802 28 2801 2800 A 2807 2806 FF 2805 2804 2803 06 2802 28 2801 2800 A FF A ← ([2802]) A ← FF 2 bytes read processor
  • 8. 4:RegisterAddressingMode • When the address field specifies a processor register, the instruction is said to be in register-mode. • Instruction gets its source data from a register. • Data resulting from the operation is storedin another register. Data length depends on register beingused. – 8-bit registers:AH,AL,BH,BL,CH,CL,DH, DL. – 16-bit registers:AX,BX,CX,DX,SP,BP,SI,DI. – 32-bit registers: EAX,EBX,ECX,EDX,ESP,EBP,EDI, ESI. – 64-bit registers: RAX,RBX,RCX,RDX,RSP,RBP,RDI, RSI, Advantage: The address field of the instruction uses fewer bits to select a register than would have been required to specify a memory address directly.
  • 9. Simple Example: • The operand is specified with in one of the processor register. • Instruction specifies the register in which the operand is stored. Move CX ← AX Here Ax has the operand move to another register MOV CX , AX Add Here Bx has the operand by default added into AXADD BX AX ← AX+ BX
  • 10. Some more points: Both the operands are in registers Memory is not accessed when this addressing mode is executed Limited number of registers Very small address field is needed to address registers. Shorter instructions
  • 11. SomemoreExamples: • – MOVAX,BX ;Copy the 16-bit content of BXto AX – MOVAL,BL ;Copy the 8-bit content of BLtoAL – MOVSI,DI ;Copy DIinto SI – MOV DS,AX ;CopyAXintoDS Note that the instructionmust useregisters of the samesize. – Cannot mix between 8-bit and 16-bitregisters. – Will result in an error whenassembled. •
  • 13. 5:Register Indirect Addressing Mode Transfers a byte or word between a register and a memory location addressed by an index or base register The address of the memory location where the operand resides is held by a register The registers used for this purpose are SI, DI, and BX They must be combined with DS in order to generate the 20-bit physical address.  Theregisters must be specified using abracket [ ] or (). In this mode the instruction specifies a register in the CPU whose contents give the address of the operand in the memory. In other words, the selected register contains the address of the operand rather than the operand itself.
  • 14. Ali Asghar Manjotho, LecturerCSE-MUET Simple Example • The instruction specifies the register in which the memory address of operand is placed. • It do not specify the operand itself but its location with in the memory where operand is placed. Move Ax ← [[BH][BL]]MOV Ax , (BX) It moves the data from memory location specified by BX register pair to Ax.
  • 15. Mechanism 2807 2806 2805 A9 2804 2803 2802 2801 2800 BH 28 Ali Asghar Manjotho, LecturerCSE-MUET BL 05 2807 2806 2805 A9 2804 2803 2802 2801 2800 AX A9 MOV Ax , (BX) Ax ← ([BH][BL]) It moves the data from memory location specified by HL register pair to Ax. Before After Ax AX ← (2805) AX ← A9 BH 28 BL 05
  • 16. Some more points EA of operand(s) is/are specified in register. Physical address is computed using segment register and EA. Data in the physical address is an operand
  • 17. Example 1: with physical address consideration Example: MOV AX, [BX] ; moves into AX the contents of the memory location pointed to by DS:BX, 1000:1234 The physical address is calculated as 1000x10+1234=11234H The same rules apply when using register SI or DI. Example: MOV CL, [SI] MOV [DI],AH ; move contents of DS:SI into CL ; move contents of AH into DS:DI
  • 18. Example 2 with physical address consideration Example 1 : MOV AX, [BX] given that DS = 5004, [BX] = 0020, calculatecontent of registerAX Solution:DS = 5004, [BX] = 0020, Physical Address=50040+0020=50060. 50060 contain 0015H 0015H is moved to memoryAX 0000 0002 . . . ‘ 0020 15 0021 00 50060 Little Endian
  • 19. Example 3: with physical address consideration  Example:  Assume that DS = 1120, SI = 2498, and AX = 17FE Show the contents of memory locations after the execution of MOV [SI], AX ; move contents of AX into DS:SI  Solution: The contents of AX are moved into memory locations with logical address DS:SI and DS:SI + 1; The physical address starts at DS (shifted left) + SI = 11200+2498 13698. According to the little endian convention, Low address 13698H contains FE, the low byte, High address 13699H will contain 17, the high byte.
  • 20. 5: Register Indirect Addressing Mode Exceptions
  • 21. Question problem 1st instruc 500 Next Instruction 950 450 700 800 900 325 300 Address 200 201 202 Memory 300 399 400 500 600 702 PC 200 AC 800 PC = Program Counter AC/AX = Accumulator BX= base register DX=data register Find out the effective address of operand and accumulator & operand value by addressing modes and also identify their modes. Load Ax , ([500]) Load Ax, BX Load Ax, (DX) Homework: Load Ax, (([500])) Load AX,DX Load AX, ((DX)) Load AX, (((DX))) BX 702 DX 400
  • 22. Example problem 1st instruct 500 Next Instruction 950 450 700 800 900 325 300 Address 200 201 202 Memory 300 399 400 500 600 702 PC 200 AC 800 3. Indirect Addressing Mode • Instruction contains the address 500. • Address at 500 is 800. • So effective address of operand is 800. • The data stored at 800 is 300. Load Ax , ([500]) Effective Address = 800 Operand = 300 AC 300 BX 702 DX 400
  • 23. Example problem 1st instruc 500 Next Instruction 950 450 700 800 900 325 300 Address 200 201 202 Memory 300 399 400 500 600 702 PC 200 BX 702 DX 400 AX 800 4. Register Addressing Mode • Register BX contains 702. • As operand is in register so no any memory location. Effective Address = Nil Operand = 702 AX 702 Load Ax, BX
  • 24. Example problem Address 200 201 202 Memory 300 399 400 Load to AC Mode Address = 500 Next Instruction 950 450 500 800 900 325 300 500 600 702 PC 200 BX 702 DX 400 AX 800 Ali Asghar Manjotho, LecturerCSE-MUET 5. Register Indirect Addressing Mode • Register DX contains 400. • So effective address of operand is 400. • The data stored at 400 is 500. Effective Address = 400 Operand = 500 AC/AX 500 Load Ax, (DX)
  • 25. Example problem Addressing Mode Effective address Accumulator Operand Direct Addressing Mode Immediate Addressing Mode null 500 500 800 500 Indirect Addressing mode 800 300 300 Register Addressing Mode Null 702 702 Register Indirect Addressing Mode 400 500 500