8086 microprocessor pptx JNTUH ece 3rd year

Microprocessors & Microcontrollers
1

Whatis a Microprocessor ?
 micro + processor
 The microprocessor is a multipurpose, programmable device that accepts
digital data as input, processes it according to instructions stored in its
memory, and provides results as output. It has internal memory.
Microprocessors operate on numbers and symbols represented in the binary
numeral system.
Basic block diagram of a microprocessor

Features of 8086 microprocessor
• It is a 16-bit μp.
• It has a 20 bit address bus can access up to 220memory locations (1 MB).
• It provides 14, 16 -bit registers.
• It requires +5V power supply.
• It is designed to operate in two modes ( Minimum & Maximum).
• It has multiplexed address and data bus AD0- AD15 and A16 – A19.
• Address bus length is 20bits. Data bus length is 16bits.

Intel 8086 Internal Architecture
9

AH AL
BH BL
CH CL
DH DL
SP
BP
SI
DI
AX
BX
CX
DX
Pointer
Index
8 bits 8 bits
16 bits
1
1
Accumulator
Base
Count
Data
Stack Pointer
Base Pointer
Source Index
Destination Index
EXECUTION UNIT – General Purpose Registers

9
EXECUTION UNIT – General Purpose Registers
Register Purpose
AX Word multiply, word divide, word I /O
BX Store address and data
CL Variable shift and rotate
DX Word multiply, word divide, indirect I/O
(Used to hold I/O address during I/O instructions. If the result is more than
16-bits, the lower order 16-bits are stored in accumulator and higher order
16-bits are stored in DX register)
CX String operation, loops

10
Pointer And Index Registers
• used to keep offset addresses.
• Used in various forms of memory addressing.
SP: Stack pointer
– Used with SS to access the stack segment
BP: Base Pointer
– Primarily used to access data on the stack
SI: Source Index register
The SI register points to memory locations in the data segment which is
addressed by the DS register. Thus, SI is associated with the DS in string
operations.
DI: Destination Index register
DI register points to memory locations in the data segment which is
addressed by the ES register

EXECUTION UNIT – Flag Register
•
•
A flag is a flip flop which indicates some conditions produced by the execution of an instruction
or controls certain operations of the EU .
In 8086 The EU contains
a 16 bit flag register
9 of the 16 are active flags and remaining 7 are undefined.
6 flags indicates some conditions- status flags
3 flags –control Flags

Flag Purpose
Trap (TF)
A control flag.
Enables the trapping through an on-chip debugging
feature.
Interrupt (IF)
A control flag.
Controls the operation of the INTR (interrupt request)
I=0; INTR pin disabled. I=1; INTR pin enabled.
Direction (DF)
A control flag.
It selects either the increment or decrement mode for DI
and /or SI registers during the string instructions.

Execution unit – Flag Register
• Six of the flags are status indicators reflecting properties of the last
arithmetic or logical instruction.
• Eg: MOV AL,7Fh
ADD AL,01h
AL = 80h
CF = 0; there is no carry out of bit 7
PF = 0; 80h has an odd number of ones
AF = 1; there is a carry out of bit 3 into bit 4
ZF = 0; the result is not zero
SF = 1; bit seven is one
OF = 0; the sign bit has changed

BUS INTERFACE UNIT (BIU)
• 6-byte Instruction Queue (Q)
• The Segment Registers (CS, DS, ES, SS).
• The Instruction Pointer (IP).
• The Address Summing block (Σ)
Contains

THE QUEUE (Q)
• The BIU uses a mechanism known as an instruction stream queue to
implement a pipeline architecture.
• This queue permits pre-fetch of up to 6 bytes of instruction code.

Segment Registers and Program Counter
Segment Registers
CS
DS
SS
ES
Segment Registers
Code segment
Data segment
Stack segment
Extra segment
Program Counter Program Counter
IP Instruction Pointer
• In 8086/88 the processors have 4 segments registers
• All are 16 bit registers.
• Each of the Segment registers store the upper 16 bit address of the
starting address of the corresponding segments.

Segmented Memory
Code segment (64KB)
Data segment (64KB)
Extra segment (64KB)
Stack segment (64KB)
1
MB
00000
FFFFF
Physical Memory

The size of each segment is 64 KB
A segment may be located any where in the memory
Each of these segments can be used for a specific
function.
– Code segment is used for storing the instructions.
– The stack segment is used as a stack and it is used to store the
return addresses.
– The data and extra segments are used for storing data byte.
– Segments may be overlapped or non-overlapped

Memory Address Generation
Physical Address (20 Bits)
Adder
Segment Register (16 bits) 0 0 0 0
Offset Value (16 bits)

•
The following examples shows the CS:IP scheme of
address formation:
Inserting a hexadecimal 0H (0000B)
with the CSR or shifting the CSR
four binary digits left
34BA 8AB4
CS IP
34BA0
3D654
3 4 B A 0 ( C S ) +
8 A B 4 ( I P )
3 D 6 5 4 (next address)
44B9F
Code segment
8AB4 (offset)

Segment and Address register
combination
• CS:IP
• SS:SP SS:BP
• DS:SI
• ES:DI

Pin Diagram of 8086 Microprocessor

S4 S3 FUNCTION
0 0
Extra segment
access
0 1
Stack segment
access
1 0
Code segment
access
1 1
Data segment
access
S4and S3
The S4 and S3 together indicate which segment register is
presently being used for memory access, as shown below-

QS0 QS1 Status
0 0 No operation
0 1 First byte of
opcode from the
queue
1 0 Empty the queue
1 1 Subsequent byte
from the queue
QS1 and QS0
These are queue status signals and are available at pin 24 and 25.
These signals provide the status of instruction queue. Their
conditions are shown in the following table −

S2 S1 S0 Status
0 0 0 Interrupt
acknowledgem
ent
0 0 1 I/O Read
0 1 0 I/O Write
0 1 1 Halt
1 0 0 Opcode fetch
1 0 1 Memory read
1 1 0 Memory write
1 1 1 Passive
S0, S1, S2
These are the status signals that provide the status of operation, which is used
by the Bus Controller 8288 to generate memory & I/O control signals. These are
available at pin 26, 27, and 28. Following is the table showing their status −

BHE/𝐴0
BHE 𝐴0 INDICATION
0 0 Whole word (2 bytes)
0 1 Upper byte from or to odd
address
1 0 lower byte from or to even
address
1 1 None

The different ways in which a processor can
access data are called addressing modes.
ADDRESSING MODES OF 8086

How 8086 accesses data?
 8086 assembly language instructions can be used to illustrate
the addressing modes
 Format of MOV instruction
MOV destination, source
Source of data can be
 Immediate data
 A specified register
 A memory location specified
Destination of data can be
 A specified register
 A memory location

TYPES OF ADDRESSING MODES
 Immediate addressing mode
 Direct addressing mode
 Register addressing mode
 Register Indirect addressing mode
 Indexed addressing mode
 Register relative addressing mode
 Based indexed addressing mode
 Relative based indexed addressing mode

IMMEDIATE ADDRESSING MODE
 Immediate data is a part of instruction.
 The immediate data may be 8-bit or 16-bit in size.
eg: MOV AX, 0005H
In the above example, 0005H is the immediate data.

Memory Address (Offset) Is Directly Specified In
The Instruction .
MOV AX, [5000h]
Here, data besides in a memory location in the data
segment.
Physical Address Of Memory Location Is Calculated Using
DS And Offset Value 5000H.
DIRECT ADDRESSING MODE

REGISTER ADDRESSING MODE
Source/Destination Can Be One Of The 8086 Registers
Example: MOV AX, BX ;16-bit Data Transfer

REGISTER INDIRECT ADDRESSING MODE
•The Offset Address Of Data Is In Either BX Or SI Or DI
Registers. The Default Segment Is Either DS Or ES.
• Example: MOV AX, [BX]
• Here, Data Is Present In A Memory Location In DS Whose
Offset Address Is In BX.
•The Effective Address Of The Data Is Given As 10H*DS+ [BX].

INDEXED ADDRESSING MODE
Eg: MOV AX, [SI].
Here, data is available at an offset address stored in SI in DS.
REGISTER RELATIVE ADDRESSING MODE
Eg: MOV Ax, 50H [BX].
Here, physical address is given as10H*DS+50H+ [BX].

BASED INDEXED ADDRESSING MODE
MOV AX, [BX] [SI].
Here, BX is the base register and SI is the index register.
The physical address is computed as is the index register.
The physical address is computed as 10H*DS+[BX]+[SI].

eg: MOV AX, 50H[BX][SI]
Here, 50H is an immediate displacement, BX is a base
register and SI is Here, 50H is an immediate
displacement, BX is a base register and SI is an index
register.
The physical address of data is computed as
10H*DS+[BX] + [SI] + 50H.
RELATIVE BASED INDEXED ADDRESSING MODE

Instruction Set of 8086
• An instruction is a binary pattern designed inside a
microprocessor to perform a specific function.
Classification of Instruction Set
Data TransferInstructions
Arithmetic Instructions
Bit Manipulation Instructions
Program Execution TransferInstructions
String Instructions
Processor Control Instructions

Data Transfer Instructions
MOV Des, Src:
Src operand can be register, memory location or immediate
operand.
Des can be register or memory operand.
Both Src and Des cannot be memory location at the same
time.
E.g.:
MOV CX, 037AH
MOV AL, BL
MOV BX, [0301 H]

PUSH Operand:
It pushes the operand into top of stack.
E.g.: PUSH BX
POP Des:
It pops the operand from top of stack to Des.
Des can be a general purpose register, segment register
(except CS) or memory location.
E.g.: POP AX

XCHG Des, Src:
This instruction exchanges Src with Des.
It cannot exchange two memory locations directly.
E.g.: XCHG DX,AX

IN Accumulator, PortAddress:
It transfers the operand from specified port to accumulator
register.
E.g.: IN AX, 0028 H
OUT Port Address,Accumulator:
It transfers the operand from accumulator to specified port.
E.g.: OUT 0028 H,AX

LEA Register, Src:
It loads a 16-bit register with the offset
address of the data specified by the Src.
E.g.: LEABX, [DI]
This instruction loads the contents of DI
(offset) into the BXregister.

LDS Des, Src:
It loads 32-bit pointer from memory source to
destination register andDS.
The offset is placed in the destination register and the
segment is placed inDS.
To use this instruction the word at the lower memory
address must contain the offset and the word at the
higher address must contain the segment.
E.g.: LDS BX, [0301 H]

LESDes, Src:
It loads 32-bit pointer from memory source to
destination register andES.
The offset is placed in the destination register and the
segment is placed inES.
This instruction is very similar to LDS except that it
initializes ES instead of DS.
E.g.: LES BX, [0301 H]

LAHF:
It copies the lower byte of flag register to AH.
SAHF:
It copies the contents of AH to lower byte of flag register.
PUSHF:
Pushes flag register to top of stack.
POPF:
Pops the stack top to flag register.

ADD Des, Src:
It adds a byte to byte or a word to word.
It effects AF, CF, OF, PF, SF, ZF flags.
E.g.:
ADD AL, 74H
ADD DX,AX
ADD AX, [BX]

ADC Des, Src:
It adds the two operands with CF.
E.g.:
ADC AL, 74H
ADC DX,AX
ADC AX, [BX]

SUB Des, Src:
It subtracts a byte from byte or a word from word.
For subtraction, CF acts as borrow flag.
E.g.:
SUBAL, 74H
SUB DX, AX
SUBAX, [BX]

SBB Des, Src:
It subtracts the two operands and also the
borrow from the result.
E.g.:
SBBAL, 74H
SBBDX,AX
SBBAX, [BX]

INC Src:
It increments the byte or word by one.
The operand can be a register or memory
location.
It effects AF, OF, PF, SF, ZF flags.
CF is not effected.
E.g.: INC AX

DEC Src:
It decrements the byte or word by one.
The operand can be a register or memory
location.
It effects AF, OF, PF, SF, ZF flags.
CF is not effected.
E.g.: DEC AX

AAA(ASCII Adjust afterAddition):
The data entered from the terminal is in ASCII format.
In ASCII, 0 – 9 are represented by 30H – 39H.
This instruction allows us to add the ASCII codes.
This instruction does not have any operand.
Other ASCIIInstructions:
AAS (ASCII Adjust after Subtraction)
AAM (ASCII Adjust after Multiplication)
AAD (ASCII Adjust Before Division)

DAA(Decimal Adjust after Addition)
It is used to make sure that the result of adding two BCD
numbers is adjusted to be a correct BCD number.
It only works on ALregister.
DAS (Decimal Adjust after Subtraction)
It is used to make sure that the result of subtracting two
BCD numbers is adjusted to be a correct BCD number.
It only works on ALregister.

NEG Src:
It creates 2’s complement of a given
number.
That means, it changes the sign of a
number.

CMP Des, Src:
It compares two specified bytes or words.
The Src and Des can be a constant, register or memory
location.
Both operands cannot be a memory location at the same
time.
The comparison is done simply by internally subtracting
the source from destination.
The value of source and destination does not change, but
the flags are modified to indicate the result.

MULSrc:
It is an unsigned multiplication instruction.
It multiplies two bytes to produce a word or two words to
produce a double word.
AX= AL* Src
DX : AX= AX*Src
This instruction assumes one of the operand in ALor AX.
Src can be a register or memory location.
IMULSrc:
It is a signed multiplication instruction.

DIV Src:
It is an unsigned division instruction.
It divides word by byte or double word by word.
The operand is stored in AX, divisor is Src and the
result is storedas:
AH = remainder AL= quotient
IDIV Src:
It is a signed division instruction.

CBW (Convert Byte toWord):
This instruction converts byte in ALto word in AX.
The conversion is done by extending the sign bit of AL
throughout AH.
CWD (Convert Word to Double Word):
This instruction converts word in AX to double word in
DX : AX.
The conversion is done by extending the sign bit of AX
throughout DX.

These instructions are used at the bit level.
These instructions can be used for:
Testing a zerobit
Set or reset a bit
Shift bits acrossregisters

NOT Src:
It complements each bit of Src to produce 1’
s
complement of the specified operand.
The operand can be a register or memory location.

AND Des, Src:
It performs AND operation of Des and Src.
Src can be immediate number,
register or memory location.
Des can be register or memory location.
Both operands cannot be memory locations
at the same time.
CF and OF become zero after the
operation.
PF, SF and ZF are updated.

OR Des, Src:
It performs OR operation of Des and Src.
at the same time.
operation.

XOR Des, Src:
It performs XOR operation of Des and Src.
at the same time.
operation.

SHLDes, Count:
It shift bits of byte or word left, by count.
It puts zero(s) in LSBs.
MSB is shifted into carryflag.
If the number of bits desired to be shifted is 1,then the
immediate number 1can be written in Count.
However, if the number of bits to be shifted is more than
1,then the count is put in CLregister.

SHR Des, Count:
It shift bits of byte or word right, by count.
It puts zero(s) in MSBs.
LSBis shifted into carryflag.

ROLDes, Count:
It rotates bits of byte or word left, by count.
MSB is transferred to LSB and also to CF.

ROR Des, Count:
It rotates bits of byte or word right, by count.
LSB is transferred to MSB and also to CF.

Program Execution Transfer Instructions
These instructions cause change in the sequence of the
execution of instruction.
This change can be through a condition or sometimes
unconditional.
The conditions are represented by flags.

CALLDes:
This instruction is used to call a subroutine or function
or procedure.
The address of next instruction after CALLis saved onto
stack.
RET:
It returns the control from procedure to calling program.
Every CALL instruction should have a RET.

JMPDes:
This instruction is used for unconditional jump from
one place to another.
Jxx Des (Conditional Jump):
All the conditional jumps follow some conditional
statements or any instruction that affects the flag.

Conditional Jump Table
Mnemonic Meaning Jump Condition
JA Jump ifAbove CF = 0 and ZF =0
JAE Jump if Above or Equal CF = 0
JB Jump if Below CF = 1
JBE Jump if Below or Equal CF = 1or ZF = 1
JC Jump if Carry CF = 1
JE Jump if Equal ZF = 1
JNC Jump if Not Carry CF = 0
JNE Jump if Not Equal ZF = 0
JNZ Jump if Not Zero ZF = 0
JPE Jump if Parity Even PF = 1
JPO Jump if Parity Odd PF = 0
JZ Jump if Zero ZF = 1

Loop Des:
This is a loopinginstruction.
The number of times looping is required is placed in the
CX register.
With each iteration, the contents of CX are
decremented.
ZF is checked whether to loop again or not.

String Instructions
String in assembly language is just a sequentially
stored bytes or words.
There are very strong set of string instructions in 8086.
By using these string instructions, the size of the
program is considerablyreduced.

String Instructions
CMPS Des, Src:
It compares the string bytes or words.
SCAS String:
It scans a string.
It compares the String with byte in ALor with word in
AX.

String Instructions
MOVS / MOVSB / MOVSW:
It causes moving of byte or word from one string to
another.
In this instruction, the source string is in Data Segment
and destination string is in Extra Segment.
SI and DI store the offset values for source and
destination index.

String Instructions
REP(Repeat):
This is an instruction prefix.
It causes the repetition of the instruction until CX
becomes zero.
E.g.: REP MOVSB STR1, STR2
It copies byte by byte contents.
REP repeats the operation MOVSB until CX becomes zero.

These instructions control the processor itself.
8086 allows to control certain control flags that:
causes the processing in a certain direction
processor synchronization if more than one
microprocessor attached.

STC:
It sets the carry flag to 1.
CLC:
It clears the carry flag to 0.
CMC:
It complements the carry flag.

STD:
It sets the direction flag to 1.
If it is set, string bytes are accessed from higher memory
address to lower memory address.
CLD:
It clears the direction flag to 0.
If it is reset, the string bytes are accessed from lower
memory address to higher memory address.

8086 microprocessor pptx JNTUH ece 3rd year

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