Chapter 4 addressing mode in microprocessor.pptx

Chapter four
Addressing Modes
By GetnetT(MSc)
March, 2024

Addressing Modes
8086 Microprocessor
2
Addressing mode indicates a way of locating data or operands in a
register or a memory location. Every instruction of a program has to
operate on a data:
The different ways in which a source operand is denoted in an
instruction are known as addressing modes
The general addressing modes of 8086 microprocessor can be classified
as
1. Data Addressing Modes
2. Program-memory addressing Modes
3. Stack-memory addressing Modes

Addressing Modes
8086 Microprocessor
3
8086/8088 provide a seven Data Addressing Modes
Data addressing Modes
1. Register Addressing
2. Immediate Addressing
3. Direct Addressing
4. Register Indirect Addressing
5. Base–Plus–Index Addressing
6. Register Relative Addressing
7. Base Relative–Plus–Index
Addressing
1. Register Addressing  Transfers a copy of a byte or word from the
source register to the destination register
 Use of registers to hold the data to be
manipulated.
 Source and destination registers must have the
same size
 Memory is not accessed when this addressing
mode is executed
Example:
MOV CL, DH
The content of 8-bit register DH is moved to
another 8-bit register CL
(CL)  (DH)

Addressing Modes
8086 Microprocessor
4
Addressing
 Transfers the source, an immediate byte or
word of data, into the destination register or
memory location
 The source operand is a constant
 The operand comes immediately after the
opcode. For this reason, this addressing mode
executes quickly
 Immediate addressing mode can be used to
load information into any of the registers
except the segment registers and flag
registers.
Example:
MOV AX, 2550H; move 2550H into AX
The data must first be moved to a general-
purpose register and then to the segment register
MOV AX, 2550H
MOV DS, AX
MOV DS, 0123H ; illegal instruction!

Addressing Modes
8086 Microprocessor
5
Addressing
 Moves a byte or word between a memory
location and a register.
 The data is in some memory location(s) and
the address of the data in memory comes
immediately after the instruction.
 This address is the offset address.
Example:
MOV AX, [2400] ; move contents of
DS:2400H into AX
 The physical address is calculated by
combining the contents of offset location
2400 with DS
 i.e. DS:2400
 If DS is given 1512H
 Physical address
= 15120+2400=17520H

Addressing Modes
8086 Microprocessor
6
Addressing
4. Register-Indirect Addressing
 Transfers a byte or word between a register and a
memory location addressed by an index or base
register
 The address of the memory location where the
operand resides is held by a register
 The registers used for this purpose are SI, DI, and
BX, BP
 They must be combined with DS in order to
generate the 20-bit physical address
Example:
 MOV AX, [BX] ; moves into AX the
contents of the memory location pointed to
by DS:BX, 1000:1234
 The physical address is calculated as
1000x10+1234=11234H

Addressing Modes
8086 Microprocessor
7
Addressing
 Transfers a byte or word between a register
and the memory location addressed by a
base register (BP or BX) plus an index
register (DI or SI).
 Combining based and indexed addressing
modes. One base register and one index
register are used
Example:
 MOV [BX+DI], CL ; move contents of CL
into DS:BX+DI
 Physical Address = DSx10 + BX+DI
 MOV [BP+SI], AL ; move contents of AL
into SS:BP+SI
 Physical Address = SSx10 + BP+SI

Addressing Modes
8086 Microprocessor
8
Addressing
 Moves a byte or word between a register
and the memory location addressed by an
index or base register plus a displacement.
 The data in a segment of memory are
addressed by adding the displacement to
the contents of a base or an index register
(BP, BX, DI, or SI).
Example:
 MOV AX, [BX+4] ; move
contents of DS:BX+4 into AX
 Physical Address = DSx10 + BX+4

Addressing Modes
8086 Microprocessor
9
Addressing
 The base relative-plus-index addressing
mode is similar to the base-plus-index
addressing mode, but adds a displacement
besides using a base register and an index
register to form the memory address.
 This type of addressing mode often
addresses a two-dimensional array of
memory data.
 The data in a segment of memory are
addressed by adding the displacement to
the contents of a base and an index register
(BP, BX, DI, or SI).
Example:
 MOV [BX+DI+1], AX ; move
contents of AX into DS:BX+DI+1
 Physical Address = DSx10 +
BX+DI+1H

Addressing Modes
8086 Microprocessor
10
: Program memory addressing modes
 The Program Memory Addressing mode is used in
branch instructions.
 These branch instructions are instructions which are
responsible for changing the regular flow of the instruction
execution and shifting the control to some other location.
 In 8086 microprocessor, these instructions are usually JMP
and CALL instructions
 The Program memory Addressing Mode contains
further three addressing modes within it.They are:
i. Direct Program memory Addressing
ii. Indirect Program memory Addressing
iii.Relative Program memoryAddressing

Addressing Modes
8086 Microprocessor
11
2. Indirect program memory
addressing
3. Relative program memory
addressing
1.Direct program memory
addressing
 In this addressing mode, the offset address
where the control is to be shifted is defined
within the instruction.
 This mode is called direct addressing mode
because the required address is directly
present in the instruction rather than being
stored in some register
 E.g. JMP 4032H
 Here, the working of the above instruction
will be as follows:
 The current value of IP which holds the
address of next instruction to be executed
will be stored in the TOP OFTHE STACK.
Now, the IP will be replaced by the
mentioned value, i.e. IP <- 4032H

Addressing Modes
8086 Microprocessor
12
1. Direct program memory
addressing
3. Relative program memory
addressing
2. Indirect program
memory addressing
 As the name suggests, in this addressing
mode, the offset address is not present
directly in the instruction.
 It is rather stored in any of the CPU registers
(Internal Register).
 So, the contents of the Instruction Pointer
(IP) will be replaced by the contents of that
register
 E.g. JMP BX
 Working: Suppose that the content of
the BX register is 0003H. So, the working of
the microprocessor for executing the above
instruction will be as follows:
• IP <- contents of BX i.e. IP <- 0003H
• And the required memory address is
calculated as: (Contents of CS) X 10H +
(contents of IP)

Addressing Modes
8086 Microprocessor
13
1. Direct program memory
addressing
2. Indirect program memory
addressing
3. Relative program
memory addressing
 In this Addressing mode, the offset address is
equal to the content of the Instruction
Pointer (IP) plus the 8 or 16-bit
displacement.
 For the 8 bit displacement, SHORT is used
and for 16-bit displacement, LONG is used.
 This type of displacement will only be intra-
segment, i.e. within the segment.
 E.g. JMP SHORT OVER
 Here, SHORT is used to represent the 8-bit
displacement and OVER is the Label defined
for any particular memory location.

Addressing Modes
8086 Microprocessor
14
: stack memory addressing modes
 The stack plays an important role in all microprocessors. It
holds data temporarily and stores the return addresses used by
procedures.
 The stack memory is an LIFO (last-in, first-out) memory,
which describes the way that data are stored and removed
from the stack.
 Data are placed onto the stack with a PUSH instruction and
removed with a POP instruction.
 The CALL instruction also uses the stack to hold the return
address for procedures and a RET (return) instruction to
remove the return address from the stack

Addressing Modes
8086 Microprocessor
15
 The stack memory is maintained by two registers: the stack
pointer (SP or ESP) and the stack segment register (SS).
 Whenever a word of data is pushed onto the stack the high-
order 8 bits are placed in the location addressed by SP – 1.The
low-order 8 bits are placed in the location addressed by SP – 2.
 The SP is then decremented by 2 so that the next word of data
is stored in the next available stack memory location
 Whenever data are popped from the stack the low-order 8 bits
are removed from the location addressed by SP.
 The high-order 8 bits are removed from the location addressed
by SP + 1.
 The SP register is then incremented by 2

Addressing Modes
16
 Note that PUSH and POP store or retrieve words of data—never bytes
—in the 8086 through the 80286 microprocessors
 The 80386 and above allow words or double words to be transferred to
and from the stack. Data may be pushed onto the stack from any 16-bit
register or segment register; in the 80386 and above, from any 32-bit
extended register.
 Data may be popped off the stack into any register or any segment
register except CS
 The reason that data may not be popped from the stack into CS is that
this only changes part of the address of the next instruction.
 In the Pentium 4 or Core2 operated in 64-bit mode, the 64-bit registers
can be pushed or popped from the stack, but they are 8 bytes in length
 registers can be pushed or popped from the stack, but they are 8 bytes in
length.
 The PUSHA and POPA instructions either push or pop all of the
registers, except segment registers, onto the stack.These instructions are
not available on the early 8086/8088 processors.

17
POPF Removes a word from the stack and places it into the flag register
POPFD Removes a doubleword from the stack and places it into the EFLAG register
PUSHF Copies the flag register to the stack
PUSHFD Copies the EFLAG register to the stack
PUSH AX Copies the AX register to the stack
POP BX Removes a word from the stack and places it into the BX register
PUSH DS Copies the DS register to the stack
PUSH 1234H Copies a word-sized 1234H to the stack
POP CS This instruction is illegal
PUSH WORD PTR[BX] Copies the word contents of the data segment memory location addressed by BX onto
the stack
PUSHA Copies AX, CX, DX, BX, SP, BP, DI, and SI to the stack
POPA Removes the word contents for the following registers from the stack: SI, DI, BP
, SP, BX, DX, CX,
and AX
PUSHAD Copies EAX, ECX, EDX, EBX, ESP, EBP, EDI, and ESI to the stack
POPAD Removes the doubleword contents for the following registers from the stack: ESI, EDI, EBP
, ESP
, EBX, EDX, ECX, and EAX
POP EAX Removes a doubleword from the stack and places it into the EAX register
POP RAX Removes a quadword from the stack and places it into the RAC register (64-bit mode)
PUSH EDI Copies EDI to the stack
PUSH RSI Copies RSI into the stack (64-bit mode)
PUSH QWORD PTR[RDX] Copies the quadword contents of the memory location addressed

Chapter 4 addressing mode in microprocessor.pptx

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