Ldpc based error correction

Presented By
C.N.VIJAYBALAJI
M.E.(Communication Systems)
Rajalakshmi Engineering College
P.HARISH
M.E.(Communication Systems)
Rajalakshmi Engineering College
LDPC BASED ERROR CORRECTION
WITH BIT LEVEL AND SYMBOL LEVEL
SYNCHRONIZATION USING MARKER
CODE OPTIMIZATION

ABSTRACT
 Low-density parity check code with error-correction capabilities
and Marker code for synchronization purposes are used
 The marker code structures offer the ultimate achievable rate
when standard bit-level synchronization are performed
 Symbol-level synchronization algorithm works on group of bits
and show how it improves the achievable rate along with the
error rate performance
 When multiple pass decoding is performed the extrinsic
information transfer (EXIT) charts are used to analyze the
receiver

 LDPC codes are one of the hottest topics in coding theory today.
Originally invented in the early 1960's, they have experienced an
amazing comeback in the last few years
 LDPC codes are already equipped with very fast (probabilistic)
encoding and decoding algorithms
 The question is that of the design of the codes such that these
algorithms can recover the original codeword in the face of large
amounts of noise. New analytic and combinatorial tools make it
possible to solve the design problem. This makes LDPC codes not
only attractive from a theoretical point of view, but also perfect for
practical applications. LDPC code was invented by Robert Gallager
in his 1960 MIT Ph.D.. The LDPC code was rediscovered by
MacKay (1999) and Richardson (1998)
INTRODUCTION

 The codewords in LDPC code consist of the values of the message
nodes, appended by the values of the check nodes. This construction
leads to a linear time encoder, but it has a major problem with
decoding. This is because the check nodes can also be erased but in a
very low amount
 Insertion/Deletion Channels with the interest of reducing the decoding
latency for the case of single-pass decoding with the LDPC code, i.e.
concatenated with the inner marker code over insertion/deletion
channels and an iterative scheme where extrinsic information is
exchanged between the MAP detector (synchronization) block and the
outer decoder are considered
INTRODUCTION CONTD…

DOMAIN
 Wireless communication
 The distances involved may be short or long
 Wireless communication is a branch of telecommunications

LITERATURE SURVEY
 The paper titled “Reliable Communication over Channels with
Insertions, Deletions, and Substitutions”, by Matthew C. Davey and
David J. C. MacKay, IEEE Transactions on information theory, vol.
47, no. 2, February 2001 [1], explains A new block code which is
capable of correcting multiple insertion, deletion, and substitution
errors. The code consists of nonlinear inner codes, which is called as
“watermark” codes. In the proposed project the “marker” codes are
used instead of “watermark” codes.
 The paper titled “Asymptotically Good Codes Correcting Insertions,
Deletions, and Transpositions” by Leonard J. Schulman and David
Zuckerman IEEE Transactions on Information theory, Vol. 45, No. 7,
November 1999 [7], simply presents a polynomial-time encodable
and decodable codes which are asymptotically good for channels
allowing insertions, deletions, and transpositions. It appears to be a
difficult problem to analyze the capacity of the channel.

 The paper titled “Marker Code Optimization and Symbol-Level
Synchronization for Insertion/Deletion Channels”, by Feng Wang,
Dario Fertonani and Tolga M. Duman [2] considers a serially-
concatenated coding schemes over channels impaired by insertion,
deletion, and substitution errors. In the proposed project, the low
density parity check code has been used to detect and correct the
errors since this is a best forward error correcting code.
 The paper titled “Design of Low-Density Parity-Check Codes for
Modulation and Detection”, by Stephan ten Brink, Gerhard Kramer,
Member, IEEE, and Alexei Ashikhmin, IEEE Transactions on
communications, vol. 52, no. 4, April 2004 [10], explains a coding
and modulation technique. In the proposed project the extrinsic
information transfer charts are used to obtain the result.
LITERATURE SURVEY(CONTD..)

 The paper titled “EXIT Chart-based Design of LDPC Codes for Inter-
Symbol Interference Channels”, by Michele Franceschini, Gianluigi
Ferrari and Riccardo Raheli [8]. The subject of this paper is the design
of low density parity-check codes concatenated with a Gray mapped
quaternary phase shift keying. In the proposed project, the LDPC
concatenated with the marker code was designed.
LITERATURE SURVEY(CONTD..)

EXISTING SYSTEM
 The basic designing codes for channels with synchronization errors:
Channel codes
1.Block codes
2.Convolutional codes

DISADVANTAGES OF EXISTING SYSTEM
 Limitation of decoding latency
 Synchronization problem
 Low SNR
 Bit wise coding strategy is used

PROPOSED SYSTEM
 To find the exact solution to the problem
 To improve the achievable rate without changing the transmitter
structure
 Investigate the LDPC code design when multiple-pass decoding is
used
 EXIT charts to analyze the impact of insertions and deletions

ADVANTAGES OF PROPOSED SYSTEM
 Better error correcting capabilities
 Improves the gain
 Bit and symbol wise coding strategies are used

BLOCK DIAGRAM
Source
LDPC
encoder
Decoder
Destination Map Detector
Channel
Marker
Insertion
Deinterleave
r
Interleaver
Noise

 The transmission of the bits over the channels impaired by insertion
and deletion errors are considered for the error correction using the
LDPC code. Let the channel be thought as the cascade of two sub-
channels
 There are three cases to be considered, at first when the input bit gets
deleted at the first sub-channel they are considered as the deletion
error with probability as Pd. Secondly when the input bit gets an
insertion of additional bit then they are said as insertion error and it
has the probability as Pi. At last the third error is called as the
substitution error with the probability Ps
 The probability for the correctly transmitted bit can be expressed as
Pt = 1-Pd-Pi
EXPLANATION

 The binary channels impaired by insertion, deletion, and substitution
errors, are considered whose positions are unknown to either the
transmitter or the receiver, each transmitted bit may be deleted or
replaced by two random bits, substituted by its complement or
correctly received independently of each other
 The achievable rate with a single pass decoder and the multiple-pass
decoder are analyzed, i.e., synchronization is performed for multiple
times of each received packet by iterating between the decoder and the
synchronization module
EXPLANATION (CONTD…)

 We assume that insertion, deletion, and substitution errors are all
Independent and identically distributed (IID), and that the transmitter
and the receiver have no information on the positions at which the
errors occur. The information bits are first encoded by means of
LDPC code, then the transmitted sequence is formed by inserting pilot
bits, which are often referred to as markers, to the interleaved
sequence of coded bits. The marker bits and their positions in the
transmitted sequence are known to the receiver, which exploits this
information in the MAP detector to recover the synchronization errors
due to insertion/deletion
EXPLANATION (CONTD…)

MODULE
O System Model
O Review of standard bit-level MAP detection algorithm
O Marker Code Optimization
O Symbol-Level Synchronization
O Exit Chart-Based Outer LDPC Code Design

MODULE DESCRIPTION
 System Model
• The transmission over binary channels, impaired by insertion,
deletion, and substitution errors are considered

 Review of standard bit-level MAP detection algorithm
O The channel model is not a finite-state Markov chain
O The code constraints induced by the code are neglected in the
derivation of the algorithm
O Thus the bits are considered to be independent

 Marker Code Optimization
O The problem of selecting a good marker code is analyzed
O A lower marker code rate or smaller 𝑁C leads to better
synchronization capabilities
O An optimal marker code rate rm exists for different marker codes
used over a channel

 Symbol-Level Synchronization
O The information at the output of the MAP detector is correlated
O The information is lost when such correlations are neglected
O The presented algorithm compares the mutual information between the
symbols at the input of the interleaver at the transmitter side and the
information at the output of the de-interleaver at the receiver side

 Exit Chart-Based LDPC Code Design
O With the interest of reducing decoding latency, it is focused on the
case of single-pass decoding for the outer code that is concatenated
with the inner marker code
O An iterative scheme where extrinsic information is exchanged
between the MAP detector block and the decoder

How to find the insertion, deletion and
transmission of bits?

LDPC CODE PARAMETERS FOR
INSERTION/DELETION CHANNELS

RESULTS
• The achievable rate vs Nc was obtainted based on interleaving.
0 5 10 15 20 25 30 35 40 45 50
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Nc
acheivable
rate
achievable rate vs Nc based on bit interleaving

4 5 6 7 8 9 10 11 12
0
0.01
0.02
0.03
0.04
0.05
0.06
bit error rate performance of Deinterleaving
SNR(dB)
BER
• The bit error rate performance of the deinterleaving was performed
and the plot of the Eb/No Vs BER was obtained.

0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
rm
acheivable
rate acheivable rate for different marker code
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
rm
acheivable
rate
0.65 0.7 0.75 0.8 0.85 0.9 0.95 1
0.2
0.3
0.4
rm
acheivable
rate
• The achievable rate for different marker code was obtained.

The performance of an outer LDPC code with an inner marker code for
data transmission over insertion and deletion channel were studied and
analyzed. The two decoding strategies single-pass decoding and multi-
pass decoding is considered with information exchange between the
inner detector and the outer decoder were studied. The Achievable
rates for different deletion channels for the marker “01” inserted every
Nc bits are obtained. The Achievable rates for different insertion and
deletion channels for the marker “01” inserted every Nc bits are
obtained. The Achievable rates for different markers as a function of
the marker code rate are obtained when Pd=Pi=0.003. The Achievable
rate improvement through symbol-level decoding for the marker “01”
inserted every Nc bits. Thus the EXIT charts are used and the different
rates are obtained for different marker codes.
CONCLUSION

REFERENCES
[1] David J. C. MacKay and Matthew C. Davey, “Reliable Communication over Channels
with Insertions, Deletions, and Substitutions”, IEEE Transactions on information theory,
vol. 47, no. 2, February 2001
[2] Dario Fertonani, Feng Wang, and Tolga M. Duman “Marker Code Optimization and
Symbol-Level Synchronization for Insertion/Deletion Channels” ISIT 2010, pp.1007-1011,
Austin, Texas, U.S.A., June 13 - 18, 2010
[3] David J. C. MacKay “Good Error-Correcting Codes Based on Very Sparse Matrices”
IEEE TRANSACTIONS ON INFORMATION THEORY, VOL. 45, NO. 2, MARCH 1999
[4] Erden .M.F, Duman .T.M and Fertonani , “Bounds on the capacity of channels with
insertions, deletions and substitutions,” IEEE Trans. Commun., vol. 59, no. 1, pp. 2–6, Jan.
2011.
[5] Edward A. Ratzer, “Marker codes for channels with insertions and deletions”,
Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge, UK

[6] FengWang, DarioFertonani and TolgaM.Duman “Symbol-Level Synchronization and
LDPC Code Design for Insertion/Deletion Channels” IEEE Trans on
COMMUNICATIONS, VOL. 59, NO. 5, pp.1287-129 , MAY 2011
[7] Leonard J. Schulman and David Zuckerman “Asymptotically Good Codes Correcting
Insertions, Deletions, and Transpositions” IEEE TRANSACTIONS ON INFORMATION
THEORY, VOL. 45, NO. 7, NOVEMBER 1999
[8] Michele Franceschini, Gianluigi Ferrari and Riccardo Raheli “EXIT Chart-based
Design of LDPC Codes for Inter-Symbol Interference Channels”, Dipartimento di
Ingegneria dell’Informazione University of Parma, I-43100 Parma, Italy
[9] Swart .T.G and Ferreira .H.C, “Insertion/deletion correcting coding schemes based on
convolution coding” ELECTRONICS LETTERS, Vol. 38 No. 76, 7st August 2002
[10] Stephan ten Brink, Gerhard Kramer and Alexei Ashikhmin “Design of Low-Density
Parity-Check Codes for Modulation and Detection” IEEE Trans. on Communications, vol.
52, no. 4, pp. 670-678 , APRIL 2004
REFERENCES (CONTD…)

Ldpc based error correction

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