Microprocessor architecture-I

MICROPROCESOR ARCHITECTURE-1
7/12/2020 yayavaram@yahoo.com 1

SALIENT FEATURES
• The Intel 8085 CPU is an 8-bit device with a clock
speed of 3 - 5 MHz. It has 80 basic instructions and
246 op-codes. Its clock cycle is 200 ns (For a
frequency of 5 M.Hz)
• 8085 microprocessor is a 40-pin DIP chip which
works at + 5V DC.
• It has one 8-bit data bus and one 16-bit data bus.
• It has a 16-bit address bus and can access an
address space of 64kB.
• It has one 8-bit status/Flag register, where only 5-
flags are supported.

contd
• 8085 supports a total of 5 interrupt sources among
which one is non-vectored interrupt and 4 are
vectored .
• It has one 8-bit Accumulator , one 16-bit program
counter and one 16-bit Stack pointer register and
one 8- bit Instruction Register.
• The architecture of 8085 is memory based
architecture.It means, the instructions are fetched
from external memory by the CPU , decoded and
and executed.
• Also majority of the instructions are Accumulator
based .i.e the instructions will work only on this
register only.7/12/2020 yayavaram@yahoo.com 3

contd
• It has one serial port with two lines SOD(Serial Output
Data) & SID (Serial Input Data).
• This 8085 is an enhanced version of its predecessor the
8080A.Its instruction set is upward compatible with that of
the 8080A.
• 8085A has an on-chip clock generator with external crystal,
LC or RC network.
• This 8085 microprocessor is built with nearly 6200
transistors.
• The enhanced version of 8080 is the Intel 8085AH. It is an
N channel depletion load, Silicon gate (HMOS) 8-bit
processor.
• Clock frequencies of 3MHZ, 5MHZ and 6MHZ selections
are available.7/12/2020 yayavaram@yahoo.com 4

Block Diagram of 8085
• ALU , Registers, Timing & Control Unit

Architecture
• Intel 805 processor is based on CISC
architecture.(Complex Instruction Set Computer)
• The architecture of the 8085 microprocessor ,gives
the details of internal arrangement of ALU,
Registers ,Timing & Control unit and their internal
connections through the data, address and control
buses.
• The architecture of 805 consists of three important
sections as shown in the block diagram.
(i) ALU (ii).Registers (iii) Timing & Control Unit

Arithmetic and logic unit (ALU)
• The ALU performs all the arithmetic and logical
operations like addition, subtraction,
complementing, logical AND, logical OR, logical
Exclusive OR, incrementing and decrementing,
rotate, shift and clear.
• ALU is made of many logic gates and adders etc.
The arithmetic and logic unit consists of the following
units
(a).Accumulator (A).
(b).Temporary register.
(c).Flag register.

• It is an 8-bit register which is treated as a special
function register.
• Most of the arithmetic and logic operations are
performed using this accumulator.
• All the I/O data transfers between 8085 and I/O
devices are performed via accumulator.
• One of the operands for arithmetic operations in
ALU is from the accumulator.
• After performing the arithmetic operations the result
is stored back in accumulator.
• It is from the accumulator only, the data is sent out
to an output device.
contd

contd
• Similarly, the data from an input device is read only
through the accumulator.
• The data in the accumulator alone can be rotated or
shifted.(i.e to perform shift or rotate operations ,the
data operand must be brought into A register first).
• No other register can be used for these operations.
Certain instructions like DAA are performed using
only accumulator.
• So, the Accumulator register is treated as a default
register.
• A reg is not bit addressable,
it is always byte addressable

contd
• For Ex: add A,B ; It means the contents of B
register are added to A register and the result is
placed in A only.
• RLC ; Rotate Accumulator left by one bit and the
result is again stored in A only.
• Like this many of the 8085 instructions are
accumulator based instructions. This is the
architectural feature of CISC processor.

Temporary register
• It is an 8-bit register which is not accessible to the
user.
• This register is used by the microprocessor to load
the second operand during arithmetic/logical
operations in ALU.
• The final result is stored in the Accumulator and the
flags are set or reset according to the result of the
operation.
• For example when MVI M, 17H instruction is
fetched, IR register will receive the opcode for MVI
M and the Temporary register will receive 17H.

contd
• In arithmetic and logical operations, that involves
two operands ,the accumulator provides one
operand.
• The other is provided by the temporary register.
• For example in ADD C instruction, C register
contents are moved to the Temporary register and
the addition of A and Temp. Register contents is
performed by the ALU.
• Finally the result is stored in A.

Flag Register
• The flag register is an 8- bit register which generally reflect
data conditions in the accumulator with certain exceptions.
• Hence this flag register is also known as Status register.
Though this flag register is an eight bit register.
• It contains only 5 flag bits and the remaining three bits are
undefined as shown in Fig below.
• In the Flag register each flag bit is a Flip-Flop. i.e., the bit
may be either in the flip state or flop state.
S - Sign Flag
After execution of an arithmetic and logic operation, if bit D7
of the result is 1, the sign flag is set.This Flag is used with
signed numbers.

contd
• For example in a given byte, if D7 is 1, the number
is treated as a negative number. Else (if it is zero), it
is viewed as a positive.
• In arithmetic operations with signed numbers bit
D7is reserved for indicating the sign and the
remaining seven bits are used to denote the
magnitude of the number.

Z - Zero Flag
• This Flag is set (made 1) if the result after any
arithmetic operation is zero, and the flag is reset
(made 0) if the result is not zero.
• So, this flag is set or reset based on the results in the
accumulator as well as in the other registers.
• For Ex: sub A,B wen A = 0101 and B = 0101
• After execution of the instruction the result is zero.
So, the zero flag bit is set to 1.(Set).
• Similarly add A,B .The result is 1010 . As the result
is not zero. The Z flag is reset .
• The most important use of this flag is ,it is widely
used with jump instructions.
• Ex: Jnz : Jump on no zero ; JZ : Jump on zero

AUXIALLARY CARRY(A.C)
• In this arithmetic operation, when a carry is generated by
third bit and passed on to bit 4 , the AC flag is set.
• This flag is used internally for BCD arithmetic and is not
available for the programmer to change the sequence of a
program with a jump instruction.
• But the Z and CY flags can be used for the conditional jump
purpose.
Ex: Let us consider two BCD(Binary Coded Decimal)
numbers.
A=10011001 B = 01101000
add A,B ; after execution of the instruction
AC flag is set to 1.

P-Parity Flag
• If the result after an arithmetic and logical operation
has an even number of 1s, this parity flag is set to 1
otherwise (if number of 1s is odd) the flag is reset
(made0).
For example the data byte 10111101 has even parity
and the data byte 10011011 has odd parity. So P bit=0.
• This flag bit is also combined with jump instrctions.
• JP : Jump on Parity (when parity bit is set ,jump to
the target oacation else to the next location)
• JNP :Jump on no parity (when parity bit is reset
,jump to the target oacation else to the next location)

• After an arithmetic operation, like addition,
subtraction if there exists a carry or barrow, this flag
CY is set to 1 else it is reset (made0)
Example : Let us consider the addition of two binary
numbers 11011001 and 11101101 and check the Flag
register.
• When this instruction is executed there is a carry bit
at the MSB.
So, the Carry flag is set 1 otherwise it s set to 0.
• This carry flag is also associated with jump
instructions frequently.
• JC :Jump on carry
• JNC : Jump on No Carry
Carry flag –CY

7/12/2020 19yayavaram@yahoo.com
HOPE THIS IS HELPFUL !
GOOD LUCK !!

Microprocessor architecture-I

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