![Partnership to enable copper for the next
generation artificial intelligence computing
[Seunghyun Eddy Hwang, Principal SI Lead, NVIDIA]
[Wai Kiong Poon, Global Product Manager, MOLEX]](https://image.slidesharecdn.com/ocp23g-v21cxlforumeddyandwkrev03eddyv4-231027190328-2c1ce6e1/85/Molex-and-Nvidia-Partnership-to-enable-copper-for-the-next-generation-artificial-intelligence-computing-2-320.jpg)
Molex and Nvidia - Partnership to enable copper for the next generation artificial intelligence computing
- 1. Partnership to enable copper for the next generation artificial intelligence computing
- 2. Partnership to enable copper for the next generation artificial intelligence computing [Seunghyun Eddy Hwang, Principal SI Lead, NVIDIA] [Wai Kiong Poon, Global Product Manager, MOLEX]
- 3. Enabling Copper for Artificial Intelligence Computing Next Generation Architecture
- 4. Voice of Customer High Speed Board-To-Board (112G PAM4 and beyond) Low Profile (5mm mated height as initial target) Surface Mount Termination (Solder Ball Attachment) Minimum PCB Real-Estate Mechanical Robust Simplicity in Design Ease of manufacturing; Cost Effective High Speed Mezzanine Connector
- 5. MM MM Pro MMe • Speed up to 112Gbps • Speed up to 112Gbps (improved performance) • Speed up to 224Gbps Evolution of High-Speed Mezzanine High Speed Mezzanine Connector
- 6. High Speed Mezzanine Connector What have we learnt from the current Mezzanine Design? What have we learnt from the current Mezzanine Design? — What are the Current Issues? — What is the Signal Integrity Limitations? Moving from 112G to 224G: — Understanding issues with current design — Understanding limitations with current assembly process These understandings will enable us to design the next generation of High- Speed Board to Board Connector
- 7. SI Performance influenced by Terminal & Assembly Process A good impedance control is critical for 224G application, but the impedance optimization is limited by the following: — Connector Design — Assembly Process Due to the current stitched terminal design, the flexibility and sensitivity of the terminal width tuning becomes very challenging Dimension Constraints due to Assembly Process. High Speed Mezzanine Connector
- 8. Limitations of Current Design Minor variation in the dimensions will result in resonance This type of variation is very difficult to control during assembly process High Speed Mezzanine Connector
- 9. TDR Connector only Sensitivity of SI Performance due to Terminal Deflection Aside from dimension variation, the impedance is also sensitive to deflection condition which affects the distance between terminal and its nearby plastic High Speed Mezzanine Connector
- 10. Limitations of Current Design High Speed Mezzanine Connector
- 11. MM MM Pro MMe • Speed up to 112Gbps • Speed up to 112Gbps (improved performance) • Speed up to 224Gbps Evolution of High-Speed Mezzanine High Speed Mezzanine Connector
- 12. Victim : Diff 4 Aggressor : others #Rference impedance 86ohm Comparing MM, MM Pro Vs. MMe (Signal Integrity) High Speed Mezzanine Connector
- 13. Comparing MM, MM Pro Vs. MMe (Signal Integrity) High Speed Mezzanine Connector
- 14. • It’s no secret that GPU accelerators now power many of the world’s fastest supercomputers and AI systems • NVLink is the world’s first proprietary system interconnect technology from Nvidia that allows multiple GPUs to communicate directly via a high-speed interconnection • NVLink connects the machines’ processors – CPUs and GPUs – so they can exchange data much faster than CPU What is NVLink?
- 15. NVIDIA DGX • Nvidia Tesla V100 is the world’s most advanced data center GPU • Supports AI, deep learning, HPC, and autonomous driving • Tesla V100 offers the • DGX H100, which uses 4th generation of NVLINK, is the world’s most advanced GPU for large generative AI and other transformer-based workloads • H100 contains 8 GPU modules that communicate thru NVLink needs high-speed connector for baseboard attachment
- 16. Improved H100 Performance Bring SI Challenge • Significant performance boost from A100 • Fourth-generation NVIDIA NVLink provides a 3x bandwidth increase on all-reduce operations and multi-GPU IO operating at 7x the bandwidth of PCIe Gen 5. • Yet, no significant form factor change for improved performance, which introduces significant SI challenges A100 H100
- 17. Mezzanine Connector Selection Criteria • SI performance • As shown in crosstalk comparison plot in left figure, other vendor crosstalk is much worse than Molex • Formfactor • Molex pinout can route all NVLink high-speed signals in less number of layers than other vendor • Mechanical stability Molex Other vendor
- 18. Molex Connector Optimization Optimized Baseline Optimized Baseline Optimized Baseline Resonance free
- 19. SI Performance Comparison: H100 vs A100 A100 H100
- 20. Thank you!