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CSI-408
Computer Organization and
Assembly Language Programming
Topic # 3
Introduction to Registers & Flags
Basic Computer Organization
iAPX 88 Registers (16-bit)
Registers
There are temporary storage places inside the processor called
registers.
Registers are like a scratch pad ram inside the processor and their
operation is very much like normal memory cells.
Memory is a limited resource but the number of memory cells is
large.
Registers are relatively very small in number, and are therefore a
very scarce and precious resource.
Registers
Processor operations mostly involve processing data. This
data can be stored in memory and accessed from there.
However, reading data from and storing data into memory
slows down the processor, as it involves complicated
processes of sending the data request across the control bus
and into the memory storage unit and getting the data
through the same channel. To speed up the processor
operations, the processor includes some internal memory
storage locations, called registers.
Registers
The registers store data elements for
processing without having to access the
memory. A limited number of registers are
built into the processor chip.
Accumulator
There is a central register in every processor
called the accumulator.
Traditionally all mathematical and logical
operations are performed on the accumulator.
The word size of a processor is defined by
the width of its accumulator.
A 32bit processor has an accumulator of 32
bits.
Processor Registers
There are ten 32-bit and six 16-bit processor
registers in (Issembly language) IA-32
architecture. The registers are grouped into three
categories
General registers
Control registers
Segment registers
iAPX 88 Registers (16-bit)
General Purpose
AX
BX
CX
DX
1. General Registers (AX, BX, CX, and
DX)
The registers AX, BX, CX, and DX behave as general purpose
registers in Intel architecture and do some specific functions in
addition to it. X in their names stand for extended meaning 16bit
registers. For example AX means we are referring to the extended
16bit “A” register. Its upper and lower byte are separately accessible
as AH (A high byte) and AL (A low byte). All general purpose
registers can be accessed as one 16bit register or as two 8bit registers.
The two registers AH and AL are part of the big whole AX. Any
change in AH or AL is reflected in AX as well. AX is a composite or
extended register formed by gluing together the two parts AH and AL.
General Registers (AX, BX, CX, and DX)
The A of AX stands for Accumulator. Even though all general
purpose registers can act as accumulator in most instructions
there are some specific variations which can only work on AX
which is why it is named the accumulator. The B of BX stands
for Base because of its role in memory addressing. The C of CX
stands for Counter as there are certain instructions that work with
an automatic count in the CX register. The D of DX stands for
Destination as it acts as the destination in I/O operations. The A,
B, C, and D are in letter sequence as well as depict some special
functionality of the register.
iAPX 88 Registers (16-bit)
General Purpose
AH AL
AX
16-bit
8-bit 8-bit
iAPX 88 Registers (16-bit)
General Purpose
BH BL
BX
16-bit
8-bit 8-bit
iAPX 88 Registers (16-bit)
General Purpose
AX A Accumulator Register
BX B Base Register
CX C Counter Register
DX D Destination Register
iAPX 88 Registers (16-bit)
Pointer / Index / Base
SI
DI
Index Registers (SI and DI)
SI and DI stand for source index and destination index
respectively. These are the index registers of the Intel architecture
which hold address of data and used in memory access. Being an
open and flexible architecture, Intel allows many mathematical and
logical operations on these registers as well like the general
registers. The source and destination are named because of their
implied functionality as the source or the destination in a special
class of instructions called the string instructions. However their
use is not at all restricted to string instructions. SI and DI are 16bit
and cannot be used as 8bit register pairs like AX, BX, CX, and DX.
iAPX 88 Registers (16-bit)
Pointer / Index / Base
SI SI Source Index
DI DI Destination Index
IP IP Instruction Pointer
SP SP Stack Pointer
BP BP Base Pointer
iAPX 88 Registers (16-bit)
Flag Register
- - - - O D I T S Z - A - P - C
C = Carry S = Sign Bit
P = Parity T = Trap Flag
A= Auxiliary Carry I = Interrupt Flag
Z= Zero Bit D = Direction Flag
O = Overflow
General Registers
Data registers.
Pointer registers.
Index registers.
Data registers
Four 32-bit data registers are used for arithmetic, logical, and
other operations. These 32-bit registers can be used in three ways
As complete 32-bit data registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-bit registers can be used as four 16-bit
data registers: AX, BX, CX and DX.
Lower and higher halves of the above-mentioned four 16-bit
registers can be used as eight 8-bit data registers: AH, AL, BH,
BL, CH, CL, DH, and DL.
Data registers
Data registers
Some of these data registers have specific use in arithmetical
operations.
AX is the primary accumulator; it is used in input/output and most arithmetic
instructions. For example, in multiplication operation, one operand is stored in
EAX or AX or AL register according to the size of the operand.
BX is known as the base register, as it could be used in indexed addressing.
CX is known as the count register, as the ECX, CX registers store the loop
count in iterative operations.
DX is known as the data register. It is also used in input/output operations. It is
also used with AX register along with DX for multiply and divide operations
involving large values.
Pointer Registers
The pointer registers are 32-bit EIP, ESP, and EBP registers and
corresponding 16-bit right portions IP, SP, and BP. There are three
categories of pointer registers
Instruction Pointer (IP) − The 16-bit IP register stores the offset
address of the next instruction to be executed. IP in association with
the CS register (as CS:IP) gives the complete address of the current
instruction in the code segment.
This is the special register containing the address of the next
instruction to be executed. No mathematics or memory access can be
done through this register. It is out of our direct control and is
automatically used. Playing with it is dangerous and needs special
care. Program control instructions change
the IP register.
Pointer Registers
Stack Pointer (SP)
It is a memory pointer and is used indirectly by a set of
instructions. This register will be explored in the discussion of
the system stack.
The 16-bit SP register provides the offset value within the
program stack. SP in association with the SS register (SS:SP)
refers to be current position of data or address within the
program stack.(top of stack ka address apny pass rakhwata ha)
Pointer Registers
Base Pointer (BP)
It is also a memory pointer containing the address in a
special area of memory called the stack and will be
explored alongside SP in the discussion of the stack.
The 16-bit BP register mainly helps in referencing the
parameter variables passed to a subroutine. The address
in SS register is combined with the offset in BP to get the
location of the parameter. BP can also be combined with
DI (destination) and SI (source) as base register for
special addressing.
Pointer Registers
Index Registers
The 32-bit index registers, ESI and EDI, and their 16-bit rightmost portions. SI
and DI, are used for indexed addressing and sometimes used in addition and
subtraction. There are two sets of index pointers
Source Index (SI) − It is used as source index for string operations.
Destination Index (DI) − It is used as destination index for string operations.
2. Control Registers
The 32-bit instruction pointer register and the 32-bit flags
register combined are considered as the control registers.
Many instructions involve comparisons and mathematical
calculations and change the status of the flags and some
other conditional instructions test the value of these
status flags to take the control flow to other location.
The common flag bits are:
2. Control Registers
The common flag bits are:
Overflow Flag (OF) − It indicates the overflow of a high-
order bit (leftmost bit) of data after a signed arithmetic
operation.
Direction Flag (DF) − It determines left or right direction
for moving or comparing string data. When the DF value
is 0, the string operation takes left-to-right direction and
when the value is set to 1, the string operation takes right-
to-left direction.
2. Control Registers
Zero Flag (ZF) − It indicates the result of an arithmetic or
comparison operation. A nonzero result clears the zero flag to 0, and a
zero result sets it to 1.
Auxiliary Carry Flag (AF) − It contains the carry from bit 3 to bit 4
following an arithmetic operation; used for specialized arithmetic. The
AF is set when a 1-byte arithmetic operation causes a carry from bit 3
into bit 4.
Parity Flag (PF) − It indicates the total number of 1-bits in the result
obtained from an arithmetic operation. An even number of 1-bits
clears the parity flag to 0 and an odd number of 1-bits sets the parity
flag to 1.
2. Control Registers
Interrupt Flag (IF) − It determines whether the external interrupts like
keyboard entry, etc., are to be ignored or processed. It disables the external
interrupt when the value is 0( interrupt nai kr sakhty) and enables
interrupts when set to 1(interrupt kr sakhty hayn)
Trap Flag (TF) − It allows setting the operation of the processor in single-
step mode. The DEBUG program we used sets the trap flag, so we could
step through the execution one instruction at a time.
Sign Flag (SF) − It shows the sign of the result of an arithmetic operation.
This flag is set according to the sign of a data item following the arithmetic
operation. The sign is indicated by the high-order of leftmost bit. A
positive result clears the value of SF to 0 and negative result sets it to 1.
2. Control Registers
Carry Flag (CF) − It contains the carry of 0 or 1 from a high-order
bit (leftmost) after an arithmetic operation. It also stores the contents
of last bit of a shift or rotate operation.
The following table indicates the position of fla g bits in the 16-bit
Flags register:
3.Segment Registers (CS, DS, SS, and ES)
Segments are specific areas defined in a program for containing
data, code and stack. There are three main segments −
Code Segment − It contains all the instructions to be executed. A
16-bit Code Segment register or CS register stores the starting
address of the code segment.
Data Segment − It contains data, constants and work areas. A 16-
bit Data Segment register or DS register stores the starting address
of the data segment.
Stack Segment − It contains data and return addresses of
procedures or subroutines. It is implemented as a 'stack' data
structure. The Stack Segment register or SS register stores the
starting address of the stack.
3.Segment Registers (CS, DS, SS, and ES)
Apart from the DS, CS and SS registers, there are other extra
segment registers - ES (extra segment), FS and GS, which provide
additional segments for storing data.
In assembly programming, a program needs to access the memory
locations. All memory locations within a segment are relative to the
starting address of the segment. To get the exact location of data or
instruction within a segment, an offset value (or displacement) is
required. To reference any memory location in a segment, the
processor combines the segment address in the segment register
with the offset value of the location.
3.Segment Registers (CS, DS, SS, and ES)
Flag Registers
The FLAGS register is the status register in Intel
x86 microprocessors that contains the current state
of the processor. This register is 16 bits wide. Its
successors, the EFLAGS and RFLAGS registers,
are 32 bits and 64 bits wide, respectively.
Types of Flag Registers
Status Flags Allow the results of one instruction
to influence later instructions. The arithmetic
instructions use OF, SF, ZF, AF, PF, and CF
Control Flags
IF , DF , TF
The individual flags are explained below:
Types of Flag Registers
C (Carry):
When two 16bit numbers are added the answer can be 17 bits long
or when two 8bit numbers are added the answer can be 9 bits long.
This extra bit that won’t fit in the target register is placed in the
carry flag where it can be used and tested.
Set to 1 if carry is generated after addition or borrow requires after
subtraction function performed, if no carry out then flag set to zero.
P (Parity):
If number of 1’s is even in result then parity flag is set to 1. Parity
is the number of “one” bits in a binary number. Parity is either odd
or even. This information is normally used in communications to
verify the integrity of data sent from the sender to the receiver.
Types of Flag Registers
A (Auxiliary Carry):
Set to 1 if there is a carry out to higher nibble from lower nibble. A
number in base 16 is called a hexa number and can be represented
by 4 bits. The collection of 4 bits is called a nibble. During addition
or subtraction if a carry goes from one nibble to the next this flag is
set. The Carry flag is for the carry from the whole addition, while
auxiliary carry is the query from the first nibble to the second.
Z (Zero Flag):
The Zero flag is set if the last mathematical or logical instruction
has produced a zero in its destination.
Types of Flag Registers
S (Sign Flag):
A signed number is represented in its two’s complement form in the
computer. The most significant bit (MSB) of a negative number in
this representation is 1 and for a positive number it is zero. The sign
bit of the last mathematical or logical operation’s destination is
copied into the sign flag.
A signed flag is set to 1 if the last bit MSB of result is 1. Flag zero
represent positive number and flag 1 represent negative number.
T (Trap Flag):
If T flag is set to 1 then single step interrupt occurs after the
execution of every instruction and program is executing in single
step mode.
Types of Flag Registers
I (Interrupt Flag):
It tells whether the processor can be interrupted from outside or not.
Sometimes the programmer doesn’t want a particular task to be
interrupted so the Interrupt flag can be zeroed for this time. The
programmer rather than the processor sets this flag since the
programmer knows when interruption is okay and when it is not.
Interruption can be disabled or enabled by making this bit zero or
one, respectively, using special instructions.
D (Direction Flag):
Specifically related to string instructions, this flag tells whether the
current operation has to be done from bottom to top of the block
(D=0) or from top to bottom of the block (D=1).
Types of Flag Registers
(Overflow Flag):
Flag is set to 1 if the signed result cannot be expressed within the
number of bits in destination operand. The overflow flag is set
during signed arithmetic, e.g. addition or subtraction, when the sign
of the destination changes unexpectedly. The actual process sets the
overflow flag whenever the carry into the MSB is different from the
carry out of the MSB.(most significant bit)
Thank you

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(Registers & Flags ) and their function in assembly

  • 1. CSI-408 Computer Organization and Assembly Language Programming Topic # 3 Introduction to Registers & Flags
  • 2. Basic Computer Organization iAPX 88 Registers (16-bit)
  • 3. Registers There are temporary storage places inside the processor called registers. Registers are like a scratch pad ram inside the processor and their operation is very much like normal memory cells. Memory is a limited resource but the number of memory cells is large. Registers are relatively very small in number, and are therefore a very scarce and precious resource.
  • 4. Registers Processor operations mostly involve processing data. This data can be stored in memory and accessed from there. However, reading data from and storing data into memory slows down the processor, as it involves complicated processes of sending the data request across the control bus and into the memory storage unit and getting the data through the same channel. To speed up the processor operations, the processor includes some internal memory storage locations, called registers.
  • 5. Registers The registers store data elements for processing without having to access the memory. A limited number of registers are built into the processor chip.
  • 6. Accumulator There is a central register in every processor called the accumulator. Traditionally all mathematical and logical operations are performed on the accumulator. The word size of a processor is defined by the width of its accumulator. A 32bit processor has an accumulator of 32 bits.
  • 7. Processor Registers There are ten 32-bit and six 16-bit processor registers in (Issembly language) IA-32 architecture. The registers are grouped into three categories General registers Control registers Segment registers
  • 8. iAPX 88 Registers (16-bit) General Purpose AX BX CX DX
  • 9. 1. General Registers (AX, BX, CX, and DX) The registers AX, BX, CX, and DX behave as general purpose registers in Intel architecture and do some specific functions in addition to it. X in their names stand for extended meaning 16bit registers. For example AX means we are referring to the extended 16bit “A” register. Its upper and lower byte are separately accessible as AH (A high byte) and AL (A low byte). All general purpose registers can be accessed as one 16bit register or as two 8bit registers. The two registers AH and AL are part of the big whole AX. Any change in AH or AL is reflected in AX as well. AX is a composite or extended register formed by gluing together the two parts AH and AL.
  • 10. General Registers (AX, BX, CX, and DX) The A of AX stands for Accumulator. Even though all general purpose registers can act as accumulator in most instructions there are some specific variations which can only work on AX which is why it is named the accumulator. The B of BX stands for Base because of its role in memory addressing. The C of CX stands for Counter as there are certain instructions that work with an automatic count in the CX register. The D of DX stands for Destination as it acts as the destination in I/O operations. The A, B, C, and D are in letter sequence as well as depict some special functionality of the register.
  • 11. iAPX 88 Registers (16-bit) General Purpose AH AL AX 16-bit 8-bit 8-bit
  • 12. iAPX 88 Registers (16-bit) General Purpose BH BL BX 16-bit 8-bit 8-bit
  • 13. iAPX 88 Registers (16-bit) General Purpose AX A Accumulator Register BX B Base Register CX C Counter Register DX D Destination Register
  • 14. iAPX 88 Registers (16-bit) Pointer / Index / Base SI DI
  • 15. Index Registers (SI and DI) SI and DI stand for source index and destination index respectively. These are the index registers of the Intel architecture which hold address of data and used in memory access. Being an open and flexible architecture, Intel allows many mathematical and logical operations on these registers as well like the general registers. The source and destination are named because of their implied functionality as the source or the destination in a special class of instructions called the string instructions. However their use is not at all restricted to string instructions. SI and DI are 16bit and cannot be used as 8bit register pairs like AX, BX, CX, and DX.
  • 16. iAPX 88 Registers (16-bit) Pointer / Index / Base SI SI Source Index DI DI Destination Index IP IP Instruction Pointer SP SP Stack Pointer BP BP Base Pointer
  • 17. iAPX 88 Registers (16-bit) Flag Register - - - - O D I T S Z - A - P - C C = Carry S = Sign Bit P = Parity T = Trap Flag A= Auxiliary Carry I = Interrupt Flag Z= Zero Bit D = Direction Flag O = Overflow
  • 18. General Registers Data registers. Pointer registers. Index registers.
  • 19. Data registers Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-bit registers can be used in three ways As complete 32-bit data registers: EAX, EBX, ECX, EDX. Lower halves of the 32-bit registers can be used as four 16-bit data registers: AX, BX, CX and DX. Lower and higher halves of the above-mentioned four 16-bit registers can be used as eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.
  • 21. Data registers Some of these data registers have specific use in arithmetical operations. AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For example, in multiplication operation, one operand is stored in EAX or AX or AL register according to the size of the operand. BX is known as the base register, as it could be used in indexed addressing. CX is known as the count register, as the ECX, CX registers store the loop count in iterative operations. DX is known as the data register. It is also used in input/output operations. It is also used with AX register along with DX for multiply and divide operations involving large values.
  • 22. Pointer Registers The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-bit right portions IP, SP, and BP. There are three categories of pointer registers Instruction Pointer (IP) − The 16-bit IP register stores the offset address of the next instruction to be executed. IP in association with the CS register (as CS:IP) gives the complete address of the current instruction in the code segment. This is the special register containing the address of the next instruction to be executed. No mathematics or memory access can be done through this register. It is out of our direct control and is automatically used. Playing with it is dangerous and needs special care. Program control instructions change the IP register.
  • 23. Pointer Registers Stack Pointer (SP) It is a memory pointer and is used indirectly by a set of instructions. This register will be explored in the discussion of the system stack. The 16-bit SP register provides the offset value within the program stack. SP in association with the SS register (SS:SP) refers to be current position of data or address within the program stack.(top of stack ka address apny pass rakhwata ha)
  • 24. Pointer Registers Base Pointer (BP) It is also a memory pointer containing the address in a special area of memory called the stack and will be explored alongside SP in the discussion of the stack. The 16-bit BP register mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP can also be combined with DI (destination) and SI (source) as base register for special addressing.
  • 26. Index Registers The 32-bit index registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. There are two sets of index pointers Source Index (SI) − It is used as source index for string operations. Destination Index (DI) − It is used as destination index for string operations.
  • 27. 2. Control Registers The 32-bit instruction pointer register and the 32-bit flags register combined are considered as the control registers. Many instructions involve comparisons and mathematical calculations and change the status of the flags and some other conditional instructions test the value of these status flags to take the control flow to other location. The common flag bits are:
  • 28. 2. Control Registers The common flag bits are: Overflow Flag (OF) − It indicates the overflow of a high- order bit (leftmost bit) of data after a signed arithmetic operation. Direction Flag (DF) − It determines left or right direction for moving or comparing string data. When the DF value is 0, the string operation takes left-to-right direction and when the value is set to 1, the string operation takes right- to-left direction.
  • 29. 2. Control Registers Zero Flag (ZF) − It indicates the result of an arithmetic or comparison operation. A nonzero result clears the zero flag to 0, and a zero result sets it to 1. Auxiliary Carry Flag (AF) − It contains the carry from bit 3 to bit 4 following an arithmetic operation; used for specialized arithmetic. The AF is set when a 1-byte arithmetic operation causes a carry from bit 3 into bit 4. Parity Flag (PF) − It indicates the total number of 1-bits in the result obtained from an arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd number of 1-bits sets the parity flag to 1.
  • 30. 2. Control Registers Interrupt Flag (IF) − It determines whether the external interrupts like keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0( interrupt nai kr sakhty) and enables interrupts when set to 1(interrupt kr sakhty hayn) Trap Flag (TF) − It allows setting the operation of the processor in single- step mode. The DEBUG program we used sets the trap flag, so we could step through the execution one instruction at a time. Sign Flag (SF) − It shows the sign of the result of an arithmetic operation. This flag is set according to the sign of a data item following the arithmetic operation. The sign is indicated by the high-order of leftmost bit. A positive result clears the value of SF to 0 and negative result sets it to 1.
  • 31. 2. Control Registers Carry Flag (CF) − It contains the carry of 0 or 1 from a high-order bit (leftmost) after an arithmetic operation. It also stores the contents of last bit of a shift or rotate operation. The following table indicates the position of fla g bits in the 16-bit Flags register:
  • 32. 3.Segment Registers (CS, DS, SS, and ES) Segments are specific areas defined in a program for containing data, code and stack. There are three main segments − Code Segment − It contains all the instructions to be executed. A 16-bit Code Segment register or CS register stores the starting address of the code segment. Data Segment − It contains data, constants and work areas. A 16- bit Data Segment register or DS register stores the starting address of the data segment. Stack Segment − It contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure. The Stack Segment register or SS register stores the starting address of the stack.
  • 33. 3.Segment Registers (CS, DS, SS, and ES) Apart from the DS, CS and SS registers, there are other extra segment registers - ES (extra segment), FS and GS, which provide additional segments for storing data. In assembly programming, a program needs to access the memory locations. All memory locations within a segment are relative to the starting address of the segment. To get the exact location of data or instruction within a segment, an offset value (or displacement) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the offset value of the location.
  • 34. 3.Segment Registers (CS, DS, SS, and ES)
  • 35. Flag Registers The FLAGS register is the status register in Intel x86 microprocessors that contains the current state of the processor. This register is 16 bits wide. Its successors, the EFLAGS and RFLAGS registers, are 32 bits and 64 bits wide, respectively.
  • 36. Types of Flag Registers Status Flags Allow the results of one instruction to influence later instructions. The arithmetic instructions use OF, SF, ZF, AF, PF, and CF Control Flags IF , DF , TF The individual flags are explained below:
  • 37. Types of Flag Registers C (Carry): When two 16bit numbers are added the answer can be 17 bits long or when two 8bit numbers are added the answer can be 9 bits long. This extra bit that won’t fit in the target register is placed in the carry flag where it can be used and tested. Set to 1 if carry is generated after addition or borrow requires after subtraction function performed, if no carry out then flag set to zero. P (Parity): If number of 1’s is even in result then parity flag is set to 1. Parity is the number of “one” bits in a binary number. Parity is either odd or even. This information is normally used in communications to verify the integrity of data sent from the sender to the receiver.
  • 38. Types of Flag Registers A (Auxiliary Carry): Set to 1 if there is a carry out to higher nibble from lower nibble. A number in base 16 is called a hexa number and can be represented by 4 bits. The collection of 4 bits is called a nibble. During addition or subtraction if a carry goes from one nibble to the next this flag is set. The Carry flag is for the carry from the whole addition, while auxiliary carry is the query from the first nibble to the second. Z (Zero Flag): The Zero flag is set if the last mathematical or logical instruction has produced a zero in its destination.
  • 39. Types of Flag Registers S (Sign Flag): A signed number is represented in its two’s complement form in the computer. The most significant bit (MSB) of a negative number in this representation is 1 and for a positive number it is zero. The sign bit of the last mathematical or logical operation’s destination is copied into the sign flag. A signed flag is set to 1 if the last bit MSB of result is 1. Flag zero represent positive number and flag 1 represent negative number. T (Trap Flag): If T flag is set to 1 then single step interrupt occurs after the execution of every instruction and program is executing in single step mode.
  • 40. Types of Flag Registers I (Interrupt Flag): It tells whether the processor can be interrupted from outside or not. Sometimes the programmer doesn’t want a particular task to be interrupted so the Interrupt flag can be zeroed for this time. The programmer rather than the processor sets this flag since the programmer knows when interruption is okay and when it is not. Interruption can be disabled or enabled by making this bit zero or one, respectively, using special instructions. D (Direction Flag): Specifically related to string instructions, this flag tells whether the current operation has to be done from bottom to top of the block (D=0) or from top to bottom of the block (D=1).
  • 41. Types of Flag Registers (Overflow Flag): Flag is set to 1 if the signed result cannot be expressed within the number of bits in destination operand. The overflow flag is set during signed arithmetic, e.g. addition or subtraction, when the sign of the destination changes unexpectedly. The actual process sets the overflow flag whenever the carry into the MSB is different from the carry out of the MSB.(most significant bit)