![Three Address Instruction
Computers with three-address instruction formats can
use each address field to specify either a processor
register or a memory operand. The program in assembly
language that evaluates X = (A + B) * (C + D) is shown
below.
ADD R1, A, B R1 M [A] + M [B]
ADD R2, C, D R2 M[C] + M [D]
MUL X, R1, R2 M[X] R1 * R2](https://image.slidesharecdn.com/co-190410165631/85/Types-of-Instruction-Format-4-320.jpg)
![Two Address Instruction
Two address instructions are the most common in
commercial computers. Here again each address field can
specify either a processor register or a memory word. The
program to evaluate X = (A + B) * (C + D) is as follows:
MOV R1, A R1 M [A]
ADD R1, B R1 R1 + M [B]
MOV R2, C R2 M [C]
ADD R2, D R2 R2 + M [D]
MUL R1, R2 R1 R1 * R2
MOV X, R1 M [X] R1](https://image.slidesharecdn.com/co-190410165631/85/Types-of-Instruction-Format-6-320.jpg)
![One Address Instruction
LOAD A AC M [A]
ADD B AC AC + M [B]
STORE T M [T] AC
LOAD C AC M [C]
ADD D AC AC + M [D]
MUL T AC AC * M [T]
STORE X M [X] AC
All the operations are done between the AC register and a
memory operand. T is the address of the temporary memory
location required for storing the intermediate result.](https://image.slidesharecdn.com/co-190410165631/85/Types-of-Instruction-Format-9-320.jpg)
![Zero Address Instruction
PUSH A TOS A
PUSH B TOS B
ADD TOS (A + B)
PUSH C TOS B
PUSH D TOS D
ADD TOS (C + D)
MUL TOS (C + D) * (A + B)
POP X M [X] TOS
To evaluate arithmetic expressions in a stack computer, it is
necessary to convert the expression into reverse polish
notation.](https://image.slidesharecdn.com/co-190410165631/85/Types-of-Instruction-Format-11-320.jpg)
![RISC Instruction
LOAD R1, A R1 M [A]
LOAD R2, B R2 M [B]
LOAD R3, C R3 M [C]
LOAD R4, D R4 M [D]
ADD R1, R1, R2 R1 R1 + R2
ADD R3, R3, R4 R3 R3 + R4
MUL R1, R1, R3 R1 R1 * R3
STORE X, R1 M [X] R1
The load instructions transfer the operands from memory to
CPU register. Add and multiply operations are executed with
data in the registers without accessing memory.
The result of the computations is then stored in memory with
a store instruction.](https://image.slidesharecdn.com/co-190410165631/85/Types-of-Instruction-Format-13-320.jpg)
Types of Instruction Format
- 1. NAME: PANCHAL DHRUMIL INDRAVADAN BRANCH: COMPUTER ENGINEERING (B.E.) SEMESTER: 4TH SEM YEAR: 2018-19 Welcome
- 2. Topic Types of Instruction Formats
- 3. Contain Three Address Instruction Two Address Instruction One Address Instruction Zero Address Instruction RISC Instruction
- 4. Three Address Instruction Computers with three-address instruction formats can use each address field to specify either a processor register or a memory operand. The program in assembly language that evaluates X = (A + B) * (C + D) is shown below. ADD R1, A, B R1 M [A] + M [B] ADD R2, C, D R2 M[C] + M [D] MUL X, R1, R2 M[X] R1 * R2
- 5. Three Address Instruction The advantage of three-address format is that it results in short programs when evaluating arithmetic expressions. The disadvantage is that the binary-coded instructions require too many bits to specify three addresses. An example of a commercial computer that uses three- address instruction is the Cyber 170.
- 6. Two Address Instruction Two address instructions are the most common in commercial computers. Here again each address field can specify either a processor register or a memory word. The program to evaluate X = (A + B) * (C + D) is as follows: MOV R1, A R1 M [A] ADD R1, B R1 R1 + M [B] MOV R2, C R2 M [C] ADD R2, D R2 R2 + M [D] MUL R1, R2 R1 R1 * R2 MOV X, R1 M [X] R1
- 7. Two Address Instruction The MOV instruction moves or transfers the operands to and from memory and processor registers. The first symbol listed in an instruction is assumed to be both a source and the destination where the result of the operation is transferred.
- 8. One Address Instruction One address instructions use an implied accumulator (AC) register for all data manipulation. For multiplication and division these is a need for a second register. However, here we will neglect the second register and assume that the AC contains the result of all operations. The program to evaluate X = (A + B) * (C + D) is:
- 9. One Address Instruction LOAD A AC M [A] ADD B AC AC + M [B] STORE T M [T] AC LOAD C AC M [C] ADD D AC AC + M [D] MUL T AC AC * M [T] STORE X M [X] AC All the operations are done between the AC register and a memory operand. T is the address of the temporary memory location required for storing the intermediate result.
- 10. Zero Address Instruction A stack-organized computer does not use an address field for the instructions ADD and MUL. The PUSH and POP instructions, however, need an address field to specify the operand that communicates with the stack. The program to evaluate X = (A + B) * (C + D) will be written for a stack-organized computer. Here, TOS is top of stack.
- 11. Zero Address Instruction PUSH A TOS A PUSH B TOS B ADD TOS (A + B) PUSH C TOS B PUSH D TOS D ADD TOS (C + D) MUL TOS (C + D) * (A + B) POP X M [X] TOS To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression into reverse polish notation.
- 12. RISC Instruction All other instructions are executed within the registers of the CPU without referring to memory. A program for a RISC type CPU consists of LOAD and STORE instructions that have one memory and one register address, and computational-type instructions that have three addresses with all three specifying processor registers. The following is a program to evaluate X = (A+B) * (C+D).
- 13. RISC Instruction LOAD R1, A R1 M [A] LOAD R2, B R2 M [B] LOAD R3, C R3 M [C] LOAD R4, D R4 M [D] ADD R1, R1, R2 R1 R1 + R2 ADD R3, R3, R4 R3 R3 + R4 MUL R1, R1, R3 R1 R1 * R3 STORE X, R1 M [X] R1 The load instructions transfer the operands from memory to CPU register. Add and multiply operations are executed with data in the registers without accessing memory. The result of the computations is then stored in memory with a store instruction.
- 14. References Inspiration from Prof. Parul Bakaraniya and Prof. Nitin Patel Notes of COA Textbook of COA Images from Google Images Some my own Knowledge
- 15. Thank You