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WINDOWS NT INTERNALS – 02
Computer Call
September 22, 1997
HARDWARE
Bus Architecture Registers
• Size
• Relative Position
• Contents of Registers
Error and Status Reporting
Interrupt Behaviour
DEVICE REGISTERS
• Status Registers
• Data Buffer
• Command Register
PARALLEL PORT REGISTERS
Offse
t
Regist
er
Access Description
0 Data R/W Data byte transferred
through parallel port
1 Status
Bit 0-1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
R/O Current parallel port status
Reserved
0 – Interrupt has been
requested by port
0 – An error has occurred
1 – Printer is selected
1 – Printer is out of paper
0 – Acknowledge
0 – Printer is busy
2 Contro
l
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5-7
R/W
Enable
Interrupts
Reserved
Commands sent to parallel
port
1 – Strobe data to/from
parallel port
1 – Automatic line feed
0 – Initialize printer
1 – Select Printer
HAL FUNCTIONS FOR DATA
REGISTERS
• READ-PORT-XXX
• WRITE-PORT-XXX
• READ-PORT-BUFFER-XXX
• WRITE-PORT-BUFFER-XXX
DEVICE INTERRUPTS
• Interrupt Priorities
• Interrupt Vectors
• Signaling Mechanism(edge triggered/level
triggered)
DATA TRANSFER
MECHANISMS
• Programmed I/O
• Direct Memory Access
• Shared Buffers
DEVICE DEDICATED MEMORY
• Private Range of Addresses
• Required in
 Control Register
 Startup code for device
 Temporary Buffer
AUTO CONFIGURATION OF
DEVICE
• Manufacture supplies Resource list
• Resource list for Device contains
 Manufacturer supplies ID
 Device type ID
 I/O space requirements
 DMA Channels
 Device Memory requirements
DIFFERENT TYPES OF BUS
SPECIFICATION
• ISA
• MCA
• EISA
• PCI
BUS STANDARDS
Data
Transfer
Interrupt
Mechanism
DMA
Mechanism
Device
Memory
Auto
Configuration
ISA 8MB/sec 8259 PIC 8237
DMAC
16MB
Physical
No
MCA 10-160
MB/sec
8259 PIC 4 GB
Physical
Yes
EISA 33
MB/sec
Superset ISA
Mechanism
4 GB
Physical
Yes
PCI 132
MB/sec
to 264
MB/sec

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