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Basics of FET
Rajesh B. Lohani
Dept. of E & TC
Goa College of Engineering
1
References
Electronic Device Theory Robert Boylestead and Nashelsky
Integrated Electronics by Jacob Millman
https://www.polytechnichub.com/
Courtesy : Google images
The presentation focus on the basics of
Field Effect Transistors.
Learning Objectives
2
i) Explain the Construction of FET.
ii) Identify FET.
iii) Understand the Operating Principle and Characteristics of FET.
 FET stands for Field effect transistor.
 FET is a three terminal semiconductor device.( Gate (G), Source (S) and Drain (D))
 FET is a Unipolar {One type of carrier} device.
 FET is a voltage controlled , constant current device.
( the output characteristics of the device are controlled by input voltage).
 FET has no Junction.
 FET is a square law devices
Basic types of field effect transistors:
 Junction field effect transistor (JFET)
 Insulated Gate field effect transistor(IGFET)
 Metal oxide semiconductor field effect transistor (MOSFET)
 Metal semiconductor field effect transistor (MESFET)
 Metal insulator semiconductor field effect transistor
(MISFET)
 Modulation doped field effect transistor (MODFET) -- HEMT
 Based on the type of carrier i.e. electrons or holes. N type & N type
FET
FET being is a Unipolar device. Based on the majority
carrier (Current flows due to Majority carrier)
FET that can be operated to enhance the width of the
channel i.e. it can have enhancement-mode operation.
Such a FET is called MOSFET.
 A JFET is a three terminal semiconductor device in
which current flows is by one type of carrier i.e.
electrons or holes.
 The current flows is controlled by means of an electric
field between the gate & the conducting channel of the
device.
 A JFET consists of a p-type or n-type silicon bar
containing two pn junctions at the sides as shown
 The bar forms the conducting channel for the charge
carriers.
JFET Construction Details:
 If the bar is of p-type, it is called p-channel
if the bar is of n-type, it is called n-channel JFET
The two pn junctions forming diodes are connected
internally and a common terminal called gate is taken out.
JFET can only be operated in the depletion mode.
JFET Polarities BAISING
n-channel JFET polarities p-channel JFET polarities
The voltage between the gate and source is such that the gate is
reverse biased. i.e. it can only have negative gate operation for n-
channel and positive gate operation for p-channel. That means we can
only decrease the width of the channel from its zero-bias size. This
type of operation is known as depletion-mode operation.
The source and the drain terminals are interchangeable.
The input circuit (gate to source) of a JFET is reverse biased.(i.e. has
high input impedance). The drain is so biased w.r.t. source that
drain current ID flows from the source to drain.
In all JFETs, source current IS is equal to the drain current i.e IS = ID.
Principle of JEFT
 The two pn junctions at the sides form two depletion layers.
 The current flows (i.e. electrons) is through the channel
between the two depletion layers and out of the drain.
 The width and hence resistance of this channel can be
controlled by changing the input voltage VGS.
 The greater the reverse voltage VGS, the wider will be the
depletion layer and narrower will be the conducting
channel.
 The narrower channel means greater resistance and hence
source to drain current decreases.
 Reverse will happen when VGS decreases.
 JFET operates on the principle that width and hence
resistance of the conducting channel can be varied by
changing the reverse voltage VGS.
 In other word, the magnitude of drain current ID can be
changed by altering VGS.
n-channel JFET with normal
polarities
Working of JEFT
Condition 1
 When a voltage VDS is applied between drain and source
terminals and voltage on the gate is zero as shown .
 Two pn junctions at the sides of the bar establish depletion
layers.
 The electrons will flow from source to drain through a channel
between the depletion layers.
 The size of the depletion layers determines the width of the
channel and hence current flows through the bar.
Condition: ii
 When a reverse voltage VGS is applied between gate & source
terminals, as shown.
 The width of depletion layer is increased.
 This reduces the width of conducting channel, thereby increasing the
resistance of n-type bar.
 Consequently, the current from source to drain is decreased.
 On the other hand, when the reverse bias on the gate is decreased,
the width of the depletion layer also decreases.
 This increases the width of the conducting channel and hence source
to drain current.
 A p-channel JFET operates in the same manner as an n-channel JFET
except that channel current carriers will be the holes instead of
electrons and polarities of VGS and VDS are reversed.
Characteristics of JFET
13
Transfer Characteristics
 In a JFET, the relationship (Shockley’s Equation) between VGS (input
voltage) and ID (output current) is used to define the transfer
characteristics, and a little more complicated (and not linear):
 
 
 
2
GS
D DSS
P
V
I = I 1 -
V
At the pinch-off point:
• any further increase in VGS does
not produce any increase in ID.
VGS at pinch-off is denoted as Vp.
• ID is at saturation or maximum. It is
referred to as IDSS.
14
Transfer (Transconductance) Curve
From this graph it is easy to determine the value of ID for a given value of VGS
It is also possible to determine IDSS and VP by looking at the knee where VGS is 0
Advantages of JFET
 It has a very high input impedance. This permits high degree of isolation
between the input and output circuits.
 The operation of a JFET depends upon the bulk material current carriers that
do not cross junctions. Therefore, the inherent noise of tubes and those of
transistors are not present in a JFET.
 A JFET has a negative temperature co-efficient of resistance. This avoids the
risk of thermal runaway.
 A JFET has a very high power gain. This eliminates the necessity of using
driver stages.
 A JFET has a smaller size, longer life and high efficiency
Difference Between JFET and BJT
JFET BJT
 Only one type of carrier, i.e.
holes in p-type channel and
electrons in n-type channel.
Unipolar transistor
 Both electrons and holes play role
in conduction. Bipolar transistor
 Input circuit of a JFET is reverse
biased, therefore, it has a high
input impedance.
 Input circuit of a BJT is forward
biased and hence has low input
impedance.
 No current enters the gate of
JFET. .
 Typical BJT base current might be
a few µA
 A JFET uses voltage on the gate
terminal to control the current
between drain & source.
 A BJT uses the current into its base
to control a large current between
collector and emitter.
 No junction., noise level in JFET
is very small
 Two Junctions,. noise level is high.
17
Application of JFET
 Electronic switch.
 Oscillator circuit.
 Detectors.
 High impedance wide band amplifier.
 Voltage variable resistor (VVR)
 Voltage development resistor (VDR).
Most JFETs built onto IC's nowadays involve single-ended
geometries that require doping for the gate from only
one side of the channel, i.e., the surface of the wafer.
This is achieved by building the JFET on an epitaxially
grown channel over a doped substrate that acts as the
second gate.
18
Depletion Mode MOSFET Construction
 The Drain (D) and Source (S) leads connect to the to n-doped regions
 These N-doped regions are connected via an n-channel
 This n-channel is connected to the Gate (G) via a thin insulating layer of SiO2
 The n-doped material lies on a p-doped substrate that may have an
additional terminal connection called SS
19
Basic Operation
 A D-MOSFET may be biased to operate in two modes:
 the Depletion mode or the Enhancement mode
20
p-Channel Depletion Mode MOSFET
 The p-channel Depletion mode MOSFET is similar to the n-channel except
that the voltage polarities and current directions are reversed
21
Enhancement Mode
MOSFET’s
22
Enhancement Mode MOSFET Construction
 The Drain (D) and Source (S) connect to the to n-doped regions
 These n-doped regions are not connected via an n-channel without an
external voltage
 The Gate (G) connects to the p-doped substrate via a thin insulating layer of
SiO2
 The n-doped material lies on a p-doped substrate that may have an
additional terminal connection called SS
23
Basic Operation
The Enhancement mode MOSFET only operates in the enhancement mode.
 VGS is always positive
 IDSS = 0 when VGS < VT
 As VGS increases above VT, ID increases
 If VGS is kept constant and VDS is increased, then ID saturates (IDSS)
 The saturation level, VDSsat is reached.
24
Comparison chart
JFET D-MOSFET E-MOSFET
 The primary difference between the construction of depletion type and enhancement
type MOSFET is that, there is no such channel in enhancement type MOSFET as a
constructed component of the device.
 In Enhancement type MOSFET, the inversion layer is formed when holes are attracted
to the interface by a negative gate voltage, thereby forming a channel.
25
Learning Outcomes
 The viewer will be able to classify the different types of FET
 and its working.
Constructive criticisms are welcome for further improvement.
You can reach me at: rblohani@gec.ac.in
This presentation has been peer-reviewed by Dr. Samarth Borkar.
Dedicated to my loving parents
Late. Janaki B. Lohani and Mr. Basant B. Lohani
(Retd. Principal)
26
Thank You for your time.

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Basics of JFET

  • 1. Basics of FET Rajesh B. Lohani Dept. of E & TC Goa College of Engineering 1 References Electronic Device Theory Robert Boylestead and Nashelsky Integrated Electronics by Jacob Millman https://www.polytechnichub.com/ Courtesy : Google images The presentation focus on the basics of Field Effect Transistors.
  • 2. Learning Objectives 2 i) Explain the Construction of FET. ii) Identify FET. iii) Understand the Operating Principle and Characteristics of FET.
  • 3.  FET stands for Field effect transistor.  FET is a three terminal semiconductor device.( Gate (G), Source (S) and Drain (D))  FET is a Unipolar {One type of carrier} device.  FET is a voltage controlled , constant current device. ( the output characteristics of the device are controlled by input voltage).  FET has no Junction.  FET is a square law devices
  • 4. Basic types of field effect transistors:  Junction field effect transistor (JFET)  Insulated Gate field effect transistor(IGFET)  Metal oxide semiconductor field effect transistor (MOSFET)  Metal semiconductor field effect transistor (MESFET)  Metal insulator semiconductor field effect transistor (MISFET)  Modulation doped field effect transistor (MODFET) -- HEMT  Based on the type of carrier i.e. electrons or holes. N type & N type FET
  • 5. FET being is a Unipolar device. Based on the majority carrier (Current flows due to Majority carrier) FET that can be operated to enhance the width of the channel i.e. it can have enhancement-mode operation. Such a FET is called MOSFET.
  • 6.  A JFET is a three terminal semiconductor device in which current flows is by one type of carrier i.e. electrons or holes.  The current flows is controlled by means of an electric field between the gate & the conducting channel of the device.  A JFET consists of a p-type or n-type silicon bar containing two pn junctions at the sides as shown  The bar forms the conducting channel for the charge carriers. JFET Construction Details:
  • 7.  If the bar is of p-type, it is called p-channel if the bar is of n-type, it is called n-channel JFET The two pn junctions forming diodes are connected internally and a common terminal called gate is taken out. JFET can only be operated in the depletion mode.
  • 8. JFET Polarities BAISING n-channel JFET polarities p-channel JFET polarities The voltage between the gate and source is such that the gate is reverse biased. i.e. it can only have negative gate operation for n- channel and positive gate operation for p-channel. That means we can only decrease the width of the channel from its zero-bias size. This type of operation is known as depletion-mode operation. The source and the drain terminals are interchangeable. The input circuit (gate to source) of a JFET is reverse biased.(i.e. has high input impedance). The drain is so biased w.r.t. source that drain current ID flows from the source to drain. In all JFETs, source current IS is equal to the drain current i.e IS = ID.
  • 9. Principle of JEFT  The two pn junctions at the sides form two depletion layers.  The current flows (i.e. electrons) is through the channel between the two depletion layers and out of the drain.  The width and hence resistance of this channel can be controlled by changing the input voltage VGS.  The greater the reverse voltage VGS, the wider will be the depletion layer and narrower will be the conducting channel.  The narrower channel means greater resistance and hence source to drain current decreases.  Reverse will happen when VGS decreases.  JFET operates on the principle that width and hence resistance of the conducting channel can be varied by changing the reverse voltage VGS.  In other word, the magnitude of drain current ID can be changed by altering VGS. n-channel JFET with normal polarities
  • 10. Working of JEFT Condition 1  When a voltage VDS is applied between drain and source terminals and voltage on the gate is zero as shown .  Two pn junctions at the sides of the bar establish depletion layers.  The electrons will flow from source to drain through a channel between the depletion layers.  The size of the depletion layers determines the width of the channel and hence current flows through the bar.
  • 11. Condition: ii  When a reverse voltage VGS is applied between gate & source terminals, as shown.  The width of depletion layer is increased.  This reduces the width of conducting channel, thereby increasing the resistance of n-type bar.  Consequently, the current from source to drain is decreased.  On the other hand, when the reverse bias on the gate is decreased, the width of the depletion layer also decreases.  This increases the width of the conducting channel and hence source to drain current.  A p-channel JFET operates in the same manner as an n-channel JFET except that channel current carriers will be the holes instead of electrons and polarities of VGS and VDS are reversed.
  • 13. 13 Transfer Characteristics  In a JFET, the relationship (Shockley’s Equation) between VGS (input voltage) and ID (output current) is used to define the transfer characteristics, and a little more complicated (and not linear):       2 GS D DSS P V I = I 1 - V At the pinch-off point: • any further increase in VGS does not produce any increase in ID. VGS at pinch-off is denoted as Vp. • ID is at saturation or maximum. It is referred to as IDSS.
  • 14. 14 Transfer (Transconductance) Curve From this graph it is easy to determine the value of ID for a given value of VGS It is also possible to determine IDSS and VP by looking at the knee where VGS is 0
  • 15. Advantages of JFET  It has a very high input impedance. This permits high degree of isolation between the input and output circuits.  The operation of a JFET depends upon the bulk material current carriers that do not cross junctions. Therefore, the inherent noise of tubes and those of transistors are not present in a JFET.  A JFET has a negative temperature co-efficient of resistance. This avoids the risk of thermal runaway.  A JFET has a very high power gain. This eliminates the necessity of using driver stages.  A JFET has a smaller size, longer life and high efficiency
  • 16. Difference Between JFET and BJT JFET BJT  Only one type of carrier, i.e. holes in p-type channel and electrons in n-type channel. Unipolar transistor  Both electrons and holes play role in conduction. Bipolar transistor  Input circuit of a JFET is reverse biased, therefore, it has a high input impedance.  Input circuit of a BJT is forward biased and hence has low input impedance.  No current enters the gate of JFET. .  Typical BJT base current might be a few µA  A JFET uses voltage on the gate terminal to control the current between drain & source.  A BJT uses the current into its base to control a large current between collector and emitter.  No junction., noise level in JFET is very small  Two Junctions,. noise level is high.
  • 17. 17 Application of JFET  Electronic switch.  Oscillator circuit.  Detectors.  High impedance wide band amplifier.  Voltage variable resistor (VVR)  Voltage development resistor (VDR). Most JFETs built onto IC's nowadays involve single-ended geometries that require doping for the gate from only one side of the channel, i.e., the surface of the wafer. This is achieved by building the JFET on an epitaxially grown channel over a doped substrate that acts as the second gate.
  • 18. 18 Depletion Mode MOSFET Construction  The Drain (D) and Source (S) leads connect to the to n-doped regions  These N-doped regions are connected via an n-channel  This n-channel is connected to the Gate (G) via a thin insulating layer of SiO2  The n-doped material lies on a p-doped substrate that may have an additional terminal connection called SS
  • 19. 19 Basic Operation  A D-MOSFET may be biased to operate in two modes:  the Depletion mode or the Enhancement mode
  • 20. 20 p-Channel Depletion Mode MOSFET  The p-channel Depletion mode MOSFET is similar to the n-channel except that the voltage polarities and current directions are reversed
  • 22. 22 Enhancement Mode MOSFET Construction  The Drain (D) and Source (S) connect to the to n-doped regions  These n-doped regions are not connected via an n-channel without an external voltage  The Gate (G) connects to the p-doped substrate via a thin insulating layer of SiO2  The n-doped material lies on a p-doped substrate that may have an additional terminal connection called SS
  • 23. 23 Basic Operation The Enhancement mode MOSFET only operates in the enhancement mode.  VGS is always positive  IDSS = 0 when VGS < VT  As VGS increases above VT, ID increases  If VGS is kept constant and VDS is increased, then ID saturates (IDSS)  The saturation level, VDSsat is reached.
  • 24. 24 Comparison chart JFET D-MOSFET E-MOSFET  The primary difference between the construction of depletion type and enhancement type MOSFET is that, there is no such channel in enhancement type MOSFET as a constructed component of the device.  In Enhancement type MOSFET, the inversion layer is formed when holes are attracted to the interface by a negative gate voltage, thereby forming a channel.
  • 25. 25 Learning Outcomes  The viewer will be able to classify the different types of FET  and its working. Constructive criticisms are welcome for further improvement. You can reach me at: rblohani@gec.ac.in This presentation has been peer-reviewed by Dr. Samarth Borkar.
  • 26. Dedicated to my loving parents Late. Janaki B. Lohani and Mr. Basant B. Lohani (Retd. Principal) 26
  • 27. Thank You for your time.