Improved Parallel Prefix Algorithm on OTIS-Mesh of Trees

ACEEE Int. J. on Information Technology, Vol. 01, No. 03, Dec 2011

Improved Parallel Prefix Algorithm on
OTIS-Mesh of Trees
Ashish Gupta
Department of Computer Science and Engineering
Indian School of Mines, Dhanbad, Jharkhand, 826004, India
Email: ashish.parj@gmail.com

Abstract—A parallel algorithm for prefix computation reported algorithm with (5.5N1/4+3) electronic moves and 2 OTIS moves
recently on interconnection network called OTIS-Mesh Of on the same model. Jana and mallick developed a parallel
Trees[4]. Using n4 processors, algorithm shown to run in 13log prefix algorithm on OTIS mesh of trees[4] which can compute
n + O(1) electronic moves and 2 optical moves for n 4 data the prefix of N numbers in 3.5logN + O(1) electronic steps
points. In this paper we present new and improved parallel
and it takes 2 OTIS moves. In this paper we propose here a
algorithm for prefix on OTIS-Mesh of Trees. The algorithm
requires 10log n + O(1) electronic steps + 1 optical step for
improved parallel prefix algorithm on a OTIS-Mesh of Trees.
prefix computation on the same number of processors and We shown that the algorithm requires 10log n + O (1)
data points as considered in [4]. electronic moves and 1 optical move. The algorithm is shown
to be an improvement over the parallel prefix algorithm on
Index Terms—Prefix computation, parallel algorithm, time OTIS–MOT[4]. The rest of the paper is organized as follows.
complexity. Section III describes the topology of OTIS-Mesh of trees. In
section IV ,we describe the parallel algorithm for prefix in
I. INTRODUCTION each group as described in MOT[4] in subsection A and
proposed parallel algorithm in subsection B.
Optical Transpose Interconnection System (OTIS) [1],[2]
is basically a hybrid architecture which is benefits from optical III. TOPOLOGY
and electronic connections. Optical connection is used to
connect the processors when the distance between the We describe here the topology of OTIS-MOT in three
processors exceeds the few millimetres (in other package) sections. Subsection A describe the topology of Mesh of
and electronic connections are used to connect the close Trees, subsection B describe the OTIS network and
processors (within the same physical package). Several subsection C describe the computational model on which we
models exploit the idea of optical and electronic connections. map the parallel prefix algorithm.
Given N data values x1,x2,...,xN and the associative binary A. Topology of Mesh Of Trees(MOT)
operation o, the prefix problem is to compute P i =
x1ox2ox3,...,oxi,1d”id”N. Depending upon the type of problem, In n×n MOT, n2 processor organized as an n×n lattice. In
the associative binary operation o perform arithmetic or an n×n lattice each processor denotes by p(i,j) where i and
logical operation. Throughout this paper we assume that j respectively are row and column and 1d” i , jd” n. Then the
associative binary operation perform as binary addition interconnectivity among the processors is described as
operation. follows:
i. The processor in the ith row is connected to form binary tree
II. RELATED WORK from processors P(i,1). ie. for j=1 to processor P(i,j) is
Many researchers has developed parallel algorithms for directly connected to the processor P(i,2j) and P(i,2j+1)
computing the prefix on several topologies. An n point whether they exists. We call such binary trees as row trees.
parallel algorithm on two dimensional mesh with 3"N - ii. The processor in the jth column is connected to form binary
1communication steps can be found in [8]. Egecioglu and
Srinivas[15] presented 2"N + 1communication steps and log tree from processors P(1,j). for i=1 to processor P(i,j) is
N + 1 arithmetic steps, optimal algorithm also on mesh directly connected to the processor P(2i , j) and P(2i+1, j)
architecture. A parallel algorithm has been reported in [14] on whether they exists. We call such binary trees as column
an extended Multimesh that requires 13N1/4 communication trees.
steps(electronic) and log N + 4 arithmetic steps. Wang and iii. All links are bi-directional.
sahani[7] developed a parallel algorithm on N-point prefix The topology of MOT shown in figure 1.
computation in (8N1/4-1) electronic and 2 OTIS moves for N
processors on SIMD and MIMD model. Wang and sahani
also modified the parallel algorithm in same paper and
completes prefix computation in (7N1/4-1) electronic moves
and 2 OTIS moves. Jana and sinha[19] developed a improved
Figure 1. 5×5 Mesh Of Trees
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B. OTIS Network IV. PROPOSED PARALLEL PREFIX ALGORITHM
Optical Transpose Interconnection System is basically a In proposed parallel prefix algorithm, first we describe
hybrid architecture which is benefits from optical and parallel prefix algorithm in each group as considered in [4].
electronic connections. In this topology we use usual Then we describe the proposed parallel prefix algorithm on
electronic links for communication between the processors OTIS-Mesh of Trees on n4 data points in section B.
within a group, and optical links for communication between
the processors of other groups. According to the OTIS rule, A. Parallel Prefix in each group
Gth group is connected to the Pth processor and Pth group is Data initialization: n 2 data elements are stored in
connected to the Gth processor. The pattern of OTIS can be respective B(i,j) registers in row major order in each group.
varied according to the interconnection of processors within Register B(i,j) is initialized with the data element x(i-1)n+(j-1),
a group, such as OTIS-MOT, OTIS-Hypercube, OTIS-Mesh 1d”i,jd”n for n =5 as we shown in figure 4.1.
etc. The topology of OTIS shown in figure 2.

Figure 4.1 Data initialization on lattice
step 1: Perform the prefix computation on each row in
parallel and store the result in A(i,j) register as given in [8].
After this step register A(i,j) contains x[(i-1)n:(i-1)n+(j-1)],
where x[p:q] shows the sum xp + xp+1+,...,+xq for pd”q ,however
Figure 2. OTIS Network we can see xp + xp+1+,...,+xq is denoted by xp-q in figure 4.2.
C. Computational Model
In Optical Transpose Interconnection System, processors
between the different groups are connected by optical links.
n4 number of processors are divided in to the n × n lattices
where each lattice has n2 processors. The processor placed
at ith row and jth column within a lattice is denoted by P(i,j,k,l),
where k and l denotes the lattice coordinates. Processors
within a lattice are connected by the electronic links and
Figure 4.2 Data in A(i,j) register
processors placed at different lattices can be connected by
optical links. According to the OTIS rule processor P(i,j,k,l) is step 2:Perform prefix summation in each row tree on the
connected to the P(k,l,i,j). Connectivity including electronic contents of B(i,j) register in each row and store it in B(i,1) of
links and optical links shown in figure 3. the root processor P(i,1). B[i,1] holds x[(i-1)n + (j-1): in-1]
after this step.
step 3: Perform modified prefix on the contents of B(i,1) of
the 1st column tree using similar procedure as given in [8]. In
this modified prefix, the processor P[i,1] computes the sum
x[0:(i-1)n-1] for 2d”id”n and B[i,1] holds 0. The result is shown
in figure 4.3 where “-” indicates the don’t care value.

Figure 4.3 Modified Prefix on first column Tree
step 4: Broadcast the content of B(i,1) on each row as
shown in figure 4.4.
Figure 3. OTIS-Mesh Of Trees
All links are not shown and links are bidirectional
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step 2:After computing local prefix, send the content of
register B(n,n) to register A(n,n) of each group in parallel .
step 3: Broadcast the content from register A(n,n) to register
A(i,j), 1d”i,jd”n through mesh of trees of each group in parallel.
The content of register A(i,j) ,1d”i,jd”n for group 12 shown in
figure 4.7.

Figure 4.4 Data in B(i,j) register after step 4
step 5: Add the contents of A(i,j) and B(i,j) registers
for1d”i,jd”n and store the result in B(i,j) register for1d”i,jd”n
to produce the final prefix. The content of B(i,j) register after
step 5 shown in figure 4.5.
Figure 4.7 Content of register A (i,j) for group 12
Rule 1. According to rule 1, processors in any group can
send the data through valid OTIS links only to the processors
in the successor groups. We assign group number to groups
according to which we can decide which group is predecessor
for any group and which group is successor for any group.
Distributions of group numbers are in row major order 1 d” g
Figure 4.5 Data in B(i,j) register after step 5 d” n2 where g is group number. Group with the large group
Time complexity: The step1 and step3 requires log n steps number will be the successor of group with lower group
each. Step2 and Step4 each require log n steps. Step5 requires number, for e.g. group 2 is successor of group 1. The
no data movement. Therefore the above algorithm requires distribution of group number shown in figure 4.8.
4log n + O(1) steps.
B. Parallel Prefix on OTIS-MOT
Data Initialization. First we store the data elements x0, x1, x2,
x3,..., xn4-1 in register B(i,j) following the row major order within
the block and also in row major order from block to block. i.e
B(i, j, k, l) is initialized with x(i-1)n3+ (j-1)n2+ (k-1)n + (l-1) for n = 3.
Register C(i,j) is initialized with the value 0.
step 1: Compute the local prefix of each group stored in the
register B(i,j) in parallel by applying the algorithm described
in subsection A of section IV and store the result in register
B(i,j,k,l) holds x[(i-1)n3 + (j-1)n2 : (i-1)n3+(j-1)n2+(k-1)n+(l-1)]
which is shown in figure 4.6.

Figure 4.6 Data in B(i,j) register in each group
step 2:After computing local prefix, send the content of
register B(n,n) to register A(n,n) of each group in parallel .
step 3: Broadcast the content from register A(n,n) to register
A(i,j), 1d”i,jd”n through mesh of trees of each group in parallel.
The content of register A(i,j) ,1d”i,jd”n for group 12 shown in
figure 4.7.

Figure 4.6 Data in B(i,j) register in each group Figure 4.7 Content of register A (i,j) for group 12
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Rule 1. According to rule 1, processors in any group can step 5: Perform prefix computation on each row on C(i,j)
send the data through valid OTIS links only to the processors register of each group in parallel as given in [8] and store the
in the successor groups. We assign group number to groups result in C(i,j) register for
according to which we can decide which group is predecessor step 6.After step 5 perform prefix computation on C(i,j) register
for any group and which group is successor for any group. of last column of each group in parallel as given in [8]. The
Distributions of group numbers are in row major order content of C(i,j) registers of each group after step 6 is shown
where g is group number. Group with the large in figure 4.10.
group number will be the successor of group with lower group
number, for e.g. group 2 is successor of group 1. The
distribution of group number shown in figure 4.8.

Figure 4.10 Content of C(i,j) register after step 6
step7: Broadcast the content from C(n,n) register to C(i,j)
register for of each group in parallel. The content
Figure 4.8 Distribution of group numbers of C(i,j) register of group 2 shown in fig 4.11 after step 7.
step 4: After step 3 processors in each group sends the
content from A(i,j) register, to C(i,j) register of processors of
only successor groups, in parallel through OTIS links as
considered in rule 1.The OTIS move from A(i,j) to C(i,j) register
shown in figure 4.9.

Figure 4.11 content of register C(i,j) for group 2
step 8: Finally add the content of C(i,j) and B(i,j) registers for
of each group in parallel and store the result in
B(i,j) register for The final result of prefix
computation is shown in figure 4.12.

Figure 4.9 OTIS move from A(i,j) to C(i,j).
All moves are not shown and links are bidirectional
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CONCLUSIONS
In this paper we have presented a new parallel prefix
algorithm on OTIS-Mesh of Trees on a set of n4 data points.
The algorithm perform parallel prefix on OTIS-Mesh of trees
in 10log n + O(1) electronic moves + 1 Optical move. This can
be compared to earlier parallel prefix algorithm on OTIS-Mesh
of Trees[4] on n4 data points which requires 13log n + O(1)
electronic moves + 2 optical move on same number of
processors.

FUTURE WORKS
In future works we should try to map the parallel prefix
algorithm on other interconnection networks so that we can
perform parallel prefix computation in reduced time
complexity. We can also propose a new interconnection
network for mapping the parallel prefix algorithm.

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Improved Parallel Prefix Algorithm on OTIS-Mesh of Trees

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