February 2014 column slideshare

Consider Low-Loss
Laminates for High-Speed
Digital PCB Designs
BY AMIT BAHL

The Leader in QuickTurn HDI PCBs

www.protoexpress.com

• The smallest transistor geometries are onethousandth the size possible 40 years ago
• That scaling, along with innovations in
semiconductor materials and architecture, has
resulted not only in the integration of whole systems
on chips, but device speeds that now challenge the
limits of carrying digital signals over copper traces
on FR- 4 for distances as long as a desktop
computer motherboard

© 2011 Sierra Circuits, Inc. All Rights Reserved. | www.protoexpress.com

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• Progress in electronics may now depend less on
semiconductor advances than it does on a transition
to PCB laminates that have better dielectric
properties than FR-4


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• Consider the latest USB chip sets, for example
• A consortium of semiconductor, PC, and software
companies drafted the original Universal Serial Bus
standard in the 1990s to provide a common interface for
connecting all sorts of peripherals to personal
computers, one that could support the disk-drive data
rates at the time and also supply power to external
equipment
• That standard specified two communication modes: a
“full-speed” mode with a 12-Mb/s maximum signaling rate
and a low-speed mode for such devices as a keyboard or
joystick


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• The USB topology consists of a central host residing
in a PC, and multiple ports downstream of that host
controller, which can connect with peripherals that
may in turn serve as hubs for communication with
other equipment
• The original standard was amended within a few
years by USB 2.0, which increased the maximum
signaling rate by 40 times to 480 Mb/s
• That version was succeeded in 2008 by USB 3.0,
which upped the maximum rate to 5 Gb/s

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• USB 3.0 is backward-compatible with the preceding
standard, but includes a new high-speed bus in
parallel with the USB 2.0 bus
• In 2013, the standard was again upgraded, adding an
even faster transfer mode whose ceiling is 10 Gb/s
• The first chip sets to support that latest version of
the standard, USB 3.1, will be introduced in 2014


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• A peripheral that would communicate in the fastest
mode can be connected to the host by a cable up to
a meter long
• The total allowable loss in the channel end-to-end
through the external device to the host controller is
-20 dB at the maximum signaling rate, according to
the model by the USB organization
• The channel model includes loss from the cable,
loss from the connectors, loss in the device PCB,
and at most a -7-dB loss across the host PCB, based
on a 10-inch maximum trace length there


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• Active repeaters would be required if loss exceeds
that -7-dB budget on the host PCB
• The rescue to compensate for signal degradation
through the channel is signal equalization on the
transmit and receive sides


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• Microchip, one of the companies that manufactures
chip sets to implement USB 3.0 (5-Gb/s maximum
signaling rate), points out in their implementation
guidelines:
“Signal losses for copper traces running on FR-4
materials can be very significant at USB 3.0
SuperSpeed (SS) signaling rates. Ways to
mitigate losses include:
1. Keep SS traces as short as practical. This is
the single most practical and cost-effective
thing that can be done to reduce signal loss


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•

2. Route SS traces on outer layers, rather than on
inner layers
3. Consider laminates with lower Df and Dk ratings.
These lower-loss materials include FR408HR,
FR408HRIS, N4000-13SI, Rogers.
4. Try to route SS signals at a 45-degree angle to the
material weave direction so that the trace does not
occasionally line up with a high-resin, high-loss path.
5. Consider low-loss materials, like N4000-13SI or
Rogers”


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• Note they twice emphasize switching from FR-4 to
low-loss materials, and this is in an application note
for devices to implement 5-Gb/s communication, not
the upcoming chips to enable double that data rate


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• Jim Choate, the USB technology product manager at
Agilent Technologies, presented a webinar about
compliance testing for USB 3.1 devices
• Choate started his career working on computer
motherboard design and validation at Intel during
the 1990s and later served as the USB Implementers’
Forum (USB-IF) compliance committee chairman
• He contends there is enough margin to push USB
signal rates beyond 10 Gb/s without abandoning FR4 for PC motherboards, but concedes repeaters
would be necessary and very likely much different
architectural approaches for USB chip sets


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• From his experience at Intel, Choate believes that
using a material other than FR-4 for a PC
motherboard would be a deal-breaker
• However, who would wager that each future
generation of semiconductor devices, whatever their
function, won’t be faster than their predecessors?
• Eventually, the expense of developing tricks to skirt
the limitations of conventional PCB materials won’t
be cost-effective, and the premium for a material
with far less loss will be well worth the price
• We are quickly approaching that threshold


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• There’s nothing intrinsically expensive about the
constituents and manufacture of many highperformance materials, except for the special SiO2
glass in some products

• Naturally, while the demand for such materials is
low, their price will remain somewhat higher than
that of materials in high demand
• Would 30 percent lower loss at 10 GHz be worth it to
you?


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15

Gerber Options


16

Assign Layers


17

Drill Table


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February 2014 column slideshare

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February 2014 column slideshare