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William Stallings  Computer Organization  and Architecture 7th Edition Chapter 4 Cache Memory
Characteristics Location Capacity Unit of transfer Access method Performance Physical type
Location CPU Internal External
Unit of Transfer Internal Usually governed by data bus width External Usually a block which is much larger than a word
Access Methods (1) Sequential Start at the beginning and read through in order Access time depends on location of data and previous location e.g. tape Direct Individual blocks have unique address Access is by jumping to vicinity plus sequential search Access time depends on location and previous location e.g. disk
Access Methods (2) Random Individual addresses identify locations exactly e.g. RAM
Memory Hierarchy Registers In CPU Internal or Main memory May include one or more levels of cache “ RAM” External memory - Off line storage
Memory Hierarchy - Diagram
Performance Access time Time between presenting the address and getting the valid data Memory Cycle time Time may be required for the memory to “recover” before next access Transfer Rate Rate at which data can be moved Tn =Ta + N/R Tn = Average time read or write N bits Ta = Average access time N = Number of bits R = Transfer rate, in bits per second (bps )
Physical Types Semiconductor RAM Magnetic Disk & Tape Optical CD & DVD
Semiconductor Memory RAM  Misnamed as all semiconductor memory is random access Read/Write Volatile Temporary storage Static or dynamic
Memory Cell Operation
Dynamic RAM Structure
Dynamic RAM Bits stored as charge in capacitors Charges leak Need refreshing even when powered Simpler construction Smaller per bit Less expensive Need refresh circuits Slower Main memory Essentially analogue Level of charge determines value
DRAM Operation Address line active when bit read or written Transistor switch closed (current flows) Write Voltage to bit line High for 1 low for 0 Then signal address line Transfers charge to capacitor Read Address line selected transistor turns on Charge from capacitor fed via bit line to sense amplifier Compares with reference value to determine 0 or 1 Capacitor charge must be restored
Static RAM Bits stored as on/off switches No charges to leak No refreshing needed when powered More complex construction Larger per bit More expensive Does not need refresh circuits Faster Cache Digital Uses flip-flops
Stating RAM Structure
Static RAM Operation Transistor arrangement gives stable logic state State 1 C 1  high, C 2  low T 1  T 4  off, T 2  T 3  on State 0 C 2  high, C 1  low T 2  T 3  off, T 1  T 4  on Address line transistors T 5  T 6  is switch Write – apply value to B & compliment to B Read – value is on line B
SRAM v DRAM Both volatile Power needed to preserve data Dynamic cell  Simpler to build, smaller Less expensive Needs refresh Larger memory units Static Faster Cache
Read Only Memory (ROM) Permanent storage Nonvolatile Microprogramming (see later) Library subroutines Systems programs (BIOS) Function tables
Types of ROM Written during manufacture Very expensive for small runs Programmable (once) PROM Needs special equipment to program Read “mostly” Erasable Programmable (EPROM) Erased by UV Electrically Erasable (EEPROM) Takes much longer to write than read Flash memory Erase whole memory electrically

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04 cache memory...

  • 1. William Stallings Computer Organization and Architecture 7th Edition Chapter 4 Cache Memory
  • 2. Characteristics Location Capacity Unit of transfer Access method Performance Physical type
  • 4. Unit of Transfer Internal Usually governed by data bus width External Usually a block which is much larger than a word
  • 5. Access Methods (1) Sequential Start at the beginning and read through in order Access time depends on location of data and previous location e.g. tape Direct Individual blocks have unique address Access is by jumping to vicinity plus sequential search Access time depends on location and previous location e.g. disk
  • 6. Access Methods (2) Random Individual addresses identify locations exactly e.g. RAM
  • 7. Memory Hierarchy Registers In CPU Internal or Main memory May include one or more levels of cache “ RAM” External memory - Off line storage
  • 9. Performance Access time Time between presenting the address and getting the valid data Memory Cycle time Time may be required for the memory to “recover” before next access Transfer Rate Rate at which data can be moved Tn =Ta + N/R Tn = Average time read or write N bits Ta = Average access time N = Number of bits R = Transfer rate, in bits per second (bps )
  • 10. Physical Types Semiconductor RAM Magnetic Disk & Tape Optical CD & DVD
  • 11. Semiconductor Memory RAM Misnamed as all semiconductor memory is random access Read/Write Volatile Temporary storage Static or dynamic
  • 14. Dynamic RAM Bits stored as charge in capacitors Charges leak Need refreshing even when powered Simpler construction Smaller per bit Less expensive Need refresh circuits Slower Main memory Essentially analogue Level of charge determines value
  • 15. DRAM Operation Address line active when bit read or written Transistor switch closed (current flows) Write Voltage to bit line High for 1 low for 0 Then signal address line Transfers charge to capacitor Read Address line selected transistor turns on Charge from capacitor fed via bit line to sense amplifier Compares with reference value to determine 0 or 1 Capacitor charge must be restored
  • 16. Static RAM Bits stored as on/off switches No charges to leak No refreshing needed when powered More complex construction Larger per bit More expensive Does not need refresh circuits Faster Cache Digital Uses flip-flops
  • 18. Static RAM Operation Transistor arrangement gives stable logic state State 1 C 1 high, C 2 low T 1 T 4 off, T 2 T 3 on State 0 C 2 high, C 1 low T 2 T 3 off, T 1 T 4 on Address line transistors T 5 T 6 is switch Write – apply value to B & compliment to B Read – value is on line B
  • 19. SRAM v DRAM Both volatile Power needed to preserve data Dynamic cell Simpler to build, smaller Less expensive Needs refresh Larger memory units Static Faster Cache
  • 20. Read Only Memory (ROM) Permanent storage Nonvolatile Microprogramming (see later) Library subroutines Systems programs (BIOS) Function tables
  • 21. Types of ROM Written during manufacture Very expensive for small runs Programmable (once) PROM Needs special equipment to program Read “mostly” Erasable Programmable (EPROM) Erased by UV Electrically Erasable (EEPROM) Takes much longer to write than read Flash memory Erase whole memory electrically