A voltage (1)

A Voltage Controlled Adjustable Speed PMBLDCM
Drive using A Single-Stage PFC Half-Bridge Converter
Sanjeev Singh, Student Member, IEEE
e-mail: sschauhan.sdl@gmail.com
Bhim Singh, Senior Member, IEEE
e-mail: bhimsinghr@gmail.com
Electrical Engineering Department, Indian Institute of Technology Delhi, New Delhi -110016, India
Abstract— In this paper, a buck half-bridge DC-DC converter is
used as a single-stage power factor correction (PFC) converter
for feeding a voltage source inverter (VSI) based permanent
magnet brushless DC motor (PMBLDCM) drive. The front end
of this PFC converter is a diode bridge rectifier (DBR) fed from
single-phase AC mains. The PMBLDCM is used to drive a
compressor load of an air conditioner through a three-phase
VSI fed from a controlled DC link voltage. The speed of the
compressor is controlled to achieve energy conservation using a
concept of the voltage control at DC link proportional to the
desired speed of the PMBLDCM. Therefore the VSI is operated
only as an electronic commutator of the PMBLDCM. The stator
current of the PMBLDCM during step change of reference
speed is controlled by a rate limiter for the reference voltage at
DC link. The proposed PMBLDCM drive with voltage control
based PFC converter is designed, modeled and its performance
is simulated in Matlab-Simulink environment for an air
conditioner compressor driven through a 1.5 kW, 1500 rpm
PMBLDC motor. The evaluation results of the proposed speed
control scheme are presented to demonstrate an improved
efficiency of the proposed drive system with PFC feature in wide
range of the speed and an input AC voltage.
Index Terms— PFC, PMBLDCM, Air conditioner, Buck Half-
bridge converter, Voltage control, VSI.
I. INTRODUCTION
ERMANENT magnet brushless DC motors
(PMBLDCMs) are preferred motors for a compressor of
an air-conditioning (Air-Con) system due to its features
like high efficiency, wide speed range and low maintenance
requirements [1-4]. The operation of the compressor with the
speed control results in an improved efficiency of the system
while maintaining the temperature in the air-conditioned zone
at the set reference consistently. Whereas, the existing air
conditioners mostly have a single-phase induction motor to
drive the compressor in ‘on/off’ control mode. This results in
increased losses due to frequent ‘on/off’ operation with
increased mechanical and electrical stresses on the motor,
thereby poor efficiency and reduced life of the motor.
Moreover, the temperature of the air conditioned zone is
regulated in a hysteresis band. Therefore, improved efficiency
of the Air-Con system will certainly reduce the cost of living
and energy demand to cope-up with ever-increasing power
crisis.
A PMBLDCM which is a kind of three-phase synchronous
motor with permanent magnets (PMs) on the rotor and
trapezoidal back EMF waveform, operates on electronic
commutation accomplished by solid state switches. It is
powered through a three-phase voltage source inverter (VSI)
which is fed from single-phase AC supply using a diode
bridge rectifier (DBR) followed by smoothening DC link
capacitor. The compressor exerts constant torque (i.e. rated
torque) on the PMBLDCM and is operated in speed control
mode to improve the efficiency of the Air-Con system.
Since, the back-emf of the PMBLDCM is proportional to
the motor speed and the developed torque is proportional to its
phase current [1-4], therefore, a constant torque is maintained
by a constant current in the stator winding of the PMBLDCM
whereas the speed can be controlled by varying the terminal
voltage of the motor. Based on this logic, a speed control
scheme is proposed in this paper which uses a reference
voltage at DC link proportional to the desired speed of the
PMBLDC motor. However, the control of VSI is only for
electronic commutation which is based on the rotor position
signals of the PMBLDC motor.
The PMBLDCM drive, fed from a single-phase AC mains
through a diode bridge rectifier (DBR) followed by a DC link
capacitor, suffers from power quality (PQ) disturbances such
as poor power factor (PF), increased total harmonic distortion
(THD) of current at input AC mains and its high crest factor
(CF). It is mainly due to uncontrolled charging of the DC link
capacitor which results in a pulsed current waveform having a
peak value higher than the amplitude of the fundamental input
current at AC mains. Moreover, the PQ standards for low
power equipments such as IEC 61000-3-2 [5], emphasize on
low harmonic contents and near unity power factor current to
be drawn from AC mains by these motors. Therefore, use of a
power factor correction (PFC) topology amongst various
available topologies [6-14] is almost inevitable for a
PMBLDCM drive.
Most of the existing systems use a boost converter for PFC
as the front-end converter and an isolated DC-DC converter to
produce desired output voltage constituting a two-stage PFC
P
978-1-4244-4783-1/10/$25.00 ©2010 IEEE 1976

drive [7-8]. The DC-DC converter used in the second stage is
usually a flyback or forward converter for low power
applications and a full-bridge converter for higher power
applications. However, these two stage PFC converters have
high cost and complexity in implementing two separate
switch-mode converters, therefore a single stage converter
combining the PFC and voltage regulation at DC link is more
in demand. The single-stage PFC converters operate with only
one controller to regulate the DC link voltage along with the
power factor correction. The absence of a second controller
has a greater impact on the performance of single-stage PFC
converters and requires a design to operate over a much wider
range of operating conditions.
For the proposed voltage controlled drive, a half-bridge
buck DC-DC converter is selected because of its high power
handling capacity as compared to the single switch converters.
Moreover, it has switching losses comparable to the single
switch converters as only one switch is in operation at any
instant of time. It can be operated as a single-stage power
factor corrected (PFC) converter when connected between the
VSI and the DBR fed from single-phase AC mains, besides
controlling the voltage at DC link for the desired speed of the
Air-Con compressor. A detailed modeling, design and
performance evaluation of the proposed drive are presented
for an air conditioner compressor driven by a PMBLDC motor
of 1.5 kW, 1500 rpm rating.
II. PROPOSED SPEED CONTROL SCHEME OF PMBLDC
MOTOR FOR AIR CONDITIONER
The proposed speed control scheme (as shown in Fig. 1)
controls reference voltage at DC link as an equivalent
reference speed, thereby replaces the conventional control of
the motor speed and a stator current involving various sensors
for voltage and current signals. Moreover, the rotor position
signals are used to generate the switching sequence for the
VSI as an electronic commutator of the PMBLDC motor.
Therefore, rotor-position information is required only at the
commutation points, e.g., every 60°electrical in the three-
phase [1-4]. The rotor position of PMBLDCM is sensed using
Hall effect position sensors and used to generate switching
sequence for the VSI as shown in Table-I.
The DC link voltage is controlled by a half-bridge buck
DC-DC converter based on the duty ratio (D) of the converter.
For a fast and effective control with reduced size of magnetics
and filters, a high switching frequency is used; however, the
switching frequency (fs) is limited by the switching device
used, operating power level and switching losses of the
device. Metal oxide field effect transistors (MOSFETs) are
used as the switching device for high switching frequency in
the proposed PFC converter. However, insulated gate bipolar
transistors (IGBTs) are used in VSI bridge feeding
PMBLDCM, to reduce the switching stress, as it operates at
lower frequency compared to PFC switches.
The PFC control scheme uses a current control loop inside
the speed control loop with current multiplier approach which
operates in continuous conduction mode (CCM) with average
current control. The control loop begins with the comparison
of sensed DC link voltage with a voltage equivalent to the
reference speed. The resultant voltage error is passed through
a proportional-integral (PI) controller to give the modulating
current signal. This signal is multiplied with a unit template of
input AC voltage and compared with DC current sensed after
the DBR. The resultant current error is amplified and
compared with saw-tooth carrier wave of fixed frequency (fs)
in unipolar scheme (as shown in Fig.2) to generate the PWM
pulses for the half-bridge converter. For the current control of
the PMBLDCM during step change of the reference voltage
due to the change in the reference speed, a voltage gradient
less than 800 V/s is introduced for the change of DC link
voltage, which ensures the stator current of the PMBLDCM
within the specified limits (i.e. double the rated current).
Figure 1. Control schematic of Proposed Bridge-buck PFC converter fed
PMBLDCM drive
III. DESIGN OF PFC BUCK HALF-BRIDGE CONVERTER
BASED PMBLDCM DRIVE
The proposed PFC buck half-bridge converter is designed
for a PMBLDCM drive with main considerations on PQ
constraints at AC mains and allowable ripple in DC link
voltage. The DC link voltage of the PFC converter is given as,
Vdc = 2 (N2/N1) Vin D and N2= N21=N22 (1)
where N1, N21, N22 are number of turns in primary, secondary
upper and lower windings of the high frequency (HF) isolation
transformer, respectively.
Figure 2. PWM control of the buck half-bridge converter
Vin is the average output of the DBR for a given AC input
voltage (Vs) related as,
md(t)kdcΔidc
-kdcΔidc
SA
SB
0
1977

Vin = 2√2Vs/π (2)
A ripple filter is designed to reduce the ripples introduced
in the output voltage due to high switching frequency for
constant of the buck half-bridge converter. The inductance
(Lo) of the ripple filter restricts the inductor peak to peak
ripple current (ΔILo) within specified value for the given
switching frequency (fs), whereas, the capacitance (Cd) is
calculated for a specified ripple in the output voltage (ΔVCd)
[7-8]. The output filter inductor and capacitor are given as,
Lo= (0.5-D)Vdc/{fs(ΔILo) } (3)
Cd=Io/(2ωΔVCd) (4)
The PFC converter is designed for a base DC link voltage
of Vdc = 400 V at Vin = 198 V from Vs = 220 Vrms. The turns
ratio of the high frequency transformer (N2/N1) is taken as 6:1
to maintain the desired DC link voltage at low input AC
voltages typically at 170V. Other design data are fs = 40 kHz,
Io = 4 A, ΔVCd= 4 V (1% of Vdc), ΔILo= 0.8 A (20% of Io). The
design parameters are calculated as Lo=2.0 mH, Cd=1600 µF.
TABLE I. VSI SWITCHING SEQUENCE BASED ON THE HALL EFFECT
SENSOR SIGNALS
IV. MODELING OF THE PROPOSED PMBLDCM DRIVE
The main components of the proposed PMBLDCM drive
are the PFC converter and PMBLDCM drive, which are
modeled by mathematical equations and the complete drive is
represented as a combination of these models.
A. PFC Converter
The modeling of the PFC converter consists of the
modeling of a speed controller, a reference current generator
and a PWM controller as given below.
1) Speed Controller: The speed controller, the prime
component of this control scheme, is a proportional-integral
(PI) controller which closely tracks the reference speed as an
equivalent reference voltage. If at kth
instant of time, V*
dc(k)
is reference DC link voltage, Vdc(k) is sensed DC link voltage
then the voltage error Ve(k) is calculated as,
Ve(k) =V*dc(k)-Vdc(k) (5)
The PI controller gives desired control signal after
processing this voltage error. The output of the controller Ic(k)
at kth
instant is given as,
Ic (k) = Ic (k-1) + Kp{Ve(k) – Ve(k-1)} + KiVe(k) (6)
where Kp and Ki are the proportional and integral gains of the
PI controller.
2) Reference Current Generator: The reference input
current of the PFC converter is denoted by idc* and given as,
i*
dc = Ic (k) uVs (7)
where uVs is the unit template of the voltage at input AC
mains, calculated as,
uVs = vd/Vsm; vd = |vs|; vs= Vsm sin ωt (8)
where Vsm is the amplitude of the voltage and ω is frequency
in rad/sec at AC mains.
3) PWM Controller:The reference input current of the
buck half-bridge converter (idc*) is compared with its sensed
current (idc) to generate the current error Δidc=(idc* - idc). This
current error is amplified by gain kdc and compared with fixed
frequency (fs) saw-tooth carrier waveform md(t) (as shown in
Fig.2) in unipolar switching mode [7] to get the switching
signals for the MOSFETs of the PFC buck half-bridge
converter as,
If kdc Δidc > md (t) then SA = 1 else SA = 0 (9)
If -kdc Δidc > md (t) then SB = 1 else SB = 0 (10)
where SA, SB are upper and lower switches of the half-bridge
converter as shown in Fig. 1 and their values ‘1’ and ‘0’
represent ‘on’ and ‘off’ position of the respective MOSFET of
the PFC converter.
B. PMBLDCM Drive
The PMBLDCM drive consists of an electronic
commutator, a VSI and a PMBLDC motor.
1) Electronic Commutator: The electronic commutator
uses signals from Hall effect position sensors to generate the
switching sequence for the voltage source inverter based on
the logic given in Table I.
2) Voltage Source Inverter: Fig. 3 shows an equivalent
circuit of a VSI fed PMBLDCM. The output of VSI to be fed
to phase ‘a’ of the PMBLDC motor is given as,
vao = (Vdc/2) for S1 = 1 (11)
vao = (-Vdc/2) for S2 = 1 (12)
vao = 0 for S1 = 0, and S2 = 0 (13)
van = vao – vno (14)
where vao, vbo, vco, and vno are voltages of the three-phases and
neutral point (n) with respect to virtual mid-point of the DC
link voltage shown as ‘o’ in Fig. 3. The voltages van, vbn, vcn
are voltages of three-phases with respect to neutral point (n)
and Vdc is the DC link voltage. S= 1 and 0 represent ‘on’ and
‘off’ position of respective IGBTs of the VSI and considered
in a similar way for other IGBTs of the VSI i.e. S3-S6.
Using similar logic vbo, vco, vbn, vcn are generated for other
two phases of the VSI feeding PMBLDC motor.
3) PMBLDC Motor:The PMBLDCM is represented in the
form of a set of differential equations [3] given as,
van = Ria + pλa +ean (15)
vbn = Rib + pλb +ebn (16)
vcn = Ric + pλc +ecn (17)
where p is a differential operator (d/dt), ia, ib, ic are three-phase
Ha Hb Hc Ea Eb Ec S1 S2 S3 S4 S5 S6
0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 -1 +1 0 0 0 1 1 0
0 1 0 -1 +1 0 0 1 1 0 0 0
0 1 1 -1 0 +1 0 1 0 0 1 0
1 0 0 +1 0 -1 1 0 0 0 0 1
1 0 1 +1 -1 0 1 0 0 1 0 0
1 1 0 0 +1 -1 0 0 1 0 0 1
1 1 1 0 0 0 0 0 0 0 0 0
1978

currents, λa, λb, λc are flux linkages and ean, ebn, ecn are phase to
neutral back emfs of PMBLDCM, in respective phases, R is
resistance of motor windings/phase.
Figure 3. Equivalent Circuit of a VSI fed PMBLDCM Drive
The flux linkages are represented as,
λa = Lia - M (ib + ic) (18)
λb = Lib - M (ia + ic) (19)
λc = Lic - M (ib + ia) (20)
where L is self-inductance/phase, M is mutual inductance of
motor winding/phase. Since the PMBLDCM has no neutral
connection, therefore,
ia + ib + ic = 0 (21)
From Eqs. (14-21) the voltage between neutral terminal (n)
and mid-point of the DC link (o) is given as,
vno = {vao +vbo + vco – (ean +ebn +ecn)}/3 (22)
From Eqs. (18-21), the flux linkages are given as,
λa = (L+M) ia, λb = (L+M) ib, λc = (L+M) ic, (23)
From Eqs. (15-17 and 23), the current derivatives in
generalized state space form is given as,
pix = (vxn - ix R – exn)/(L+M) (24)
where x represents phase a, b or c.
The developed electromagnetic torque Te in the
PMBLDCM is given as,
Te = (ean ia + ebn ib +ecn ic)/ ω (25)
where ω is motor speed in rad/sec,
The back emfs may be expressed as a function of rotor
position (θ) as,
exn= Kb fx(θ) ω (26)
where x can be phase a, b or c and accordingly fx(θ) represents
function of rotor position with a maximum value ±1, identical
to trapezoidal induced emf given as,
fa(θ) = 1 for 0 < θ < 2π/3 (27)
fa(θ) = {(6/ π)( π- θ)}-1 for 2π/3 < θ < π (28)
fa(θ) = -1 for π < θ < 5π/3 (29)
fa(θ) = {(6/π)(θ -2π)}+1 for 5π/3 < θ < 2π (30)
The functions fb(θ) and fc(θ) are similar to fa(θ) with a
phase difference of 120º and 240º respectively.
Therefore, the electromagnetic torque is expressed as,
Te = Kb{fa(θ) ia + fb(θ) ib+ fc(θ) ic} (31)
The mechanical equation of motion in speed derivative
form is given as,
pω = (P/2) (Te-TL-Bω)/(J) (32)
The derivative of the rotor position angle is given as,
pθ = ω (33)
where P is no. poles, TL is load torque in Nm, J is moment of
inertia in kg-m2
and B is friction coefficient in Nms/Rad.
These equations (15-33) represent the dynamic model of
the PMBLDC motor.
V. PERFORMANCE EVALUATION OF PROPOSED PFC DRIVE
The proposed PMBLDCM drive is modeled in Matlab-
Simulink environment and evaluated for an air conditioning
compressor load. The compressor load is considered as a
constant torque load equal to rated torque with the speed
control required by air conditioning system. A 1.5 kW rating
PMBLDCM is used to drive the air conditioner compressor,
speed of which is controlled effectively by controlling the DC
link voltage. The detailed data of the motor and simulation
parameters are given in Appendix. The performance of the
proposed PFC drive is evaluated on the basis of various
parameters such as total harmonic distortion (THDi) and the
crest factor (CF) of the current at input AC mains,
displacement power factor (DPF), power factor (PF) and
efficiency of the drive system (ηdrive) at different speeds of the
motor. Moreover, these parameters are also evaluated for
variable input AC voltage at DC link voltage of 416 V which
is equivalent to the rated speed (1500 rpm) of the
PMBLDCM. The results are shown in Figs. 4-9 and Tables II-
III to demonstrate the effectiveness of the proposed
PMBLDCM drive in a wide range of speed and input AC
voltage.
A. Performance during Starting
The performance of the proposed PMBLDCM drive fed
from 220 V AC mains during starting at rated torque and 900
rpm speed is shown in Fig. 4a. A rate limiter of 800 V/s is
introduced in the reference voltage to limit the starting current
of the motor as well as the charging current of the DC link
capacitor. The PI controller closely tracks the reference speed
so that the motor attains reference speed smoothly within 0.35
sec while keeping the stator current within the desired limits
i.e. double the rated value. The current (is) waveform at input
AC mains is in phase with the supply voltage (vs)
demonstrating nearly unity power factor during the starting.
B. Performance under Speed Control
Figs. 4-6 show the performance of the proposed
PMBLDCM drive under the speed control at constant rated
torque (9.55 Nm) and 220 V AC mains supply voltage. These
results are categorized as performance during transient and
steady state conditions.
1) Transient Condition: Figs. 4b-c show the performance
of the drive during the speed control of the compressor. The
1979

Figure 4. Performance of the Proposed PMBLDCM drive under speed variation at 220 VAC input.
Fig. 4a: Starting performance of the PMBLDCM drive at 900 rpm.
Fig. 4b: PMBLDCM drive under speed variation from 900 rpm to 1500 rpm.
Fig. 4c: PMBLDCM drive under speed variation from 900 rpm to 300 rpm.
1980

Figure 5. Performance of the PMBLDCM drive under steady state condition at 220 VAC input.
Fig. 5a: Performance of the PMBLDCM drive at 300 rpm.
Fig. 5b: Performance of the PMBLDCM drive at 900 rpm.
Fig. 5c: Performance of the PMBLDCM drive at rated speed (1500 rpm).
1981

reference speed is changed from 900 rpm to 1500 rpm for the
rated load performance of the compressor; from 900 rpm to
300 rpm for performance of the compressor at light load. It is
observed that the speed control is fast and smooth in either
direction i.e. acceleration or retardation with power factor
maintained at nearly unity value. Moreover, the stator current
of PMBLDCM is within the allowed limit (twice the rated
current) due to the introduction of a rate limiter in the
reference voltage.
2) Steady State Condition:The speed control of the
PMBLDCM driven compressor under steady state condition
is carried out for different speeds and the results are shown in
Figs. 5-6 and Table-II to demonstrate the effectiveness of the
proposed drive in wide speed range. Figs.5a-c show voltage
(vs) and current (is) waveforms at AC mains, DC link voltage
(Vdc), speed of the motor (N), developed electromagnetic
torque of the motor (Te), the stator current of the PMBLDC
motor for phase ‘a’ (Ia), and shaft power output (Po) at 300
rpm, 900 rpm and 1500 rpm speeds. Fig. 6a shows linear
relation between motor speed and DC link voltage. Since the
reference speed is decided by the reference voltage at DC
link, it is observed that the control of the reference DC link
voltage controls the speed of the motor instantaneously. Fig.
6b shows the improved efficiency of the drive system (ηdrive)
in wide range of the motor speed.
C. Power Quality Performance
The performance of the proposed PMBLDCM drive in
terms of various PQ parameters such as THDi, CF, DPF, PF is
summarized in Table-II and shown in Figs. 7-8. Nearly unity
power factor (PF) and reduced THD of AC mains current are
observed in wide speed range of the PMBLDCM as shown in
Figs. 7a-b. The THD of AC mains current remains less than
5% along with nearly unity PF in wide range of speed as well
as load as shown in Table-II and Figs. 8a-c.
Fig. 6a. DC link voltage with speed Fig. 6b. Efficiency with load
Figure 6. Performance of the proposed PFC drive under speed control at
rated torque and 220 VAC
Fig. 7a. THD of current at AC mains Fig. 7b. DPF and PF
Figure 7. PQ parameters of PMBLDCM drive under speed control at rated
torque and 220 VAC input
Fig. 8a. At 300 rpm Fig. 8b. At 900 rpm Fig. 8c. At 1500 rpm
Figure 8. Current waveform at AC mains and its harmonic spectra of the
PMBLDCM drive under steady state condition at rated torque and 220 VAC
TABLE II. PERFORMANCE OF DRIVE UNDER SPEED CONTROL AT 220 V
AC INPUT
Speed
(rpm)
VDC
(V)
THDi
(%)
DPF PF ηdrive
(%)
Load
(%)
300 100 4.84 0.9999 0.9987 74.2 20.0
400 126 3.94 0.9999 0.9991 79.1 26.7
500 153 3.33 0.9999 0.9993 81.8 33.3
600 179 2.92 0.9999 0.9995 83.8 40.0
700 205 2.63 0.9999 0.9996 85.3 46.6
800 232 2.40 0.9999 0.9996 86.1 53.3
900 258 2.24 0.9999 0.9996 87.0 60.0
1000 284 2.16 0.9999 0.9997 87.6 66.6
1100 310 2.09 0.9999 0.9997 88.1 73.3
1200 337 2.03 0.9999 0.9997 88.1 80.0
1300 363 2.05 0.9999 0.9997 88.2 86.6
1400 390 2.07 0.9999 0.9997 88.1 93.3
1500 416 2.09 0.9999 0.9997 88.1 100.0
D. Performance under Variable Input AC Voltage
Performance evaluation of the proposed PMBLDCM drive
is carried out under varying input AC voltage at rated load (i.e.
rated torque and rated speed) to demonstrate the operation of
proposed PMBLDCM drive for air conditioning system in
various practical situations as summarized in Table-III.
Figs. 9a-b show variation of input current and its THD at
AC mains, DPF and PF with AC input voltage. The THD of
current at AC mains is within specified limits of international
norms [5] along with nearly unity power factor in wide range
of AC input voltage.
Fig. 9a. Current at AC mains and its THD Fig. 9b. DPF and PF
Figure 9. PQ parameters with input AC voltage at 416 VDC (1500 rpm)
1982

TABLE III. VARIATION OF PQ PARAMETERS WITH INPUT AC VOLTAGE
(VS) AT 1500 RPM (416 VDC)
VAC
(V)
THDi
(%)
DPF PF CF Is (A) ηdrive
(%)
170 2.88 0.9999 0.9995 1.41 10.4 84.9
180 2.59 0.9999 0.9996 1.41 9.7 85.8
190 2.40 0.9999 0.9996 1.41 9.2 86.3
200 2.26 0.9999 0.9996 1.41 8.6 87.2
210 2.14 0.9999 0.9997 1.41 8.2 87.6
220 2.09 0.9999 0.9997 1.41 7.7 88.1
230 2.07 0.9999 0.9997 1.41 7.4 88.2
240 2.02 1.0000 0.9998 1.41 7.1 88.4
250 1.99 1.0000 0.9998 1.41 6.8 88.7
260 2.01 1.0000 0.9998 1.41 6.5 88.7
270 2.01 1.0000 0.9998 1.41 6.2 89.0
VI. CONCLUSION
A new speed control strategy of a PMBLDCM drive is
validated for a compressor load of an air conditioner which
uses the reference speed as an equivalent reference voltage at
DC link. The speed control is directly proportional to the
voltage control at DC link. The rate limiter introduced in the
reference voltage at DC link effectively limits the motor
current within the desired value during the transient condition
(starting and speed control). The additional PFC feature to the
proposed drive ensures nearly unity PF in wide range of speed
and input AC voltage. Moreover, power quality parameters of
the proposed PMBLDCM drive are in conformity to an
International standard IEC 61000-3-2 [5]. The proposed drive
has demonstrated good speed control with energy efficient
operation of the drive system in the wide range of speed and
input AC voltage. The proposed drive has been found as a
promising candidate for a PMBLDCM driving Air-Con load
in 1-2 kW power range.
APPENDIX
Rated Power: 1.5 kW, rated speed: 1500 rpm, rated
current: 4.0 A, rated torque: 9.55 Nm, number of poles: 4,
stator resistance (R): 2.8 Ω/ph., inductance (L+M): 5.21
mH/ph., back EMF constant (Kb): 0.615 Vsec/rad, inertia (J):
0.013 Kg-m2
. Source impedance (Zs): 0.03 pu, switching
frequency of PFC switch (fs) = 40 kHz, capacitors (C1= C2):
15nF, PI speed controller gains (Kp): 0.145, (Ki): 1.45.
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1983

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