Alfonso Marco has over 20 years of experience in digital design engineering. He has expertise in ASIC design including front-end RTL design and verification, as well as back-end synthesis, timing analysis, formal verification, and place and route. He also has skills in FPGA design, verification strategy, functional verification, code coverage analysis, and ASIC to FPGA conversion. Additionally, he has experience with a variety of design domains including telecom, datacom, audio, and embedded systems.