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ARM
INTRODUCTION
ARM History
Introduction
 ARM is a family of instruction set architectures for
computer processors based on a reduced instruction set
computing (RISC).
 The ARM core uses a RISC architecture.
 The ARM processor core is a key component of many
successful 32-bit embedded systems.
 ARM cores are widely used in mobile phones,
handheld organizers, and a multitude of every
portable consumer devices.
Introduction
 RISC is a design aimed at delivering simple but powerful
instructions that execute within a single cycle at a high
clock speed.
 The RISC concentrates on reducing the complexity of
instructions performed by the hardware because it is
easier to provide greater flexibility and intelligence in
software rather than hardware.
 As a result, a RISC design places greater demands on the
compiler.
Introduction
 In contrast, the traditional complex instruction set
computer (CISC) relies more on the hardware for
instruction functionality, and consequently the CISC
instructions are more complicated.
RISCDesignPhilosophy
The RISC is implemented with four major design rules:
Instructions—
 RISC processors have a reduced number of
instruction classes. These classes provide simple
operations that can each execute in a single cycle.
 Each instruction is a fixed length to allow the pipeline
Pipelines—
 The processing of instructions is broken down into
smaller units that can be executed in parallel by
pipelines.
RISCDesignPhilosophy
 Registers—
 RISC machines have a large general-purpose register set.
 Any register can contain either data or an address.
 Load-store architecture —
 The processor operates on data held in registers.
 Separate load and store instructions transfer data
between the register bank and external memory.
 Memory accesses are costly, CISC design the data
processing operations can act on memory directly.
 These design rules allow a RISC processor to be simpler,
and thus the core can operate at higher clock
frequencies.
CISC vs. RISC
ARM DesignPhilosophy
 There are a number of features that driven the ARM
processor design:
 Reduce power consumption
 High code density
 Price sensitive and use low-cost memory devices
 Reduce the area of the die
 Hardware debug technology
 Instruction Set for Embedded Systems
 Variable cycle execution for certain instructions
 Inline barrel shifter leading to more complex instructions
 Thumb 16-bit instruction set
 Conditional execution
 Enhanced instructions
ARM Powered Products:

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ARM INTRODUCTION.ppt that hepls to unnderstand arm

  • 3. Introduction  ARM is a family of instruction set architectures for computer processors based on a reduced instruction set computing (RISC).  The ARM core uses a RISC architecture.  The ARM processor core is a key component of many successful 32-bit embedded systems.  ARM cores are widely used in mobile phones, handheld organizers, and a multitude of every portable consumer devices.
  • 4. Introduction  RISC is a design aimed at delivering simple but powerful instructions that execute within a single cycle at a high clock speed.  The RISC concentrates on reducing the complexity of instructions performed by the hardware because it is easier to provide greater flexibility and intelligence in software rather than hardware.  As a result, a RISC design places greater demands on the compiler.
  • 5. Introduction  In contrast, the traditional complex instruction set computer (CISC) relies more on the hardware for instruction functionality, and consequently the CISC instructions are more complicated.
  • 6. RISCDesignPhilosophy The RISC is implemented with four major design rules: Instructions—  RISC processors have a reduced number of instruction classes. These classes provide simple operations that can each execute in a single cycle.  Each instruction is a fixed length to allow the pipeline Pipelines—  The processing of instructions is broken down into smaller units that can be executed in parallel by pipelines.
  • 7. RISCDesignPhilosophy  Registers—  RISC machines have a large general-purpose register set.  Any register can contain either data or an address.  Load-store architecture —  The processor operates on data held in registers.  Separate load and store instructions transfer data between the register bank and external memory.  Memory accesses are costly, CISC design the data processing operations can act on memory directly.  These design rules allow a RISC processor to be simpler, and thus the core can operate at higher clock frequencies.
  • 9. ARM DesignPhilosophy  There are a number of features that driven the ARM processor design:  Reduce power consumption  High code density  Price sensitive and use low-cost memory devices  Reduce the area of the die  Hardware debug technology  Instruction Set for Embedded Systems  Variable cycle execution for certain instructions  Inline barrel shifter leading to more complex instructions  Thumb 16-bit instruction set  Conditional execution  Enhanced instructions