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Digital Logic Design Ch1-1
Chapter 1
Digital Systems and Binary Numbers
Eng. Ruba A. Salamah
Digital Logic Design
Digital Logic Design Ch1-2
Outline of Chapter 1
 1.1 Digital Systems
 1.2 Binary Numbers
 1.3 Number-base Conversions
 1.4 Octal and Hexadecimal Numbers
 1.5 Complements
 1.6 Signed Binary Numbers
 1.7 Binary Codes
 1.8 Binary Storage and Registers
 1.9 Binary Logic
Digital Logic Design Ch1-3
Analog and Digital Signal
 Analog system
 The physical quantities or signals may vary continuously over a specified
range.
 Digital system
 The physical quantities or signals can assume only discrete values.
 Greater accuracy
t
X(t)
t
X(t)
Analog signal Digital signal
Digital Logic Design Ch1-4
Binary Digital Signal
 An information variable represented by physical quantity.
 For digital systems, the variable takes on discrete values.
 Two level, or binary values are the most prevalent values.
 Binary values are represented abstractly by:
 Digits 0 and 1
 Words (symbols) False (F) and True (T)
 Words (symbols) Low (L) and High (H)
 And words On and Off
 Binary values are represented by values
or ranges of values of physical quantities.
t
V(t)
Binary digital signal
Logic 1
Logic 0
undefine
Digital Logic Design Ch1-5
Decimal Number System
 Base (also called radix) = 10
 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
 Digit Position
 Integer & fraction
 Digit Weight
 Weight = (Base) Position
 Magnitude
 Sum of “Digit x Weight”
 Formal Notation
1 0 -1
2 -2
5 1 2 7 4
10 1 0.1
100 0.01
500 10 2 0.7 0.04
d2*B2
+d1*B1
+d0*B0
+d-1*B-1
+d-2*B-2
(512.74)10
Digital Logic Design Ch1-6
Octal Number System
 Base = 8
 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }
 Weights
 Weight = (Base) Position
 Magnitude
 Sum of “Digit x Weight”
 Formal Notation
1 0 -1
2 -2
8 1 1/8
64 1/64
5 1 2 7 4
5 *82
+1 *81
+2 *80
+7 *8-1
+4 *8-
2
=(330.9375)10
(512.74)8
Digital Logic Design Ch1-7
Binary Number System
 Base = 2
 2 digits { 0, 1 }, called binary digits or “bits”
 Weights
 Weight = (Base) Position
 Magnitude
 Sum of “Bit x Weight”
 Formal Notation
 Groups of bits 4 bits = Nibble
8 bits = Byte
1 0 -1
2 -2
2 1 1/2
4 1/4
1 0 1 0 1
1 *22
+0 *21
+1 *20
+0 *2-1
+1 *2-
2
=(5.25)10
(101.01)2
1 0 1 1
1 1 0 0 0 1 0 1
Digital Logic Design Ch1-8
Hexadecimal Number System
 Base = 16
 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
 Weights
 Weight = (Base) Position
 Magnitude
 Sum of “Digit x Weight”
 Formal Notation
1 0 -1
2 -2
16 1 1/16
256 1/256
1 E 5 7 A
1 *162
+14 *161
+5 *160
+7 *16-1
+10 *16-2
=(485.4765625)10
(1E5.7A)16
Digital Logic Design Ch1-9
The Power of 2
n 2n
0 20=1
1 21=2
2 22=4
3 23=8
4 24=16
5 25=32
6 26=64
7 27=128
n 2n
8 28=256
9 29=512
10 210=1024
11 211=2048
12 212=4096
20 220=1M
30 230=1G
40 240=1T
Mega
Giga
Tera
Kilo
Digital Logic Design Ch1-10
Addition
 Decimal Addition
5 5
5
5
+
0
1
1
= Ten ≥ Base
 Subtract a Base
1
1 Carry
Digital Logic Design Ch1-11
Binary Addition
 Column Addition
1 0 1
1
1
1
1
1
1
1 0
+
0
0
0
0 1 1
1
≥ (2)10
1
1
1
1
1
1
= 61
= 23
= 84
Digital Logic Design Ch1-12
Binary Subtraction
 Borrow a “Base” when needed
0 0 1
1
1
0
1
1
1
1 0
−
0
1
0
1 1 1
0
= (10)2
2
2
2 2
1
0
0
0
1
= 77
= 23
= 54
Digital Logic Design Ch1-13
Binary Multiplication
 Bit by bit
0
1 1 1 1
0
1 1 0
0
0 0 0 0
0
1 1 1 1
0
1 1 1 1
0 0 0
0
0
0
1
1
0
1
1
1 0
x
Digital Logic Design Ch1-14
Number Base Conversions
Decimal
(Base 10)
Octal
(Base 8)
Binary
(Base 2)
Hexadecimal
(Base 16)
Evaluate
Magnitude
Evaluate
Magnitude
Evaluate
Magnitude
Digital Logic Design Ch1-15
Decimal (Integer) to Binary Conversion
 Divide the number by the ‘Base’ (=2)
 Take the remainder (either 0 or 1) as a coefficient
 Take the quotient and repeat the division
Example: (13)10
Quotient Remainder Coefficient
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2
MSB LSB
13/ 2 = 6 1 a0 = 1
6 / 2 = 3 0 a1 = 0
3 / 2 = 1 1 a2 = 1
1 / 2 = 0 1 a3 = 1
Digital Logic Design Ch1-16
Decimal (Fraction) to Binary Conversion
 Multiply the number by the ‘Base’ (=2)
 Take the integer (either 0 or 1) as a coefficient
 Take the resultant fraction and repeat the division
Example: (0.625)10
Integer Fraction Coefficient
Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2
MSB LSB
0.625 * 2 = 1 . 25
0.25 * 2 = 0 . 5 a-2 = 0
0.5 * 2 = 1 . 0 a-3 = 1
a-1 = 1
Digital Logic Design Ch1-17
Decimal to Octal Conversion
Example: (175)10
Quotient Remainder Coefficient
Answer: (175)10 = (a2 a1 a0)8 = (257)8
175 / 8 = 21 7 a0 = 7
21 / 8 = 2 5 a1 = 5
2 / 8 = 0 2 a2 = 2
Example: (0.3125)10
Integer Fraction Coefficient
Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8
0.3125 * 8 = 2 . 5
0.5 * 8 = 4 . 0 a-2 = 4
a-1 = 2
Digital Logic Design Ch1-18
Binary − Octal Conversion
 8 = 23
 Each group of 3 bits represents an octal
digit
Octal Binary
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
Example:
( 1 0 1 1 0 . 0 1 )2
( 2 6 . 2 )8
Assume Zeros
Works both ways (Binary to Octal & Octal to Binary)
Digital Logic Design Ch1-19
Binary − Hexadecimal Conversion
 16 = 24
 Each group of 4 bits represents a
hexadecimal digit
Hex Binary
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
A 1 0 1 0
B 1 0 1 1
C 1 1 0 0
D 1 1 0 1
E 1 1 1 0
F 1 1 1 1
Example:
( 1 0 1 1 0 . 0 1 )2
( 1 6 . 4 )16
Assume Zeros
Works both ways (Binary to Hex & Hex to Binary)
Digital Logic Design Ch1-20
Octal − Hexadecimal Conversion
 Convert to Binary as an intermediate step
Example:
( 0 1 0 1 1 0 . 0 1 0 )2
( 1 6 . 4 )16
Assume Zeros
Works both ways (Octal to Hex & Hex to Octal)
( 2 6 . 2 )8
Assume Zeros
Digital Logic Design Ch1-21
Decimal, Binary, Octal and Hexadecimal
Decimal Binary Octal Hex
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
Digital Logic Design Ch1-22
1.5 Complements
 There are two types of complements for each base-r system: the
radix complement and diminished radix complement.
 Diminished Radix Complement - (r-1)’s Complement
 Given a number N in base r having n digits, the (r–1)’s
complement of N is defined as:
(rn –1) – N
 Example for 6-digit decimal numbers:
 9’s complement is (rn – 1)–N = (106–1)–N = 999999–N
 9’s complement of 546700 is 999999–546700 = 453299
 Example for 7-digit binary numbers:
 1’s complement is (rn – 1) – N = (27–1)–N = 1111111–N
 1’s complement of 1011000 is 1111111–1011000 = 0100111
Digital Logic Design Ch1-23
Complements
 1’s Complement (Diminished Radix Complement)
 All ‘0’s become ‘1’s
 All ‘1’s become ‘0’s
Example (10110000)2
 (01001111)2
If you add a number and its 1’s complement …
1 0 1 1 0 0 0 0
+ 0 1 0 0 1 1 1 1
1 1 1 1 1 1 1 1
Digital Logic Design Ch1-24
Complements
 Radix Complement
 Example: Base-10
 Example: Base-2
The r's complement of an n-digit number N in base r is defined as
rn – N for N ≠ 0 and as 0 for N = 0. Comparing with the (r  1) 's
complement, we note that the r's complement is obtained by adding 1
to the (r  1) 's complement, since rn – N = [(rn  1) – N] + 1.
The 10's complement of 012398 is 987602
The 10's complement of 246700 is 753300
The 2's complement of 1101100 is 0010100
The 2's complement of 0110111 is 1001001
Digital Logic Design Ch1-25
Complements
 2’s Complement (Radix Complement)
 Take 1’s complement then add 1
 Toggle all bits to the left of the first ‘1’ from the right
Example:
Number:
1’s Comp.:
0 1 0 1 0 0 0 0
1 0 1 1 0 0 0 0
0 1 0 0 1 1 1 1
+ 1
OR
1 0 1 1 0 0 0 0
0
0
0
0
1
0
1
0
Digital Logic Design Ch1-26
Complements
 Subtraction with Complements
 The subtraction of two n-digit unsigned numbers M – N in
base r can be done as follows:
Digital Logic Design Ch1-27
Complements
 Example 1.5
 Using 10's complement, subtract 72532 – 3250.
 Example 1.6
 Using 10's complement, subtract 3250 – 72532.
There is no end carry.
Therefore, the answer is – (10's complement of 30718) =  69282.
Digital Logic Design Ch1-28
Complements
 Example 1.7
 Given the two binary numbers X = 1010100 and Y = 1000011, perform the
subtraction (a) X – Y ; and (b) Y  X, by using 2's complement.
There is no end carry.
Therefore, the answer is
Y – X =  (2's complement
of 1101111) =  0010001.
Digital Logic Design Ch1-29
Complements
 Subtraction of unsigned numbers can also be done by means of the (r  1)'s
complement. Remember that the (r  1) 's complement is one less then the r's
complement.
 Example 1.8
 Repeat Example 1.7, but this time using 1's complement.
There is no end carry,
Therefore, the answer is Y –
X =  (1's complement of
1101110) =  0010001.
Digital Logic Design Ch1-30
1.6 Signed Binary Numbers
To represent negative integers, we need a notation for negative
values.
It is customary to represent the sign with a bit placed in the
leftmost position of the number since binary digits.
The convention is to make the sign bit 0 for positive and 1 for
negative.
Example:
Table 1.3 lists all possible four-bit signed binary numbers in the
three representations.
Digital Logic Design Ch1-31
Signed Binary Numbers
Digital Logic Design Ch1-32
Signed Binary Numbers
 Arithmetic addition
 The addition of two numbers in the signed-magnitude system follows the rules of
ordinary arithmetic. If the signs are the same, we add the two magnitudes and
give the sum the common sign. If the signs are different, we subtract the smaller
magnitude from the larger and give the difference the sign of the larger magnitude.
 The addition of two signed binary numbers with negative numbers represented in
signed-2's-complement form is obtained from the addition of the two numbers,
including their sign bits.
 A carry out of the sign-bit position is discarded.
 Example:
Digital Logic Design Ch1-33
Signed Binary Numbers
 Arithmetic Subtraction
 In 2’s-complement form:
 Example:
1. Take the 2’s complement of the subtrahend (including the sign bit)
and add it to the minuend (including sign bit).
2. A carry out of sign-bit position is discarded.
( ) ( ) ( ) ( )
( ) ( ) ( ) ( )
A B A B
A B A B
      
      
( 6)  ( 13) (11111010  11110011)
(11111010 + 00001101)
00000111 (+ 7)
Digital Logic Design Ch1-34
1.7 Binary Codes
 BCD Code
 A number with k decimal digits will
require 4k bits in BCD.
 Decimal 396 is represented in BCD
with 12bits as 0011 1001 0110, with
each group of 4 bits representing one
decimal digit.
 A decimal number in BCD is the
same as its equivalent binary number
only when the number is between 0
and 9.
 The binary combinations 1010
through 1111 are not used and have
no meaning in BCD.
Digital Logic Design Ch1-35
Binary Code
 Example:
 Consider decimal 185 and its corresponding value in BCD and binary:
 BCD addition
Digital Logic Design Ch1-36
Binary Code
 Example:
 Consider the addition of 184 + 576 = 760 in BCD:
 Decimal Arithmetic: (+375) + (-240) = +135
Hint 6: using 10’s of BCD
Digital Logic Design Ch1-37
Binary Codes
 Other Decimal Codes
Digital Logic Design Ch1-38
Binary Codes)
 Gray Code
 The advantage is that only bit in the
code group changes in going from
one number to the next.
» Error detection.
» Representation of analog data.
» Low power design.
000 001
010
100
110 111
101
011
1-1 and onto!!
Digital Logic Design Ch1-39
Binary Codes
 American Standard Code for Information Interchange (ASCII) Character Code
Digital Logic Design Ch1-40
Binary Codes
 ASCII Character Code
Digital Logic Design Ch1-41
ASCII Character Codes
 American Standard Code for Information Interchange (Refer to
Table 1.7)
 A popular code used to represent information sent as character-
based data.
 It uses 7-bits to represent:
 94 Graphic printing characters.
 34 Non-printing characters.
 Some non-printing characters are used for text format (e.g. BS =
Backspace, CR = carriage return).
 Other non-printing characters are used for record marking and
flow control (e.g. STX and ETX start and end text areas).
Digital Logic Design Ch1-42
ASCII Properties
 ASCII has some interesting properties:
 Digits 0 to 9 span Hexadecimal values 3016 to 3916
 Upper case A-Z span 4116 to 5A16
 Lower case a-z span 6116 to 7A16
» Lower to upper case translation (and vice versa) occurs by flipping bit 6.
Digital Logic Design Ch1-43
Binary Codes
 Error-Detecting Code
 To detect errors in data communication and processing, an eighth bit is
sometimes added to the ASCII character to indicate its parity.
 A parity bit is an extra bit included with a message to make the total
number of 1's either even or odd.
 Example:
 Consider the following two characters and their even and odd parity:
Digital Logic Design Ch1-44
Binary Codes
 Error-Detecting Code
 Redundancy (e.g. extra information), in the form of extra bits, can be
incorporated into binary code words to detect and correct errors.
 A simple form of redundancy is parity, an extra bit appended onto the code
word to make the number of 1’s odd or even. Parity can detect all single-
bit errors and some multiple-bit errors.
 A code word has even parity if the number of 1’s in the code word is even.
 A code word has odd parity if the number of 1’s in the code word is odd.
 Example:
10001001
10001001
1
0 (odd parity)
Message B:
Message A: (even parity)
Digital Logic Design Ch1-45
1.8 Binary Storage and Registers
 Registers
 A binary cell is a device that possesses two stable states and is capable of storing
one of the two states.
 A register is a group of binary cells. A register with n cells can store any discrete
quantity of information that contains n bits.
 A binary cell
 Two stable state
 Store one bit of information
 Examples: flip-flop circuits, ferrite cores, capacitor
 A register
 A group of binary cells
 AX in x86 CPU
 Register Transfer
 A transfer of the information stored in one register to another.
 One of the major operations in digital system.
 An example in next slides.
n cells 2n possible states
Digital Logic Design Ch1-46
A Digital Computer Example
Synchronous or
Asynchronous?
Inputs: Keyboard,
mouse, modem,
microphone
Outputs: CRT,
LCD, modem,
speakers
Memory
Control
unit Datapath
Input/Output
CPU
Digital Logic Design Ch1-47
Transfer of information
Figure 1.1 Transfer of information among register
Digital Logic Design Ch1-48
Transfer of information
 The other major component
of a digital system
 Circuit elements to
manipulate individual bits of
information
 Load-store machine
LD R1;
LD R2;
ADD R3, R2, R1;
SD R3;
Figure 1.2 Example of binary information processing
Digital Logic Design Ch1-49
1.9 Binary Logic
 Definition of Binary Logic
 Binary logic consists of binary variables and a set of logical operations.
 The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc,
with each variable having two and only two distinct possible values: 1 and 0,
 Three basic logical operations: AND, OR, and NOT.
Digital Logic Design Ch1-50
Binary Logic
 Truth Tables, Boolean Expressions, and Logic Gates
x y z
0 0 0
0 1 0
1 0 0
1 1 1
x y z
0 0 0
0 1 1
1 0 1
1 1 1
x z
0 1
1 0
AND OR NOT
x
y z x
y z
z = x • y = x y z = x + y z = x = x’
x z
Digital Logic Design Ch1-51
Switching Circuits
AND OR
Digital Logic Design Ch1-52
Binary Logic
 Logic gates
 Example of binary signals
0
1
2
3
Logic 1
Logic 0
Un-define
Figure 1.3 Example of binary signals
Digital Logic Design Ch1-53
Binary Logic
 Logic gates
 Graphic Symbols and Input-Output Signals for Logic gates:
Fig. 1.4 Symbols for digital logic circuits
Fig. 1.5 Input-Output signals for gates
Digital Logic Design Ch1-54
Binary Logic
 Logic gates
 Graphic Symbols and Input-Output Signals for Logic gates:
Fig. 1.6 Gates with multiple inputs
Digital Logic Design Ch1-55
Examples
 Example 1:
 Convert the following decimal numbers into binary using 2’s
complement representation and perform the required arithmetic
operations:
(+286) + (-81)
(-286) + (-81)
 Convert the same numbers into BCD using 10’s complement
representation and reperform the required arithmetic operations.
Digital Logic Design Ch1-56
a) Aritmetic operations in binary
+286=0100011110 +81= 0001010001
-286 =1011100010 -81= 1110101111
(+286) + (-81)
0100011110
+
1110101111
_________________
0011001101
=+205
(-286) + (-81)
1011100010
+
1110101111
_________________
1010010001
=-367
Digital Logic Design Ch1-57
a) Aritmetic operations in BCD
+286=0286=0000 0010 1000 0110
-286 =9714=1001 0111 0001 0100
+81 = 0081=0000 0000 0100 0001
-81 = 9919=1001 1001 0001 1001
(-286) + (-81)
1001 0111 0001 0100
+
1001 1001 0001 1001
_______________________________
1001 0110 0011 0011
=-367
(+286) + (-81)
0000 0010 1000 0110
+
1001 1001 0001 1001
_______________________________
0000 0010 0000 0101
=+205
Digital Logic Design Ch1-58
Assignment Problems
 Answer the following problems from the text book:
1.2, 1.3(a,b), 1.4, 1.5, 7, 8, 9(b,e), 13, 15(a,d), 16, 17(a,d), 18(a,d),
19(b,d), 22, 23, 24(b), 26, 30, 33, 35, 36.
 Good Luck

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Chapter_1_Digital_Systems_and_Binary_Numbers2.ppt

  • 1. Digital Logic Design Ch1-1 Chapter 1 Digital Systems and Binary Numbers Eng. Ruba A. Salamah Digital Logic Design
  • 2. Digital Logic Design Ch1-2 Outline of Chapter 1  1.1 Digital Systems  1.2 Binary Numbers  1.3 Number-base Conversions  1.4 Octal and Hexadecimal Numbers  1.5 Complements  1.6 Signed Binary Numbers  1.7 Binary Codes  1.8 Binary Storage and Registers  1.9 Binary Logic
  • 3. Digital Logic Design Ch1-3 Analog and Digital Signal  Analog system  The physical quantities or signals may vary continuously over a specified range.  Digital system  The physical quantities or signals can assume only discrete values.  Greater accuracy t X(t) t X(t) Analog signal Digital signal
  • 4. Digital Logic Design Ch1-4 Binary Digital Signal  An information variable represented by physical quantity.  For digital systems, the variable takes on discrete values.  Two level, or binary values are the most prevalent values.  Binary values are represented abstractly by:  Digits 0 and 1  Words (symbols) False (F) and True (T)  Words (symbols) Low (L) and High (H)  And words On and Off  Binary values are represented by values or ranges of values of physical quantities. t V(t) Binary digital signal Logic 1 Logic 0 undefine
  • 5. Digital Logic Design Ch1-5 Decimal Number System  Base (also called radix) = 10  10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }  Digit Position  Integer & fraction  Digit Weight  Weight = (Base) Position  Magnitude  Sum of “Digit x Weight”  Formal Notation 1 0 -1 2 -2 5 1 2 7 4 10 1 0.1 100 0.01 500 10 2 0.7 0.04 d2*B2 +d1*B1 +d0*B0 +d-1*B-1 +d-2*B-2 (512.74)10
  • 6. Digital Logic Design Ch1-6 Octal Number System  Base = 8  8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }  Weights  Weight = (Base) Position  Magnitude  Sum of “Digit x Weight”  Formal Notation 1 0 -1 2 -2 8 1 1/8 64 1/64 5 1 2 7 4 5 *82 +1 *81 +2 *80 +7 *8-1 +4 *8- 2 =(330.9375)10 (512.74)8
  • 7. Digital Logic Design Ch1-7 Binary Number System  Base = 2  2 digits { 0, 1 }, called binary digits or “bits”  Weights  Weight = (Base) Position  Magnitude  Sum of “Bit x Weight”  Formal Notation  Groups of bits 4 bits = Nibble 8 bits = Byte 1 0 -1 2 -2 2 1 1/2 4 1/4 1 0 1 0 1 1 *22 +0 *21 +1 *20 +0 *2-1 +1 *2- 2 =(5.25)10 (101.01)2 1 0 1 1 1 1 0 0 0 1 0 1
  • 8. Digital Logic Design Ch1-8 Hexadecimal Number System  Base = 16  16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }  Weights  Weight = (Base) Position  Magnitude  Sum of “Digit x Weight”  Formal Notation 1 0 -1 2 -2 16 1 1/16 256 1/256 1 E 5 7 A 1 *162 +14 *161 +5 *160 +7 *16-1 +10 *16-2 =(485.4765625)10 (1E5.7A)16
  • 9. Digital Logic Design Ch1-9 The Power of 2 n 2n 0 20=1 1 21=2 2 22=4 3 23=8 4 24=16 5 25=32 6 26=64 7 27=128 n 2n 8 28=256 9 29=512 10 210=1024 11 211=2048 12 212=4096 20 220=1M 30 230=1G 40 240=1T Mega Giga Tera Kilo
  • 10. Digital Logic Design Ch1-10 Addition  Decimal Addition 5 5 5 5 + 0 1 1 = Ten ≥ Base  Subtract a Base 1 1 Carry
  • 11. Digital Logic Design Ch1-11 Binary Addition  Column Addition 1 0 1 1 1 1 1 1 1 1 0 + 0 0 0 0 1 1 1 ≥ (2)10 1 1 1 1 1 1 = 61 = 23 = 84
  • 12. Digital Logic Design Ch1-12 Binary Subtraction  Borrow a “Base” when needed 0 0 1 1 1 0 1 1 1 1 0 − 0 1 0 1 1 1 0 = (10)2 2 2 2 2 1 0 0 0 1 = 77 = 23 = 54
  • 13. Digital Logic Design Ch1-13 Binary Multiplication  Bit by bit 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 1 1 1 1 0 1 1 1 1 0 0 0 0 0 0 1 1 0 1 1 1 0 x
  • 14. Digital Logic Design Ch1-14 Number Base Conversions Decimal (Base 10) Octal (Base 8) Binary (Base 2) Hexadecimal (Base 16) Evaluate Magnitude Evaluate Magnitude Evaluate Magnitude
  • 15. Digital Logic Design Ch1-15 Decimal (Integer) to Binary Conversion  Divide the number by the ‘Base’ (=2)  Take the remainder (either 0 or 1) as a coefficient  Take the quotient and repeat the division Example: (13)10 Quotient Remainder Coefficient Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2 MSB LSB 13/ 2 = 6 1 a0 = 1 6 / 2 = 3 0 a1 = 0 3 / 2 = 1 1 a2 = 1 1 / 2 = 0 1 a3 = 1
  • 16. Digital Logic Design Ch1-16 Decimal (Fraction) to Binary Conversion  Multiply the number by the ‘Base’ (=2)  Take the integer (either 0 or 1) as a coefficient  Take the resultant fraction and repeat the division Example: (0.625)10 Integer Fraction Coefficient Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2 MSB LSB 0.625 * 2 = 1 . 25 0.25 * 2 = 0 . 5 a-2 = 0 0.5 * 2 = 1 . 0 a-3 = 1 a-1 = 1
  • 17. Digital Logic Design Ch1-17 Decimal to Octal Conversion Example: (175)10 Quotient Remainder Coefficient Answer: (175)10 = (a2 a1 a0)8 = (257)8 175 / 8 = 21 7 a0 = 7 21 / 8 = 2 5 a1 = 5 2 / 8 = 0 2 a2 = 2 Example: (0.3125)10 Integer Fraction Coefficient Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8 0.3125 * 8 = 2 . 5 0.5 * 8 = 4 . 0 a-2 = 4 a-1 = 2
  • 18. Digital Logic Design Ch1-18 Binary − Octal Conversion  8 = 23  Each group of 3 bits represents an octal digit Octal Binary 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 Example: ( 1 0 1 1 0 . 0 1 )2 ( 2 6 . 2 )8 Assume Zeros Works both ways (Binary to Octal & Octal to Binary)
  • 19. Digital Logic Design Ch1-19 Binary − Hexadecimal Conversion  16 = 24  Each group of 4 bits represents a hexadecimal digit Hex Binary 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1 A 1 0 1 0 B 1 0 1 1 C 1 1 0 0 D 1 1 0 1 E 1 1 1 0 F 1 1 1 1 Example: ( 1 0 1 1 0 . 0 1 )2 ( 1 6 . 4 )16 Assume Zeros Works both ways (Binary to Hex & Hex to Binary)
  • 20. Digital Logic Design Ch1-20 Octal − Hexadecimal Conversion  Convert to Binary as an intermediate step Example: ( 0 1 0 1 1 0 . 0 1 0 )2 ( 1 6 . 4 )16 Assume Zeros Works both ways (Octal to Hex & Hex to Octal) ( 2 6 . 2 )8 Assume Zeros
  • 21. Digital Logic Design Ch1-21 Decimal, Binary, Octal and Hexadecimal Decimal Binary Octal Hex 00 0000 00 0 01 0001 01 1 02 0010 02 2 03 0011 03 3 04 0100 04 4 05 0101 05 5 06 0110 06 6 07 0111 07 7 08 1000 10 8 09 1001 11 9 10 1010 12 A 11 1011 13 B 12 1100 14 C 13 1101 15 D 14 1110 16 E 15 1111 17 F
  • 22. Digital Logic Design Ch1-22 1.5 Complements  There are two types of complements for each base-r system: the radix complement and diminished radix complement.  Diminished Radix Complement - (r-1)’s Complement  Given a number N in base r having n digits, the (r–1)’s complement of N is defined as: (rn –1) – N  Example for 6-digit decimal numbers:  9’s complement is (rn – 1)–N = (106–1)–N = 999999–N  9’s complement of 546700 is 999999–546700 = 453299  Example for 7-digit binary numbers:  1’s complement is (rn – 1) – N = (27–1)–N = 1111111–N  1’s complement of 1011000 is 1111111–1011000 = 0100111
  • 23. Digital Logic Design Ch1-23 Complements  1’s Complement (Diminished Radix Complement)  All ‘0’s become ‘1’s  All ‘1’s become ‘0’s Example (10110000)2  (01001111)2 If you add a number and its 1’s complement … 1 0 1 1 0 0 0 0 + 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1
  • 24. Digital Logic Design Ch1-24 Complements  Radix Complement  Example: Base-10  Example: Base-2 The r's complement of an n-digit number N in base r is defined as rn – N for N ≠ 0 and as 0 for N = 0. Comparing with the (r  1) 's complement, we note that the r's complement is obtained by adding 1 to the (r  1) 's complement, since rn – N = [(rn  1) – N] + 1. The 10's complement of 012398 is 987602 The 10's complement of 246700 is 753300 The 2's complement of 1101100 is 0010100 The 2's complement of 0110111 is 1001001
  • 25. Digital Logic Design Ch1-25 Complements  2’s Complement (Radix Complement)  Take 1’s complement then add 1  Toggle all bits to the left of the first ‘1’ from the right Example: Number: 1’s Comp.: 0 1 0 1 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0 1 1 1 1 + 1 OR 1 0 1 1 0 0 0 0 0 0 0 0 1 0 1 0
  • 26. Digital Logic Design Ch1-26 Complements  Subtraction with Complements  The subtraction of two n-digit unsigned numbers M – N in base r can be done as follows:
  • 27. Digital Logic Design Ch1-27 Complements  Example 1.5  Using 10's complement, subtract 72532 – 3250.  Example 1.6  Using 10's complement, subtract 3250 – 72532. There is no end carry. Therefore, the answer is – (10's complement of 30718) =  69282.
  • 28. Digital Logic Design Ch1-28 Complements  Example 1.7  Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X – Y ; and (b) Y  X, by using 2's complement. There is no end carry. Therefore, the answer is Y – X =  (2's complement of 1101111) =  0010001.
  • 29. Digital Logic Design Ch1-29 Complements  Subtraction of unsigned numbers can also be done by means of the (r  1)'s complement. Remember that the (r  1) 's complement is one less then the r's complement.  Example 1.8  Repeat Example 1.7, but this time using 1's complement. There is no end carry, Therefore, the answer is Y – X =  (1's complement of 1101110) =  0010001.
  • 30. Digital Logic Design Ch1-30 1.6 Signed Binary Numbers To represent negative integers, we need a notation for negative values. It is customary to represent the sign with a bit placed in the leftmost position of the number since binary digits. The convention is to make the sign bit 0 for positive and 1 for negative. Example: Table 1.3 lists all possible four-bit signed binary numbers in the three representations.
  • 31. Digital Logic Design Ch1-31 Signed Binary Numbers
  • 32. Digital Logic Design Ch1-32 Signed Binary Numbers  Arithmetic addition  The addition of two numbers in the signed-magnitude system follows the rules of ordinary arithmetic. If the signs are the same, we add the two magnitudes and give the sum the common sign. If the signs are different, we subtract the smaller magnitude from the larger and give the difference the sign of the larger magnitude.  The addition of two signed binary numbers with negative numbers represented in signed-2's-complement form is obtained from the addition of the two numbers, including their sign bits.  A carry out of the sign-bit position is discarded.  Example:
  • 33. Digital Logic Design Ch1-33 Signed Binary Numbers  Arithmetic Subtraction  In 2’s-complement form:  Example: 1. Take the 2’s complement of the subtrahend (including the sign bit) and add it to the minuend (including sign bit). 2. A carry out of sign-bit position is discarded. ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) A B A B A B A B               ( 6)  ( 13) (11111010  11110011) (11111010 + 00001101) 00000111 (+ 7)
  • 34. Digital Logic Design Ch1-34 1.7 Binary Codes  BCD Code  A number with k decimal digits will require 4k bits in BCD.  Decimal 396 is represented in BCD with 12bits as 0011 1001 0110, with each group of 4 bits representing one decimal digit.  A decimal number in BCD is the same as its equivalent binary number only when the number is between 0 and 9.  The binary combinations 1010 through 1111 are not used and have no meaning in BCD.
  • 35. Digital Logic Design Ch1-35 Binary Code  Example:  Consider decimal 185 and its corresponding value in BCD and binary:  BCD addition
  • 36. Digital Logic Design Ch1-36 Binary Code  Example:  Consider the addition of 184 + 576 = 760 in BCD:  Decimal Arithmetic: (+375) + (-240) = +135 Hint 6: using 10’s of BCD
  • 37. Digital Logic Design Ch1-37 Binary Codes  Other Decimal Codes
  • 38. Digital Logic Design Ch1-38 Binary Codes)  Gray Code  The advantage is that only bit in the code group changes in going from one number to the next. » Error detection. » Representation of analog data. » Low power design. 000 001 010 100 110 111 101 011 1-1 and onto!!
  • 39. Digital Logic Design Ch1-39 Binary Codes  American Standard Code for Information Interchange (ASCII) Character Code
  • 40. Digital Logic Design Ch1-40 Binary Codes  ASCII Character Code
  • 41. Digital Logic Design Ch1-41 ASCII Character Codes  American Standard Code for Information Interchange (Refer to Table 1.7)  A popular code used to represent information sent as character- based data.  It uses 7-bits to represent:  94 Graphic printing characters.  34 Non-printing characters.  Some non-printing characters are used for text format (e.g. BS = Backspace, CR = carriage return).  Other non-printing characters are used for record marking and flow control (e.g. STX and ETX start and end text areas).
  • 42. Digital Logic Design Ch1-42 ASCII Properties  ASCII has some interesting properties:  Digits 0 to 9 span Hexadecimal values 3016 to 3916  Upper case A-Z span 4116 to 5A16  Lower case a-z span 6116 to 7A16 » Lower to upper case translation (and vice versa) occurs by flipping bit 6.
  • 43. Digital Logic Design Ch1-43 Binary Codes  Error-Detecting Code  To detect errors in data communication and processing, an eighth bit is sometimes added to the ASCII character to indicate its parity.  A parity bit is an extra bit included with a message to make the total number of 1's either even or odd.  Example:  Consider the following two characters and their even and odd parity:
  • 44. Digital Logic Design Ch1-44 Binary Codes  Error-Detecting Code  Redundancy (e.g. extra information), in the form of extra bits, can be incorporated into binary code words to detect and correct errors.  A simple form of redundancy is parity, an extra bit appended onto the code word to make the number of 1’s odd or even. Parity can detect all single- bit errors and some multiple-bit errors.  A code word has even parity if the number of 1’s in the code word is even.  A code word has odd parity if the number of 1’s in the code word is odd.  Example: 10001001 10001001 1 0 (odd parity) Message B: Message A: (even parity)
  • 45. Digital Logic Design Ch1-45 1.8 Binary Storage and Registers  Registers  A binary cell is a device that possesses two stable states and is capable of storing one of the two states.  A register is a group of binary cells. A register with n cells can store any discrete quantity of information that contains n bits.  A binary cell  Two stable state  Store one bit of information  Examples: flip-flop circuits, ferrite cores, capacitor  A register  A group of binary cells  AX in x86 CPU  Register Transfer  A transfer of the information stored in one register to another.  One of the major operations in digital system.  An example in next slides. n cells 2n possible states
  • 46. Digital Logic Design Ch1-46 A Digital Computer Example Synchronous or Asynchronous? Inputs: Keyboard, mouse, modem, microphone Outputs: CRT, LCD, modem, speakers Memory Control unit Datapath Input/Output CPU
  • 47. Digital Logic Design Ch1-47 Transfer of information Figure 1.1 Transfer of information among register
  • 48. Digital Logic Design Ch1-48 Transfer of information  The other major component of a digital system  Circuit elements to manipulate individual bits of information  Load-store machine LD R1; LD R2; ADD R3, R2, R1; SD R3; Figure 1.2 Example of binary information processing
  • 49. Digital Logic Design Ch1-49 1.9 Binary Logic  Definition of Binary Logic  Binary logic consists of binary variables and a set of logical operations.  The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc, with each variable having two and only two distinct possible values: 1 and 0,  Three basic logical operations: AND, OR, and NOT.
  • 50. Digital Logic Design Ch1-50 Binary Logic  Truth Tables, Boolean Expressions, and Logic Gates x y z 0 0 0 0 1 0 1 0 0 1 1 1 x y z 0 0 0 0 1 1 1 0 1 1 1 1 x z 0 1 1 0 AND OR NOT x y z x y z z = x • y = x y z = x + y z = x = x’ x z
  • 51. Digital Logic Design Ch1-51 Switching Circuits AND OR
  • 52. Digital Logic Design Ch1-52 Binary Logic  Logic gates  Example of binary signals 0 1 2 3 Logic 1 Logic 0 Un-define Figure 1.3 Example of binary signals
  • 53. Digital Logic Design Ch1-53 Binary Logic  Logic gates  Graphic Symbols and Input-Output Signals for Logic gates: Fig. 1.4 Symbols for digital logic circuits Fig. 1.5 Input-Output signals for gates
  • 54. Digital Logic Design Ch1-54 Binary Logic  Logic gates  Graphic Symbols and Input-Output Signals for Logic gates: Fig. 1.6 Gates with multiple inputs
  • 55. Digital Logic Design Ch1-55 Examples  Example 1:  Convert the following decimal numbers into binary using 2’s complement representation and perform the required arithmetic operations: (+286) + (-81) (-286) + (-81)  Convert the same numbers into BCD using 10’s complement representation and reperform the required arithmetic operations.
  • 56. Digital Logic Design Ch1-56 a) Aritmetic operations in binary +286=0100011110 +81= 0001010001 -286 =1011100010 -81= 1110101111 (+286) + (-81) 0100011110 + 1110101111 _________________ 0011001101 =+205 (-286) + (-81) 1011100010 + 1110101111 _________________ 1010010001 =-367
  • 57. Digital Logic Design Ch1-57 a) Aritmetic operations in BCD +286=0286=0000 0010 1000 0110 -286 =9714=1001 0111 0001 0100 +81 = 0081=0000 0000 0100 0001 -81 = 9919=1001 1001 0001 1001 (-286) + (-81) 1001 0111 0001 0100 + 1001 1001 0001 1001 _______________________________ 1001 0110 0011 0011 =-367 (+286) + (-81) 0000 0010 1000 0110 + 1001 1001 0001 1001 _______________________________ 0000 0010 0000 0101 =+205
  • 58. Digital Logic Design Ch1-58 Assignment Problems  Answer the following problems from the text book: 1.2, 1.3(a,b), 1.4, 1.5, 7, 8, 9(b,e), 13, 15(a,d), 16, 17(a,d), 18(a,d), 19(b,d), 22, 23, 24(b), 26, 30, 33, 35, 36.  Good Luck