CP Lecture-2 The Microprocessor and its Architecture.pptx
- 1. Microprocessor Systems The Microprocessor & its Architecture Lecture - 2
- 2. Memory • Storage Device —Addresses —Registers • Major Categories —Read/Write Memory (R/W) —Read-only- Memory (ROM) D7 D0
- 4. Microprocessor Architecture • MPU communicates with Memory and I/O using the System Bus —Address bus – Unidirectional – Memory and I/O Addresses —Data bus – Bidirectional – Transfers Binary Data and Instructions —Control lines – Read and Write timing signals
- 5. Software • Assembly Language —Machine instructions represented in mnemonics —Efficient execution and use of memory —Machine-specific
- 6. MPU-Based Systems • System hardware —Discrete components – Microprocessor, Memory, and I/O —Components connected by buses – Address, Data, and Control • System software —Group of programs that monitors the functions of the entire system
- 8. 8086 Microprocessor • The 8086 is a 16-bit microprocessor chip designed by Intel corporation in between early 1976 and mid-1978. • The release of Intel's 8086 microprocessor in 1978 was a watershed moment for personal computing.
- 9. Elements of the 8086 MP Architecture The 80x86 has: • 16-bit internal data bus • 20-bit address bus: – 2^20 = 1,048,576 = 1 Megabyte • Control bus • Execution Unit • Bus Interface Unit
- 10. The 8086 Processor Model • The 8086 CPU logic has been partitioned into two functional units namely: • Bus Interface Unit (BIU) • Execution Unit (EU).
- 11. EU & BIU • The major reason for this separation is to increase the processing speed of the processor. • The BIU has to interact with memory and I/O devices and fetches the instructions and data required by the EU. • EU is responsible for executing the instructions of the programs and to carry out the required processing.
- 12. EU & BIU
- 14. Instruction Queue • It is of 6 Bytes. • To increase the execution speed, BIU fetches as many as six instruction bytes ahead to time from memory. • It operates on the principle first in first out (FIFO). • Then all bytes are given to EU one by one. • This pre-fetching operation of BIU may be in parallel with execution operation of EU. • It improves the execution speed of the instruction.
- 15. The 8086 Programming Model
- 16. Registers • What are Registers • The programming model of the 8086 through the Core2 is considered to be program visible because its registers are used during application programming and are specified by the instructions.
- 18. Registers of 8086 • General Purpose Registers • Pointer and Index Registers • Segment Registers • Instruction Pointer • Status Flags
- 19. General Purpose Registers • There are four 16-bit general purpose registers • Each of these 16-bit registers is further subdivided into two 8-bit registers.
- 20. General Purpose Registers • AX Register: AX register is also known as accumulator register that stores operands for arithmetic operation like divide, rotate. — Used to hold an offset. • BX Register: This register is mainly used as a base register. It holds the starting base location of a memory region within a data segment. • CX Register: It is defined as a counter. It is primarily used in loop instruction to store loop counter and similar operations. • DX Register: DX register is used to contain I/O port address for I/O instruction. — Used to hold a portion of the result holds a part of the result from a multiplication or part of the dividend before a division. — Bp, di, si, r8 – r15
- 21. • Source Index (SI) —The source index register often (source index) addresses source string data for the string instructions • Destination Index (DI) —often addresses string destination data for the string instructions. • Base Pointer(BP) —points to a memory location in all versions of the microprocessor for memory data transfers.
- 22. Special Purpose Registers • Stack Pointer(SP) —addresses an area of memory called the stack. The stack memory (stack pointer) stores data through this pointer • Instruction Pointer(IP) —The instruction pointer, which points to the next instruction in a program, is used by the microprocessor to find the next sequential instruction in a program located within the code segment.
- 23. Special Purpose Registers • EFLAGS: —Store the state of various conditions in the microprocessor.
- 25. Segment Register • Code Segment Register (CS), • Data Segment Register (DS), • Stack Segment Register (SS), • Extra Segment Register (ES).
- 26. Code Segment • The code segment is a section of memory that holds the code (programs and procedures) used by the microprocessor. —In real mode, this specifies the start of a 64KB memory segment. —DataSegment – Similar to the CS except this segment holds data. – Data are accessed in the data segment by an offset address or the contents of other registers that hold the offset address.
- 27. • Stack segment —The stack segment defines the area of memory used for the stack. The stack entry point is determined by the stack segment and stack pointer registers. The BP register also addresses data within the stack segment – Stack pointer and BP • Extra Segment —The extra segment is an additional data segment that is used by some of the string instructions to hold destination data.
- 28. Segment Register • A segment register points to the starting address of a memory segment. • For Example: The code segment register points to the starting address of the code segment. • The data segment register points to the starting address of the data segment, and so on. • The maximum capacity of a segment may be up to 64 KB.
- 29. Advantages of Memory Segmentation • It facilitates use of separate memory areas for program, data and stack. • It permits a program or its data to be put in different areas of memory • In this program can be relocated which is very useful in multiprogramming i.e. multitasking becomes easy.
- 30. Status Flags • Status Flags determines the current state • They are modified automatically by CPU after mathematical operations. This allows to determine the type of the result. • 8086 has 16-bit status register. It is also called Flag Register or Program Status Word (PSW).
- 31. Status Flags
- 34. • O(overflow): — An overflow indicates that the result has exceeded the capacity of the machine. • A(auxiliary carry): — The auxiliary carry holds the carry (half-carry) after addition or the borrow after subtraction between bit positions 3 and 4 of the result.
- 36. • VM(Virtual Mode): — The VM flag bit selects virtual mode operation in a protected mode system. A virtual mode system allows multiple DOS memory partitions that are 1M byte in length to coexist in the memory
- 38. 8086 Pin Diagram
- 39. Figure 2–1 The programming model of the 8086 through the Core2 microprocessor including the 64-bit extensions.
- 40. Multipurpose Registers • RAX - a 64-bit register (RAX), a 32-bit register (accumulator) (EAX), a 16-bit register (AX), or as either of two 8-bit registers (AH and AL). • The accumulator is used for instructions such as multiplication, division, and some of the adjustment instructions. • Intel plans to expand the address bus to 52 bits to address 4P (252 ~1015 =peta) bytes of memory.
- 41. Address Space (Main Memory: RAM) • Address bus:16 bit Address Space:64 KBytes • Address bus:20 bit Address Space:1 Mbytes • Address bus:32 bit Address Space:4 Gbytes • Address bus:34 bit Address Space:16GBytes • Address bus:36 bit Address Space:64GBytes • Address bus:38 bit Address Space:256GBytes • Address bus:52 bit Address Space:1015 Bytes