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design metrics for embedded systems and rtos
design metrics for embedded systems and rtos
design metrics for embedded systems and rtos
Design challenge – optimizing
design metrics
• Design metric
– A measurable feature of a system’s
implementation
– Optimizing design metrics is a key challenge
4
Design challenge – optimizing
design metrics
 Common metrics
 Unit cost: the monetary cost of manufacturing each copy of the
system, excluding NRE cost
 NRE cost (Non-Recurring Engineering cost): The one-
time monetary cost of designing the system
 Size: the physical space required by the system
 Performance: the execution time or throughput of the system
 Power: the amount of power consumed by the system
 Flexibility: the ability to change the functionality of the system
without incurring heavy NRE cost
5
Design challenge – optimizing
design metrics
 Common metrics (continued)
 Time-to-prototype: the time needed to build a working
version of the system
 Time-to-market: the time required to develop a system to the
point that it can be released and sold to customers
 Maintainability: the ability to modify the system after its
initial release
 Correctness, safety, many more
6
Design metric competition
improving one may worsen others
 Expertise with both
software and hardware
is needed to optimize
design metrics
 Not just a hardware or
software expert, as is
common
 A designer must be
comfortable with various
technologies in order to
choose the best for a given
application and constraints
7
Size
Performance
Power
NRE cost
Time-to-market: a demanding
design metric  Time required to develop
a product to the point it
can be sold to customers
 Market window
 Period during which the
product would have
highest sales
 Average time-to-market
constraint is about 8
months
 Delays can be costly
8
Revenues
($)
Time (months)
Losses due to delayed market
entry
 Simplified revenue model
 Product life = 2W, peak at W
 Time of market entry defines
a triangle, representing
market penetration
 Triangle area equals revenue
 Loss
 The difference between the
on-time and delayed triangle
areas
9
On-time Delayed
entry entry
Peak revenue
Peak revenue from
delayed entry
Market rise Market fall
W 2W
Time
D
On-time
Delayed
Revenues
($)
Losses due to delayed market
entry (cont.)  Area = 1/2 * base * height
 On-time = 1/2 * 2W * W
 Delayed = 1/2 * (W-D+W)*(W-
D)
 Percentage revenue loss =
(D(3W-D)/2W2
)*100%
 Try some examples
10
On-time Delayed
entry entry
Peak revenue
Peak revenue from
delayed entry
Market rise Market fall
W 2W
Time
D
On-time
Delayed
Revenues
($)
– Lifetime 2W=52 wks, delay D=4
wks
– (4*(3*26 –4)/2*26^2) = 22%
– Lifetime 2W=52 wks, delay D=10
wks
– (10*(3*26 –10)/2*26^2) = 50%
– Delays are costly!
NRE and unit cost metrics
• Costs:
– Unit cost: the monetary cost of manufacturing each copy of the
system, excluding NRE cost
– NRE cost (Non-Recurring Engineering cost): The one-time monetary
cost of designing the system
– total cost = NRE cost + unit cost * # of units
– per-product cost = total cost / # of units
= (NRE cost / # of units) + unit cost
11
• Example
– NRE=$2000, unit=$100
– For 10 units
– total cost = $2000 + 10*$100 = $3000
– per-product cost = $2000/10 + $100 = $300
Amortizing NRE cost over the units results in an
additional $200 per unit
The performance design metric
 Widely-used measure of system, widely-abused
 Clock frequency, instructions per second – not good measures
 Digital camera example – a user cares about how fast it processes
images, not clock speed or instructions per second
 Latency (response time)
 Time between task start and end
 e.g., Camera’s A and B process images in 0.25 seconds
 Throughput
 Tasks per second, e.g. Camera A processes 4 images per second
 Throughput can be more than latency seems to imply due to
concurrency, e.g. Camera B may process 8 images per second (by
capturing a new image while previous image is being stored).
 Speedup of B over S = B’s performance / A’s
performance
 Throughput speedup = 8/4 = 2
12
Three key embedded system
technologies
 Technology
 A manner of accomplishing a task, especially using
technical processes, methods, or knowledge
 Three key technologies for embedded systems
 Processor technology
 IC technology
 Design technology
13
Processor technology
 The architecture of the computation engine used to
implement a system’s desired functionality
 Processor does not have to be programmable
 “Processor” not equal to general-purpose processor
14
Application-specific
Registers
Custom
ALU
Datapath
Controller
Program
memory
Assembly code
for:
total = 0
for i =1 to …
Control logic
and State
register
Data
memory
IR PC
Single-purpose (“hardware”)
Datapath
Controller
Control
logic
State
register
Data
memory
index
total
+
IR PC
Register
file
General
ALU
Datapath
Controller
Program
memory
Assembly code
for:
total = 0
for i =1 to …
Control
logic and
State
register
Data
memory
General-purpose (“software”)
Processor technology
 Processors vary in their customization for the problem at hand
15
total = 0
for i = 1 to N loop
total += M[i]
end loop
General-
purpose
processor
Single-
purpose
processor
Application-specific
processor
Desired
functionality
General-purpose processors
 Programmable device used in a
variety of applications
 Also known as “microprocessor”
 Features
 Program memory
 General datapath with large register
file and general ALU
 User benefits
 Low time-to-market and NRE costs
 High flexibility
 “Pentium” the most well-known,
but there are hundreds of others
16
IR PC
Register
file
General
ALU
Datapath
Controller
Program
memory
Assembly code
for:
total = 0
for i =1 to …
Control
logic and
State
register
Data
memory
Single-purpose processors
 Digital circuit designed to execute
exactly one program
 a.k.a. coprocessor, accelerator or
peripheral
 Features
 Contains only the components needed to
execute a single program
 No program memory
 Benefits
 Fast
 Low power
 Small size
17
Datapath
Controller
Control
logic
State
register
Data
memory
index
total
+
Application-specific processors
• Programmable processor optimized
for a particular class of applications
having common characteristics
– Compromise between general-purpose
and single-purpose processors
• Features
– Program memory
– Optimized datapath
– Special functional units
• Benefits
– Some flexibility, good performance, size
and power
18
IR PC
Registers
Custom
ALU
Datapath
Controller
Program
memory
Assembly code
for:
total = 0
for i =1 to …
Control
logic and
State
register
Data
memory
Architectures
 We must be clear about the architecture that we are going to use for
design of ES
 It has also got a wide variety of choices, to be chosen according to the
given application.
 The choices are as follows
 Application-specific Architecture :-
- Controller Architecture
- Datapath Architecture
- Finite state machine with datapath
 General Purpose Architecture :-
- CISC
- RISC
- Vector machine
- VLIW ( Very Long Instruction Word Computer )
Need for RTOS in Embedded
systems
 Meeting deadlines
 Deterministic behavior
 Physical and memory size
 Prioritized tasks
 Minimum interrupt latency
 Watchdog timer & vectored interrupt
 Small footprint
 Reliable system

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design metrics for embedded systems and rtos

  • 4. Design challenge – optimizing design metrics • Design metric – A measurable feature of a system’s implementation – Optimizing design metrics is a key challenge 4
  • 5. Design challenge – optimizing design metrics  Common metrics  Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost  NRE cost (Non-Recurring Engineering cost): The one- time monetary cost of designing the system  Size: the physical space required by the system  Performance: the execution time or throughput of the system  Power: the amount of power consumed by the system  Flexibility: the ability to change the functionality of the system without incurring heavy NRE cost 5
  • 6. Design challenge – optimizing design metrics  Common metrics (continued)  Time-to-prototype: the time needed to build a working version of the system  Time-to-market: the time required to develop a system to the point that it can be released and sold to customers  Maintainability: the ability to modify the system after its initial release  Correctness, safety, many more 6
  • 7. Design metric competition improving one may worsen others  Expertise with both software and hardware is needed to optimize design metrics  Not just a hardware or software expert, as is common  A designer must be comfortable with various technologies in order to choose the best for a given application and constraints 7 Size Performance Power NRE cost
  • 8. Time-to-market: a demanding design metric  Time required to develop a product to the point it can be sold to customers  Market window  Period during which the product would have highest sales  Average time-to-market constraint is about 8 months  Delays can be costly 8 Revenues ($) Time (months)
  • 9. Losses due to delayed market entry  Simplified revenue model  Product life = 2W, peak at W  Time of market entry defines a triangle, representing market penetration  Triangle area equals revenue  Loss  The difference between the on-time and delayed triangle areas 9 On-time Delayed entry entry Peak revenue Peak revenue from delayed entry Market rise Market fall W 2W Time D On-time Delayed Revenues ($)
  • 10. Losses due to delayed market entry (cont.)  Area = 1/2 * base * height  On-time = 1/2 * 2W * W  Delayed = 1/2 * (W-D+W)*(W- D)  Percentage revenue loss = (D(3W-D)/2W2 )*100%  Try some examples 10 On-time Delayed entry entry Peak revenue Peak revenue from delayed entry Market rise Market fall W 2W Time D On-time Delayed Revenues ($) – Lifetime 2W=52 wks, delay D=4 wks – (4*(3*26 –4)/2*26^2) = 22% – Lifetime 2W=52 wks, delay D=10 wks – (10*(3*26 –10)/2*26^2) = 50% – Delays are costly!
  • 11. NRE and unit cost metrics • Costs: – Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost – NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system – total cost = NRE cost + unit cost * # of units – per-product cost = total cost / # of units = (NRE cost / # of units) + unit cost 11 • Example – NRE=$2000, unit=$100 – For 10 units – total cost = $2000 + 10*$100 = $3000 – per-product cost = $2000/10 + $100 = $300 Amortizing NRE cost over the units results in an additional $200 per unit
  • 12. The performance design metric  Widely-used measure of system, widely-abused  Clock frequency, instructions per second – not good measures  Digital camera example – a user cares about how fast it processes images, not clock speed or instructions per second  Latency (response time)  Time between task start and end  e.g., Camera’s A and B process images in 0.25 seconds  Throughput  Tasks per second, e.g. Camera A processes 4 images per second  Throughput can be more than latency seems to imply due to concurrency, e.g. Camera B may process 8 images per second (by capturing a new image while previous image is being stored).  Speedup of B over S = B’s performance / A’s performance  Throughput speedup = 8/4 = 2 12
  • 13. Three key embedded system technologies  Technology  A manner of accomplishing a task, especially using technical processes, methods, or knowledge  Three key technologies for embedded systems  Processor technology  IC technology  Design technology 13
  • 14. Processor technology  The architecture of the computation engine used to implement a system’s desired functionality  Processor does not have to be programmable  “Processor” not equal to general-purpose processor 14 Application-specific Registers Custom ALU Datapath Controller Program memory Assembly code for: total = 0 for i =1 to … Control logic and State register Data memory IR PC Single-purpose (“hardware”) Datapath Controller Control logic State register Data memory index total + IR PC Register file General ALU Datapath Controller Program memory Assembly code for: total = 0 for i =1 to … Control logic and State register Data memory General-purpose (“software”)
  • 15. Processor technology  Processors vary in their customization for the problem at hand 15 total = 0 for i = 1 to N loop total += M[i] end loop General- purpose processor Single- purpose processor Application-specific processor Desired functionality
  • 16. General-purpose processors  Programmable device used in a variety of applications  Also known as “microprocessor”  Features  Program memory  General datapath with large register file and general ALU  User benefits  Low time-to-market and NRE costs  High flexibility  “Pentium” the most well-known, but there are hundreds of others 16 IR PC Register file General ALU Datapath Controller Program memory Assembly code for: total = 0 for i =1 to … Control logic and State register Data memory
  • 17. Single-purpose processors  Digital circuit designed to execute exactly one program  a.k.a. coprocessor, accelerator or peripheral  Features  Contains only the components needed to execute a single program  No program memory  Benefits  Fast  Low power  Small size 17 Datapath Controller Control logic State register Data memory index total +
  • 18. Application-specific processors • Programmable processor optimized for a particular class of applications having common characteristics – Compromise between general-purpose and single-purpose processors • Features – Program memory – Optimized datapath – Special functional units • Benefits – Some flexibility, good performance, size and power 18 IR PC Registers Custom ALU Datapath Controller Program memory Assembly code for: total = 0 for i =1 to … Control logic and State register Data memory
  • 19. Architectures  We must be clear about the architecture that we are going to use for design of ES  It has also got a wide variety of choices, to be chosen according to the given application.  The choices are as follows  Application-specific Architecture :- - Controller Architecture - Datapath Architecture - Finite state machine with datapath  General Purpose Architecture :- - CISC - RISC - Vector machine - VLIW ( Very Long Instruction Word Computer )
  • 20. Need for RTOS in Embedded systems  Meeting deadlines  Deterministic behavior  Physical and memory size  Prioritized tasks  Minimum interrupt latency  Watchdog timer & vectored interrupt  Small footprint  Reliable system