Digital signal processors
- 1. DIGITAL SIGNAL PROCESSORS -PREM RANJAN 14ESP003
- 2. OVERVIEW 1. Genaral purpose digital signal processors 2. Special purpose digital signal processors
- 3. OVERVIEW 1. Genaral purpose digital signal processors 1. High speed microprocessor 2. Architechture & Instruction sets optimized for DSP operations 1. Fixed point processors ( TMS320C5x, TMS320C54x, DSP563x) 2. Floating point processors (TMS320C4x, TMS320C67xx) 3. Analog devices (ADSP21xx)
- 4. OVERVIEW 1. Genaral purpose digital signal processors 2. Special purpose digital signal processors 1. H/W designed for specific DSP algorithms such as FFT. 2. H/W designed for specific DSP applications such as PCM & filtering. 1. Mitel’s multi channel telephony voice echo canceller (MT93001) 2. FFT processor (PDSP 16515A, TM-44, TM-66) 3. Programmable FIR filter (UDSP 16256, Model3092)
- 5. NEED OF DIGITAL SIGNAL PROCESSOR
- 7. THE TMS320C3X • First Texas Instruments 32-bit floating point digital signal processors. • It is : • Easy-to-use architecture • High performance • Applications: • It has Independent multiplier and ALU to offer upto 60 million floating-point operations per second (MFLOPS) • It has upto 30 MIPS. • Total memory space is 16 million 32- bit words. • Automotive applications • Digital audio • Industrial automation & control • Data communication • Office equipments like copiers, laser printers, etc.
- 8. THE TMS320C4X • 32-bit floating point digital signal processors optimized for parallel processing. • It is : • DMS controller with upto 6 com ports • High performance • On chip analysis module that supports h/w breakpoints for parallel processing dev & debugging • Applications: • 3-D graphics • Image processing • Networking • Telecommunication base station
- 9. THE TMS320C5X • Accepts source code from the ‘C1x, ‘C2x and ‘C2xx generations. • It is : • Faster cycle times • On chip memories • A Parallel Logic Unit (PLU) • Zero overhead context switching • Block repeats differentiate the ‘C5x • It has also an ANSI C compiler designed for the ‘C5x, which translates the widely used ANSI C language directly into highly optimized assembly language for the ‘C5x.
- 10. THE TMS320C55X • 16-bit fixed-point packaged DSP processor. • It can execute upto 2 instructions in parallel (instruction width 8 – 48 bits) • Interfaces directly to SDRAM • Used where large memory buffers are needed • Application: • Digital cameras • CD-ROM • Audio players
- 11. THE TMS320C62XX • Fixed-point DSP processor. • It is based on VLIW architecture • For example: • TMS320C62xx works at 200MHz with 1.8V core supply • It executes upto 400 millions MACs per second.
- 12. VON NEUMANN ARCHITECTURE • Proposed by John Von Neumann • Also known as the Von Neumann model and Princeton architecture • Program instructions stored in ROM • Both read/write of data and reading of instructions can’t be performed simultaneously
- 13. VON NEUMANN ARCHITECTURE Single System Bus
- 16. MODIFIED/SUPER HARVARD ARCHITECTURE (SHARC®)
- 17. VERY LONG INSTRUCTION WORD ARCHITECTURE
- 18. VERY LONG INSTRUCTION WORD ARCHITECTURE • Advantages • Increased performance • Better compiler targets • Potentially easier to program • Potentially scalable • Can add more execution units, allow more instructions to be packed into VLIW instruction. • Disadvantages • New kind of programmer/compiler complexity • Program must keep track of instruction scheduling • Increased memory use • High power consumption • Misleading MIPS ratings