FPGA Based Speed Control of BLDC Motor

Field Programmable Gate Array Based Speed Control of BLDC
Motor
Rajesh M Pindoriya
Indian Institute of Technology
Mandi (IIT Mandi)
S Rajendran
Indian Institute of Technology
Gandhinagar (IITGn)
Dr. P J Chauhan
Marwadi Education Foundation’s
Group of Institutes, Rajkot, India
Co - Authors,
1

Motivation and Objective
Basic Understanding about Project work
Introduction : Electrical Drives System
Introduction: BLDC Motor
Flow Chart of Controller
Simulink Model of BLDC Motor
Experimental Setup
Conclusion
References
Outline
2

Motivation and Objective
BLDC Motor have higher efficiency and lower maintenance requirement compare to other motors
Conventional motors are not effective and costly
FPGA based controller has more advantages as compared to conventional controller
Motivation
 This paper demonstrates the Field Programmable Gate Arrays (FPGAs) of design methodologies
with a focus on motor drives applications
 This work presents FPGAs implementation for PWM based speed control of inverter-fed BLDC
motor
 The proposed methodology is first simulated for open loop and closed loop speed control. These
simulation results are further verified through lab scale experimental set up
 It has been observed that FPGAs based closed loop method improves the transient and steady state
response in speed control of BLDC motor
Objective
3

Basic Understanding about Project work
3- Inverter
BLDC Motor
3- Inverter fed BLDC Motor
Speed Controller
(Classical/Modern)
dcI
Actual
speed
Reference
speed
Controlled
gate pulses
Rotorposition
sensor
4

Electrical
source
Power processing unit Motor
SensorController
Load
Reference
signal
Electrical
Drives
Introduction : Electrical Drives System
5

BLDC Motor Control Applications
AC, DC
and
Universal
Motors
Transition to
BLDC
Motor
As consumers demand
more energy efficient
products, more BLDC
motors are being used
6

BLDC motor is a novel type of DC motor which commutation is done electronically instead of using
brushes
Research shows that the method starts the BLDC motor with large starting torque that can be obtained
by a bipolar drive, and it runs the BLDC motor at high speed that can be driven by unipolar drive[1-3]
Introduction: BLDC Motor
7

PI controller 3 Phase inverter
Commutation logic
GatePulses
Speed control
loop
Theta
Error
signalReference
speed
Flow Chart of Controller
Load
8
Actual
speed

Start
Set value
100 to 4600 RPM
Check hall sensor signals
Reference value & carrier
value
PWM pulses output
3 phase Inverter
BLDC motor
PI output & generate
PWM pulses
Error = (set speed –
actual speed)
PI controller
Actual speed calculateIf open
loop
Compare reference value &
carrier Value
No
Yes
Closed loop
End
Flowchart for Speed Control of
BLDC Motor
9

 In particular, the rapid growth of semiconductor technology in recent years makes single
component logic circuits the design trend
 FPGA development tools are also very powerful now and easy to use
 FPGAs are well-suited for high speed demanding applications
 Designers can develop a fully hardware architecture which is dedicated to the control algorithm to
implement [2]
Pros
 Flexible programming
 Shorter development cycle
 Parallel processing
 Real time software
 Less complicated and more reliable
 Lower design cost
 Fast execution
 High flexibility & stability
 Expectable output
Why Choose FPGA?
10

Speed control in a BLDC motor involves changing the
applied voltage across the motor phases
This can be done using a sensored method based on the
concept of PWM
A common control algorithm for a permanent-magnet
BLDC motor is PWM control
It is based on the assumption of linear relationship
between the phase current and the torque & speed
Speed regulation is achieved by using two levels of duty
cycles; a high duty D(H) and a low duty D(L)[7]
Digital Control System
DVdcVavg 11

Simulink Model of Closed Loop BLDC Motor
12

Waveforms of Back EMFs & Stator Currents of BLDC Motor
 It has been observed back EMFs of BLDC motor is trapezoidal shape and it is constant at
every 60 degree interval
All three phase is 120 degree phase shift to each other
Fig. 1. Back EMFs waveforms when Kp=0.3, Ki=3 Fig. 2. Stator currents of BLDC motor when 𝑲 𝑷= 𝟎. 𝟑, 𝑲𝒊= 𝟑
13

Speed Response with PI Controller
Fig. 3. Speed response when Kp=0.3, Ki= 3
We can control speed (transient)
responses of any motor through
gain value of Kp & Ki [10].
As per the criterion of almost
negligible overshoot and
undershoot time, the optimal gain
value of PI controller is found to
be Kp=0.3 and Ki=3.
How to set gain value of the Kp &
Ki parameters???.
Mostly two methods are used for
setting parameter,
(1) Trial & Error
(2) Ziegler Nichols
14

Terminal voltage Volts 310
Rated current Amps 4.52
No. of Poles 4
Rated torque N*m 2.2
Resistance Ohms 3.07
Inductance mH 6.57
Rotor inertia kg*m 1.4-1.8
IPM Module PEC16D5M01
Spartan 3A Kit FPGA
Voltage Constant Volts 5
Torque Constant N*m 0.49
Auto Transformer
Current Rating
Amps 4
Experimental Parameters
Sensor Clockwise Direction
H
A
H
B
H
C
S 1 S 2 S 3 S 4 S 5 S 6
0 0 1 0 0 0 1 1 0
0 1 0 1 0 0 0 0 1
0 1 1 1 0 0 1 0 0
1 0 0 0 1 1 0 0 0
1 1 0 0 0 1 0 1 0
1 1 1 0 0 1 0 0 1
Table I Experimental parameters Table II Clockwise sensor and drive
15

Experimental Setup
16
Fig. A. Experimental setup Fig. B. Demonstrate of Experimental setup

PWM Waveforms on DSO
Fig.5. PWM waveforms on DSO Fig.6. PWM waveforms on DSO
17

Speed Response of Open Loop BLDC Motor
Fig. 7. Rotor speed of 1173 RPM at duty cycle of 28%
(forward to reverse)
Fig. 8. Rotor speed of 2065 RPM at duty cycle of 50%
(reverse to forward)
18

Speed Response of Closed Loop
.
Fig.9. Set speed 1000 PRM & actual speed 993 RPM
(reverse to forward)
Closed loop method for speed control of BLDC motor is best comparing to open loop method
In this method speed control according to our reference speed value
In this diagram set (reference) value is 1000 RPM and actual value of speed is 993 RPM
Fig. 10. set speed (1000 RPM) & Actual (981 RPM)
(forward to reverse)
19

Sr. No Duty cycle (%)
(Open loop)
Speed (RPM)
(Open loop)
Reference speed
(Closed loop)
Actual speed
(Closed loop)
1 30 300 550 553
2 40 700 1000 993
3 50 1500 2002 2002
4 60 1950 2500 2542
5 70 2550 3000 3005
Speed have been control of BLDC motor in both direction, one is forward and reverse
direction
As well as we can apply break operation in within a few second, so it has been simple to
control speed of BLDC Motor using FPGA platform
Summary of The Experimental Results
20

Conclusion
This paper work demonstrates the use of an efficient and lower cost controller based on FPGAs
programming to control the speed of BLDC motor
The advantages of digital hardware are - very high speed and easily adjusted to comply with
software
The use of FPGAs in digital control can be easily adapted to analog control
 The simulation results and that verified through experiments have demonstrated the effectiveness
of PWM technique for speed control of BLDC motor and its practical applications
 Using FPGA platform any drives are easily controlled, least time consuming, real time control
action, parallel processing and transient response is good compare to microcontroller
21

1. E. Monmasson, M. N. Cirstea, “FPGA Design Methodology for Industrial Control System- A
Review,” IEEE Trans. On Indus. Electron., vol.54, no. 4, pp. 1824-1842, Aug.2007.
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associated software tools,” IEEE Trans. Circuits and Systems, vol. 28, no. 7, pp. 618–634, Jul. 1981.
3. E. Monmasson, L. Idkhajine, I. Bahri, M. W. Naouar, and L. Charaabi, “Design methodology and
FPGAs-based controllers for empower electronics and drive applications,” in Proc. ICIEA’2010 Conf.,
Taichung, Taiwan, pp. 2328–2338, 2010.
4. Y. Y. Tzou and H. J. Hsu, “FPGAs realization of space-vector PWM control IC for three-phase PWM
inverters,” IEEE Trans. Power Electron., vol. 12, no. 6, pp. 953–963, Nov. 1997.
5. S. J. Ovaska and O. Vainio, “Evolutionary- programming-based op-timization of reduced-rank
adaptive ﬁlters for reference generation in active power ﬁlters,” IEEE Trans. Ind. Electron., vol. 51,
no. 4, pp. 910–916, Aug. 2004.
6. E. Monmasson, L. Idkhajine, M. N. Cirstea, I. Bahri, A. Tisan, and M. W. Naouar “FPGAs in
Industrial Control Applicalication” IEEE Trans. on Ind. Informatics, vol. 7, no. 2, pp. 224-243, May
2011.
References
22

7. E. Monmasson, M. W. Naouar, and L. Idkhajine, “FPGAs-based controllers for power electronics and
drive applications,” IEEE Ind. Electron. Mag., vol. 5, no. 1, pp. 1–13, Mar. 2011.
8. 8. J. J. Rodriguez-Andina, M. J. Moure, and M. D. Valdes, “Features, design tools, and application
domains of FPGAs,” IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 1810–1823, Aug. 2007.
9. J. W. Dixon and I. A. Leal, “Current Control Strategy for Brushless DC Motors Based on a Common
DC Signal”, IEEE Trans. on Power Electronics, vol. 17, no. 2, Mar. 2002.
10. G. J. Silva, A. Datta, and S. P. Bhattacharyya, “New results on the synthesis of PID controller” IEEE
Trans. on Automatic Control, vol. 47, no. 2, Feb. 2002.
11. A. Sathyan,, N. Milivojevic, Y. J. Lee, M. Krishnamurthy, and A. Emadi, “An FPGA-Based Novel
Digital PWM Control Scheme for BLDC Motor Drives” IEEE Trans. on Ind. Electron., vol. 56, no. 8,
Aug. 2009.
23

FPGA Based Speed Control of BLDC Motor

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