Lecture_about spm and related issues 3_COAL.pptx
- 1. Computer Organization and Assembly Language Lecture 03: Registers and its types. Instructor: Engr. Ab.Jalil Dilawar Email: officialjalil.afghan@gmail.com NANGARHAR UNIVERSITY
- 2. Registers • In computer architecture, a processor register is a quickly accessible location available to a computer’s central processing unit (CPU). • Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. • Registers are normally measured by the number of bits they can hold, for example, an “8-bit register”, “32-bit register” or a “64-bit register”.
- 3. Types of Registers in the 8086 Microprocessor • In the 8086 processor , the registers are categorized into mainly four types: 1. General Purpose Registers 2. Segment Registers 3. Pointers and Index Registers 4. Flag or Status Register
- 4. General Purpose Registers • General Purpose Registers are a kind of registers which can store both data and addresses. • All general registers of the Intel 8086 microprocessor can be used for arithmetic and logic operations and data movement. • Each of them is further divided into two subparts of 8-bit length each: one high, which stores the higher-order bits and another low which stores the lower order bits • Can be accessed as either 32, 16 or 8 bits EAX, AX, AH, AL
- 7. Accumulator Register • AX – There is a central register in every processor called accumulator register. – The word size of a processor is defined by the width of its accumulator register, i.e., A 32-bit processor has an accumulator register of 32 bits, – Preferred register to use in arithmetic and logic operations. – Must also be used in I/O operations. – For example, in multiplication operation, one operand is stored in EAX or AX or AL register according to the size of the operand.
- 8. Base and Counter Register • BX – Base Register – Also serves as an address register – It is used to hold the address of data. The BX register can also perform arithmetic and data movement • CX – Count register – Used as a loop counter – Used in shift and rotate operations
- 9. Data Register • DX – Data register – It holds the data for output. – Also used in I/O operations
- 10. Segment Registers • Segment registers hold the base value of different segments like Code Segment, Data Segment etc. • There are 4 segment registers in 8086 Microprocessor and each of them is of 16 bit. • The code and instructions are stored inside these different segments.
- 11. Segment Registers • Code Segment (CS) Register: Containing address of all executable instructions (code) in a program. The user cannot modify the content of these registers. Only the microprocessor's compiler can do this. • Data Segment (DS) Register: Containing address of base location for variables. The user can modify the content of the data segment.
- 12. Segment Registers • Stack Segment (SS) Registers: The stack segment register contains the base location of current program stack. • The SS is used to store the information about the memory segment. The operations of the SS are mainly Push and Pop. It works with stack pointer. PUSH: sp= sp -2 and put data POP: Get data and sp =sp+2 SP represents the stack pointer which points the top element on stack
- 13. The Stack • Stack is an area of memory for keeping temporary data. Stack is used by CALL instruction to keep return address for procedure, RET instruction gets this value from the stack PUSH - stores 16 bit value in the stack. POP - gets 16 bit value from the stack. • It is very important to do equal number of PUSHs and POPs, otherwise the stack maybe corrupted and it will be impossible to return to operating system. As you already know we use RET instruction to return to operating system, so when program starts there is a return address in stack (generally it's 0000h).
- 14. Stack • Example 2: Use of stack for exchanging the values. • Example 1
- 15. Segment register • Extra Segment (ES) Register: By default, the control of the compiler remains in the DS where the user can add and modify the instructions. If there is less space in that segment, then ES is used. ES is also used for copying purpose.
- 18. Index Registers There are two index registers: 1) Source Index: • It is used to store an offset address for source operand • The term offset refers to the distance of a variable, label, or instruction from its base segment. • Source Index register works with data segment, SI: DS 2) Destination Index: • It is used to store an offset address for destination operand • Destination Index register works with extra segment, DI:ES • These both registers are used in string movement/manipulation.
- 19. Pointer Registers • Instruction Pointer (IP): The instruction pointer (IP or program counter) usually stores the address of the next instruction that is to be executed. Always work with CS register. CS:IP • Once the instruction is fetched its value is incremented by 1, so it points the address of next instruction. • Also called Program Counter. IP is not under direct control of the programmer
- 20. Pointer Registers Stack Pointer: points at the current top value of the Stack. Always works with SS register. SS:SP Base pointer (BP): • Works with stack segment register BP:SS • Used to access parameters passed to procedures. • Offset address of that parameter is stores in base pointer register. Offset address is the distance from base location.
- 21. Flag Register • The Flag or Status register is a 16-bit register which contains 9 flags, and the remaining 7 bits are idle in this register. • Flag Register is modified automatically by CPU after mathematical operations. • This allows to determine the type of the result, and to determine conditions to transfer control to other parts of the program. Generally you cannot access these registers directly. There are two types of flag register 1) Status flag--6 2) Control flag--3
- 22. Flag register • The size and meanings of the flag bits are architecture dependent. • It usually reflects the result of arithmetic operations as well as information about restrictions placed on the CPU operation at the current time. • As you may see there are 16 bits in this register, each bit is called a flag and can take a value of 1 or 0
- 23. Status FLAG • Status FLAG reflect the result of an operation executed by the processor. • The status flags are set/reset depending on the results of some arithmetic or logical operations during program execution. • condition after either 8-bit or 16-bit operation. 1. Overflow flag 2. Sign flag 3. Zero flag 4. Carry flag 5. Parity flag 6. Auxiliary flag
- 24. Control FLAG • The control FLAG enables or disables certain operations of the processor. • It controls the operations of CPU. 1. Direction flag 2. Interrupt enable flag 3. Trap flag
- 25. Status flag registers 1. Overflow Flag (OF): Overflow Flag is set to 1 when there is a signed overflow (When the result of signed operation is too large to fit in the number of bits to represent it). For example, when you add bytes 100 + 50 (result is not in range -128…127). A condition that can occur when signed numbers are added or subtracted. A overflow condition indicates that a result has exceeded the capacity of the machine. For example, if 7Fh (+127) is added to 01h (+1), the result is 80h (- 128). This result represents an overflow condition indicated by the overflow flag for signed addition. For unsigned operations, ignore the overflow flag.
- 26. Status flag registers 2. Sign Flag (SF): Sign Flag is set to 1 when result is negative. When result is positive it is set to 0. This flag takes the value of the most significant bit. 3. Zero Flag (ZF): Zero Flag (ZF) is set to 1 when result is zero. For non-zero result this flag is set to 0. Example: • MOV AL, 10H • MOV BL, 10H • SUB AL, BL (Zero Flag is set here because the result is zero)
- 27. Status flag registers 5. Parity Flag (PF): Parity Flag is set to 1 when there is even number of one bits in result, and to 0 when there is odd number of one bits. • A parity flag is a check bit that is added to a block of data for error detection purposes. • It is used to verify the integrity of the data. The value of the parity bit is assigned as either 0 or 1. • Making the number of 1s in the message block even or odd depends on the type of parity. For example: Let us say you want to transmit the binary code 1101, which has three ones. With even parity, you would add a parity bit to make the total count of ones even. So, the parity bit would be set to 1, resulting in the code 11011. On the other hand, with odd parity, the parity bit would be set to 0 to make the total count of one's odds, resulting in the code 11010.
- 28. Explanation • If an error occurs during transmission, the parity bit will detect it. • Let us say you transmit the binary code 1101 with a parity bit of 1. However, due to noise or interference, the receiver receives a different code, like 1111. • When the receiver counts the number of ones, including the parity bit, it finds that it is an odd count (five ones in this case). • Since the expected parity bit was 1 (to make the count even), the receiver can conclude that an error has occurred
- 29. Status flag registers 6. Carry Flag (CF); Carry Flag is set to 1 when there is an unsigned overflow. For example when you add bytes 255 + 1 (result is not in range 0…255). • The answer can be 17 bits long when two 16-bit numbers are added or 9 bits long when two 8-bit numbers are added. • This extra bit that does not fit into the destination register is placed in the carry flag, which can be used and tested.
- 30. Control Flag Registers 1. Direction Flag (DF): • Direction Flag is used by some instructions to process data chains, when this flag is set to 0 – the processing is done forward, when this flag is set to 1 the processing is done backward. • The direction flag is a flag that controls the left-to-right or right-to-left direction of string processing • The direction flag (DF) controls the direction of string operations.
- 31. Control Flag Registers 2. Interrupt Enable Flag (IF): • When Interrupt Enable Flag is set to 1 CPU reacts to interrupts from external devices. • This flag is for interrupts. If interrupt flag is set (1), the microprocessor will recognize interrupt requests from the peripherals. If interrupt flag is reset (0), the microprocessor will not recognize any interrupt requests and will ignore them 3. Trap Flag (TF): Trap Flag is used for on-chip debugging. Used to trap errors or bugs. System uses it by default. For debugging it will be 1 if there is any error. if this flag is set, the processor enters the single step execution mode