LF_DPDK17_DPDK's best kept secret – Micro-benchmark performance tests
- 1. DPDK’s Best Kept Secret: Micro-benchmarks M Jay Muthurajan.Jayakumar@intel.com DPDK Summit - San Jose 2017
- 2. 2 Optimization Notice: Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specifc to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specifc instruction sets covered by this notice. Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specifed circumstances and confgurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction. Intel technologies’ features and benefts depend on system confguration and may require enabled hardware, software or servic activation. Performance varies depending on system confguration. No computer system can be absolutely secure. Check with your system manufacturer or retailer or learn more at https://networkbuilders.intel.com/network-technologies/intelselectfasttrackkit. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non- infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps. The products and services described may contain defects or errors known as errata which may cause deviations from published specifications. Current characterized errata are available on request. Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548-4725 or by visiting www.intel.com/design/literature.htm. © 2017 Intel Corporation. Intel, the Intel logo, and Xeon are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. Legal Information
- 3. Agenda u Why should I care about DPDK Micro-benchmarks? u What do they benchmark? u How do I run them?
- 4. Not all slots are made equal Not all slots are made equal ! Ensure that you have plugged in your NIC card in most optimal slot
- 5. How many lcores, you think, are there in this 2 socket server? More than 100 lcores? 96 lcores? 64 lcores?
- 6. 6 CPU 0 CPU 1 Question: What can be Improved here?
- 7. 7 I/O Plugged in CPU1’s Slot How much memory do you see in CPU1 node? ZERO ! CPU 0 CPU 1 CPU 0 has only One Channel memory populated. Improvements -n 4
- 8. In Which Socket lcore # 50 resides? Socket 0 or Socket 1? u Question: u In which socket you think lcore# 50 resides? – socket 0? Or socket 1? u Assume NIC is Plugged in socket 0 u Will the performance be best or sub-optimal? More than 100 lcores Socket 0? Socket 1?
- 9. Why Should I Care About DPDK Micro-benchmarks? u We thought lcore # 50 resides in socket 0. u But actually, you can see it is in socket 1. u So, NIC in socket 0 is actually sub-optimal. u How to quantitatively ensure that system is set for optimal performance?
- 10. QUIZ: Cores Within A Socket – All In Same Loop?
- 11. Demo
- 12. Cores Within A Socket – Not equal proximity
- 13. Prior to application level benchmarking.. u Without tightening these, if you start developing your application… u And on top of that, if you start measuring application level performance u Root cause analysis is made unnecessarily complex u u Instead… what if .. u What if you can do basic benchmarking of key performant elements / ops u You will build strong foundation first u Will help you develop Applications confidently towards overall higher performance
- 14. What Objects, What Operations to benchmark? u In other words, what are the key high performant objects and operations? u Objects: u Ring u Mem pool u Mbuf u Operations: u Mem copy u Hash Operations u Flow Classification
- 15. Test_hash_multiwriter_main( ) Hash – Multi-writer – Transactional Memory
- 16. Tests: Ring, PMD, Table
- 18. Tests: Crypto, Event, Flow Classify
- 19. Mempool
- 20. SPSC MPMC – Time Taken
- 21. Call To Action: Where To Find Them & How It Measures?
- 22. Optimization Notice 22 Optimization Notice Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2®, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804