DIGITAL COMPARATOR
MAGNITUDE COMPARATOR
• The comparison of two numbers is an operation
that determines whether one number is greater
than, less than, or equal to the other number.
• A magnitude comparator is a combinational
circuit that compares two numbers A and B and
determines their relative magnitudes.
• The outcome of the comparison is specified by
three binary variables that indicate whether A <
B, A = B, or A > B.
• On the one hand, the circuit for comparing
two n -bit numbers has 22n
entries in the truth
table and becomes too cumbersome, even
with n = 3.
• On the other hand, as one may suspect, a
comparator circuit possesses a certain amount
of regularity.
• Digital functions that possess an inherent well-
defined regularity can usually be designed by
means of an algorithm—a procedure which
specifies a finite set of steps that, if followed,
give the solution to a problem.
• The algorithm is a direct application of the procedure a
person uses to compare the relative magnitudes of two
numbers.
• Consider two numbers, A and B , with four digits each.
• Write the coefficients of the numbers in descending order of
significance:
A = A3 A2 A1 A0
B = B3 B2 B1 B0
• Each subscripted letter represents one of the digits in the
number.
• The two numbers are equal if all pairs of significant digits are
equal: A3 = B3, A2 = B2, A1 = B1, and A0 = B0.
• When the numbers are binary, the digits are either 1 or 0, and
the equality of each pair of bits can be expressed logically
with an exclusive-NOR function as
xi = AiBi + Ai ‘Bi ‘ for i = 0, 1, 2, 3
• where xi = 1 only if the pair of bits in position i are
equal (i.e., if both are 1 or both are 0).
• The equality of the two numbers A and B is displayed
in a combinational circuit by an output binary variable
that we designate by the symbol (A = B).
• This binary variable is equal to 1 if the input
numbers, A and B , are equal, and is equal to 0
otherwise.
• For equality to exist, all xi variables must be equal to
1, a condition that dictates an AND operation of all
variables:
(A = B) = x3x2x1x0
• The binary variable (A = B) is equal to 1 only if all pairs
• To determine whether A is greater or less than B , we
inspect the relative magnitudes of pairs of significant
digits, starting from the most significant position.
• If the two digits of a pair are equal, we compare the
next lower significant pair of digits.
• The comparison continues until a pair of unequal
digits is reached.
• If the corresponding digit of A is 1 and that of B is 0,
we conclude that A>B.
• If the corresponding digit of A is 0 and that of B is 1,
we have A<B.
• The sequential comparison can be expressed logically
by the two Boolean functions
• The symbols (A > B) and (A < B) are binary
output variables that are equal to 1 when A >
B and A < B, respectively.
• The gate implementation of the three output
variables just derived is simpler than it seems
because it involves a certain amount of
repetition.
• The unequal outputs can use the same gates
that are needed to generate the equal output.
• The logic diagram of the four-bit magnitude
comparator is shown in Figure below.
Magnitude Comparator-DIPLOMA IN ELECTRONICSpptx
• The four x outputs are generated with exclusive-
NOR circuits and are applied to an AND gate to
give the output binary variable (A = B) .
• The other two outputs use the x variables to
generate the Boolean functions listed previously.
• This is a multilevel implementation and has a
regular pattern.
• The procedure for obtaining magnitude
comparator circuits for binary numbers with
more than four bits is obvious from this
example.

More Related Content

PDF
Lecture6 Chapter4- Design Magnitude Comparator Circuit, Introduction to Decod...
PPTX
DLD Lecture No 21 BCD Multiplier and Magnitude Comparator.pptx
PPTX
Lecture-5b - BCD Adder and Carry Propagation, Comparator (2).pptx
DOCX
Computer Architecture_Digital Comparator.docx
PPTX
Magnitude comparator
PDF
Comparators in DLD.
PPTX
Ugc net – digital fundamentals.pptx ugc notes
PPT
combinational-circuit (1).ppt
Lecture6 Chapter4- Design Magnitude Comparator Circuit, Introduction to Decod...
DLD Lecture No 21 BCD Multiplier and Magnitude Comparator.pptx
Lecture-5b - BCD Adder and Carry Propagation, Comparator (2).pptx
Computer Architecture_Digital Comparator.docx
Magnitude comparator
Comparators in DLD.
Ugc net – digital fundamentals.pptx ugc notes
combinational-circuit (1).ppt

Similar to Magnitude Comparator-DIPLOMA IN ELECTRONICSpptx (20)

PDF
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
PPTX
Chapter 5: Cominational Logic with MSI and LSI
PPTX
Digital electronica RSS vvvdmsASmCMmmmmmcdsdvfssc
PPTX
Lecture 18 M - Copy.pptx
PPT
Digital Logic Design
PPSX
2-bit comparator
PDF
Digital Principles and computer Organisation important 2 mark Questions
PPT
Lec 2 digital basics
PDF
Digital Combinational Circuits.pdf
PDF
DLD Chapter-4.pdf
DOC
Digital Comprator
PPT
combinational-circuit (1).ppt
PPTX
B sc cs i bo-de u-iii combitional logic circuit
PPTX
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
PPTX
Digital Electronics - Logic Gates Lectures-2.pptx
PDF
4 bit magnjtude comparators ppt COA project
PPTX
lecture_19.pptx
PPTX
IS 151 Lecture 9
PPTX
Module 1- basics of Digital Electronics .pptx
PPT
Logic System Design KTU Chapter-4.ppt
FYBSC IT Digital Electronics Unit III Chapter II Arithmetic Circuits
Chapter 5: Cominational Logic with MSI and LSI
Digital electronica RSS vvvdmsASmCMmmmmmcdsdvfssc
Lecture 18 M - Copy.pptx
Digital Logic Design
2-bit comparator
Digital Principles and computer Organisation important 2 mark Questions
Lec 2 digital basics
Digital Combinational Circuits.pdf
DLD Chapter-4.pdf
Digital Comprator
combinational-circuit (1).ppt
B sc cs i bo-de u-iii combitional logic circuit
DLD Lecture No 18 Analysis and Design of Combinational Circuit.pptx
Digital Electronics - Logic Gates Lectures-2.pptx
4 bit magnjtude comparators ppt COA project
lecture_19.pptx
IS 151 Lecture 9
Module 1- basics of Digital Electronics .pptx
Logic System Design KTU Chapter-4.ppt
Ad

Recently uploaded (20)

PDF
M.Tech in Aerospace Engineering | BIT Mesra
PDF
Race Reva University – Shaping Future Leaders in Artificial Intelligence
DOCX
Cambridge-Practice-Tests-for-IELTS-12.docx
PDF
FOISHS ANNUAL IMPLEMENTATION PLAN 2025.pdf
PDF
Literature_Review_methods_ BRACU_MKT426 course material
PDF
Civil Department's presentation Your score increases as you pick a category
PDF
plant tissues class 6-7 mcqs chatgpt.pdf
PDF
AI-driven educational solutions for real-life interventions in the Philippine...
PDF
David L Page_DCI Research Study Journey_how Methodology can inform one's prac...
PDF
IP : I ; Unit I : Preformulation Studies
PDF
MICROENCAPSULATION_NDDS_BPHARMACY__SEM VII_PCI Syllabus.pdf
PPTX
Climate Change and Its Global Impact.pptx
PDF
Farming Based Livelihood Systems English Notes
PPTX
Module on health assessment of CHN. pptx
PPTX
Core Concepts of Personalized Learning and Virtual Learning Environments
PDF
Environmental Education MCQ BD2EE - Share Source.pdf
PDF
Τίμαιος είναι φιλοσοφικός διάλογος του Πλάτωνα
PPTX
MICROPARA INTRODUCTION XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
PDF
CISA (Certified Information Systems Auditor) Domain-Wise Summary.pdf
PDF
LIFE & LIVING TRILOGY - PART - (2) THE PURPOSE OF LIFE.pdf
M.Tech in Aerospace Engineering | BIT Mesra
Race Reva University – Shaping Future Leaders in Artificial Intelligence
Cambridge-Practice-Tests-for-IELTS-12.docx
FOISHS ANNUAL IMPLEMENTATION PLAN 2025.pdf
Literature_Review_methods_ BRACU_MKT426 course material
Civil Department's presentation Your score increases as you pick a category
plant tissues class 6-7 mcqs chatgpt.pdf
AI-driven educational solutions for real-life interventions in the Philippine...
David L Page_DCI Research Study Journey_how Methodology can inform one's prac...
IP : I ; Unit I : Preformulation Studies
MICROENCAPSULATION_NDDS_BPHARMACY__SEM VII_PCI Syllabus.pdf
Climate Change and Its Global Impact.pptx
Farming Based Livelihood Systems English Notes
Module on health assessment of CHN. pptx
Core Concepts of Personalized Learning and Virtual Learning Environments
Environmental Education MCQ BD2EE - Share Source.pdf
Τίμαιος είναι φιλοσοφικός διάλογος του Πλάτωνα
MICROPARA INTRODUCTION XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
CISA (Certified Information Systems Auditor) Domain-Wise Summary.pdf
LIFE & LIVING TRILOGY - PART - (2) THE PURPOSE OF LIFE.pdf
Ad

Magnitude Comparator-DIPLOMA IN ELECTRONICSpptx

  • 2. MAGNITUDE COMPARATOR • The comparison of two numbers is an operation that determines whether one number is greater than, less than, or equal to the other number. • A magnitude comparator is a combinational circuit that compares two numbers A and B and determines their relative magnitudes. • The outcome of the comparison is specified by three binary variables that indicate whether A < B, A = B, or A > B.
  • 3. • On the one hand, the circuit for comparing two n -bit numbers has 22n entries in the truth table and becomes too cumbersome, even with n = 3. • On the other hand, as one may suspect, a comparator circuit possesses a certain amount of regularity. • Digital functions that possess an inherent well- defined regularity can usually be designed by means of an algorithm—a procedure which specifies a finite set of steps that, if followed, give the solution to a problem.
  • 4. • The algorithm is a direct application of the procedure a person uses to compare the relative magnitudes of two numbers. • Consider two numbers, A and B , with four digits each. • Write the coefficients of the numbers in descending order of significance: A = A3 A2 A1 A0 B = B3 B2 B1 B0 • Each subscripted letter represents one of the digits in the number. • The two numbers are equal if all pairs of significant digits are equal: A3 = B3, A2 = B2, A1 = B1, and A0 = B0. • When the numbers are binary, the digits are either 1 or 0, and the equality of each pair of bits can be expressed logically with an exclusive-NOR function as
  • 5. xi = AiBi + Ai ‘Bi ‘ for i = 0, 1, 2, 3 • where xi = 1 only if the pair of bits in position i are equal (i.e., if both are 1 or both are 0). • The equality of the two numbers A and B is displayed in a combinational circuit by an output binary variable that we designate by the symbol (A = B). • This binary variable is equal to 1 if the input numbers, A and B , are equal, and is equal to 0 otherwise. • For equality to exist, all xi variables must be equal to 1, a condition that dictates an AND operation of all variables: (A = B) = x3x2x1x0 • The binary variable (A = B) is equal to 1 only if all pairs
  • 6. • To determine whether A is greater or less than B , we inspect the relative magnitudes of pairs of significant digits, starting from the most significant position. • If the two digits of a pair are equal, we compare the next lower significant pair of digits. • The comparison continues until a pair of unequal digits is reached. • If the corresponding digit of A is 1 and that of B is 0, we conclude that A>B. • If the corresponding digit of A is 0 and that of B is 1, we have A<B. • The sequential comparison can be expressed logically by the two Boolean functions
  • 7. • The symbols (A > B) and (A < B) are binary output variables that are equal to 1 when A > B and A < B, respectively. • The gate implementation of the three output variables just derived is simpler than it seems because it involves a certain amount of repetition. • The unequal outputs can use the same gates that are needed to generate the equal output. • The logic diagram of the four-bit magnitude comparator is shown in Figure below.
  • 9. • The four x outputs are generated with exclusive- NOR circuits and are applied to an AND gate to give the output binary variable (A = B) . • The other two outputs use the x variables to generate the Boolean functions listed previously. • This is a multilevel implementation and has a regular pattern. • The procedure for obtaining magnitude comparator circuits for binary numbers with more than four bits is obvious from this example.