Microprocessor 8086

MICROPROCESSOR &
ASSEMBLY LANGUAGE
PROGRAMMING
CLASS ASSIGNMENT

Introduction to Microprocessor
A) Intel 4004:
The world’s first microprocessor, the Intel 4004, was a 4-bit microprocessor–programmable controller on a chip.
B) Intel 8008:
An extended 8-bit version of the 4004 microprocessors. The 8008 addressed an expanded memory size (16K bytes) and
contained additional instructions (a total of 48).
C) Intel 8080:
The 8080 address more memory and execute additional instructions, but it executed them 10 times faster than the 8008.
An addition that took 20 μs (50,000 instructions per second) on an 8008-based system required only 2.0 μs (500,000
instructions per second) on an 8080-based system

Introduction to Microprocessor
D) Intel 8085:
The 8085 was to be the last 8-bit, general-purpose microprocessor developed by Intel. Although only slightly more
advanced than an 8080 microprocessor, the 8085 executed software at an even higher speed. An addition that took 2.0
μs (500,000 instructions per second on the 8080) required only 1.3 μs (769,230 instructions per second) on the 8085.

Difference b/w 8086 & 8088
Sr. No. Key 8086 8088
1 Data and Address
Bus
In case of 8086 MPU
the data bus is of 16
bits and the address
bus is of 20 bits.
On other hand in 8088 MPU the data bus
is of 8 bits and the address bus is of 20
bits.
2 Processing 8086 has 3 available
clock speeds (5 MHz,
8 MHz (8086-2) and
10 MHz (8086-1)).
On other hand in case of 8088 has 2
available clock speeds (5 MHz, 8 MHz)
3 Memory capacity 8086 has the
memory capacity of
512 kB.
On other hand in case of 8088 memory
capacity is implemented as a single 1 MX
8 memory banks.
4 Signal Type 8086 has memory
control pin (M/IO)
signal.
On other hand in case of 8088 it has
complemented memory control pin (IO/M)
signal of 8086.
5 Current Supply 8086 draws a
maximum supply
current of 360 mA.
On other hand 8088 draws a maximum
supply current of 340 mA.

Pin Configuration
A15 – A8:
These lines contain address bits A15–A8 whenever ALE is a logic 1, and data bus connections D15–D8 when ALE is a logic 0.
R
͞ D:
Whenever the read signal is a logic 0, the data bus is receptive to data from the memory or I/O devices connected to the system.
READY:
If the READY pin is placed at a logic 0 level, the microprocessor enters into wait states and remains idle. If the READY pin is placed at a logic 1
level, it has no effect on the operation of the microprocessor.
INTR:
Interrupt request is used to request a hardware interrupt. If INTR is held high when IF = 1

Pin Configuration
T
͞ E
͞ S
͞ T:
If T
͞ ES
͞ T is a logic 0, the WAIT instruction functions as an NOP and if T
͞ ES
͞ T is a logic 1, the WAIT instruction waits for T
͞ ES
͞ T to become a
logic 0.
NMI:
Non-Makeable Interrupt, If Occur, all work will stop & do work on interruption.
RESET:
The reset input causes the microprocessor to reset itself if this pin is held high for a minimum of four clocking periods.
CLK:
The clock pin provides the basic timing signal to the microprocessor. The clock signal must have a duty cycle of 33 %

Pin Configuration
VCC:
This power supply input provides a +5.0 V, ±10 % signal to the microprocessor
GND:
The ground connection is the return for the power supply. Note that the 8086/8088 microprocessors have two pins labeled
GND—both must be connected to ground for proper operation.
D
͞ E
͞ N:
If any digital processor/IC pin has bar is active low, enable from 0 & Disable from 1.
D
͞ E
͞ N=0, Data is Available
D
͞ E
͞ N=1, Data isn’t Available

Pin Configuration
W
͞ R:
During the time that there is a logic 0, & vice versa.
Hold:
The hold input requests a direct memory access (DMA). If the HOLD signal is a logic 1, the microprocessor stops executing
software and places its address, data, and control bus at the high-impedance state. If the HOLD pin is a logic 0, the
microprocessor executes software normally
HLDA:
The status line is equivalent to the S0 pin in maximum mode operation of the microprocessor. This signal is combined with IO/
and DT/ to decode the function of the current bus cycle.
I
͞ N
͞ T
͞ A:
The interrupt acknowledge signal is a response to the INTR input pin. The pin is normally used to gate the interrupt vector
number onto the data bus in response to an interrupt request.

Pin Configuration
DT/R
͞ :
The data transmit/receive signal shows that the microprocessor data bus is transmitting (DT/R ) or receiving (DT/ ) data. This
signal is used to enable external data bus buffers.
MN/M
͞ X:
MN: +SV and MX: ground (Max: 1 and Min: 0)
B
͞ H
͞ E:
The bus high enable pin is used in the 8086 to enable the most-significant data bus bits (D15–D8) during a read or a write
operation. The state of S7 is always a logic 1.
ALE:
Address latch enable shows that the 8086/8088 address/data bus contains address information. This address can be a
memory address or an I/O port number. Note that the ALE signal does not float during a hold acknowledge.

Intel Registers
Source Index:
RSI is used as RSI, ESI, or SI. The source index register often addresses source string data for the string instructions. Like
RDI, RSI also functions as a general-purpose register. As a 16-bit register, it is addressed as SI; as a 32-bit register, it is
addressed as ESI; and as a 64-bit register, it is addressed as RSI.
Destination Index:
RDI, which is addressable as RDI, EDI, or DI, often addresses string destination data for the string instructions.
Instruction Pointer:
This register is IP (16 bits) when the microprocessor operates in the real mode and EIP (32 bits) when the 80386 and
above operate in the protected mode. Note that the 8086, 8088, and 80286 do not contain an EIP register and only the
80286 and above operate in the protected mode.

Intel Registers
Stack Pointer:
The stack memory stores data through this pointer and is explained later in the text with the instructions that address
stack data. This register is referred to as SP if used as a 16-bit register and ESP if referred to as a 32-bit register.
Base Pointer:
RBP, which is addressable as RBP, EBP, or BP, points to a memory location in all versions of the microprocessor for
memory data transfers.
Flag Registers:
Carry:
Carry holds the carry after addition or the borrow after subtraction. The carry flag also indicates error conditions, as
dictated by some programs and procedures. This is especially true of the DOS function calls.

Intel Registers
Parity:
Parity is a logic 0 for odd parity and a logic 1 for even parity. Parity is the count of ones in a number expressed as even or
odd. For example, if a number contains three binary one bits, it has odd parity. If a number contains no one bits, it has
even parity.
Auxiliary Flag:
The auxiliary carry holds the carry (half-carry) after addition or the borrow after subtraction between bit positions 3 and
4 of the result. This highly specialized flag bit is tested by the DAA and DAS instructions to adjust the value of AL after a
BCD addition or subtraction. Otherwise, the A flag bit is not used by the microprocessor or any other instructions.
Sign:
The sign flag holds the arithmetic sign of the result after an arithmetic or logic instruction executes. If, the sign bit
(leftmost bit of a number) is set or negative; if , the sign bit is cleared or positive.

Intel Registers
Trap:
The trap flag enables trapping through an on-chip debugging feature. (A program is debugged to find an error or bug.) If
the T flag is enabled (1), the microprocessor interrupts the flow of the program on conditions as indicated by the debug
registers and control registers. If the T flag is a logic 0, the trapping (debugging) feature is disabled. The Visual C++
debugging tool uses the trap feature and debug registers to debug faulty software.
Interrupt:
The interrupt flag controls the operation of the INTR (interrupt request) input pin. If, the INTR pin is enabled; if, the INTR
pin is disabled. The state of the I flag bit is controlled by the STI (set I flag) and CLI (clear I flag) instructions.

Intel Registers
Direction:
The direction flag selects either the increment or decrement mode for the DI and/or SI registers during string
instructions. If, the registers are automatically decremented; if, the registers are automatically incremented. The D flag is
set with the STD (set direction) and cleared with the CLD (clear direction) instructions.
Overflow:
Overflows occur when signed numbers are added or subtracted. An overflow indicates that the result has exceeded the
capacity of the machine. For example, if 7FH () is added—using an 8-bit addition—to 01H (), the result is 80H (–128). This
result represents an overflow condition indicated by the overflow flag for signed addition. For unsigned operations, the
overflow flag is ignored.

Addressing Mode
Data Addressing:
Because the MOV instruction is a very common and flexible instruction, it provides a basis for the explanation of the data-
addressing modes. Illustrates the MOV instruction and defines the direction of data flow. The source is to the right and the
destination is to the left, next to the opcode MOV.
Register Addressing:
Register addressing is the most common form of data addressing and, once the register names are learned, is the easiest to
apply. The microprocessor contains the following 8-bit register names used with register addressing: AH, AL, BH, BL, CH, CL,
DH, and DL. Also present are the following 16-bit register names: AX, BX, CX, DX, SP, BP, SI, and DI. It is important for
instructions to use registers that are the same size. Never mix an 8-bit register with a 16-bit register, an 8-bit register with a 32-
bit register, or a l6-bit register with a 32-bit register because this is not allowed by the microprocessor and results in an error
when assembled.

Addressing Mode
Immediate Addressing:
Another data-addressing mode is immediate addressing. The term immediate implies that the data immediately follow the hexadecimal
opcode in the memory. Also note that immediate data are constant data, whereas the data transferred from a register or memory
location are variable data. The operation of a MOV EAX,13456H instruction. This instruction copies the 13456H from the instruction,
located in the memory immediately following the hexadecimal opcode, into register EAX. As with the MOV instruction illustrated in, the
source data overwrites the destination data.
Direct Data Addressing:
Most instructions can use the direct data-addressing mode. In fact, direct data addressing is applied to many instructions in a typical
program. There are two basic forms of direct data addressing:
(1) direct addressing, which applies to a MOV between a memory location and AL, AX, or EAX
(2) displacement addressing, which applies to almost any instruction in the instruction set.

Addressing Mode
Register Direct Addressing:
Register indirect addressing allows data to be addressed at any memory location through an offset address held in any of the following
registers: BP, BX, DI, and SI. For example, if register BX contains 1000H and the MOV AX, [BX] instruction executes, the word contents of
data segment offset address 1000H are copied into register AX.

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2021

Microprocessor 8086

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