8086 microprocessor

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KARPAGAM INSTITUTE OF TECHNOLOGY,
COIMBATORE - 105
Department of ECE
Course code with Name: EC8691/ Microprocessors and Microcontrollers
Staff Name/ Designation: Veera Boopathy.E / Assistant Professor, ECE
Department: CSE
Year/Semester: III/05

UNIT I THE 8086 MICROPROCESSOR
Introduction to 8086 – Microprocessor architecture – Addressing modes - Instruction set and assembler directives –
Assembly language programming – Modular Programming - Linking and Relocation - Stacks - Procedures – Macros –
Interrupts and interrupt service routines – Byte and String Manipulation.
UNIT II 8086 SYSTEM BUS STRUCTURE
8086 signals – Basic configurations – System bus timing –System design using 8086 – I/O programming – Introduction
to Multiprogramming – System Bus Structure – Multiprocessor configurations – Coprocessor, Closely coupled and
loosely Coupled configurations – Introduction to advanced processors.
UNIT III I/O INTERFACING
Memory Interfacing and I/O interfacing - Parallel communication interface – Serial communication interface – D/A and
A/D Interface - Timer – Keyboard /display controller – Interrupt controller –DMA controller – Programming and
applications Case studies: Traffic Light control, LED display , LCD display, Keyboard display interface and Alarm
Controller.
UNIT IV MICROCONTROLLER
Architecture of 8051 – Special Function Registers(SFRs) - I/O Pins Ports and Circuits - Instruction set - Addressing
modes - Assembly language programming.
UNIT V INTERFACING MICROCONTROLLER
Programming 8051 Timers - Serial Port Programming - Interrupts Programming – LCD & Keyboard Interfacing - ADC,
DAC & Sensor Interfacing - External Memory Interface- Stepper Motor and Waveform generation - Comparison of
Microprocessor, Microcontroller, PIC and ARM processors
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Introduction to 8086 – Microprocessor
architecture – Addressing modes - Instruction
set and assembler directives – Assembly
language programming – Modular
Programming - Linking and Relocation - Stacks
- Procedures – Macros – Interrupts and
interrupt service routines – Byte and String
Manipulation.

 Microprocessor is a multipurpose,
programmable, clock-driven, register based
electronic device that reads binary
information from storage device called
memory, accepts instructions and provides
result as output.
 It computes data operations within
microseconds.

 Intel Corporation launched first μP
 In 1971 – 4004 – 4 bit μP
 In 1971 – 8008 – 8 bit μP
 Intel launched advanced μP to overcome pervious version
disadvantages.
 8080 (8 bit)
 8085 (8 bit)
 8086 (16 bit)
 80186 (16 bit)
 80286 (16 bit)
 80386 (32 bit)
 80486 (16 bit)
 80586P5 (32 bit)
 Dual Core (64 bit)
 Core 2 Duo (64 bit)
 Core i3 (64 bit)
Lag in design and
performance

 A microprocessor is identified by
› Data lines
› Address lines
 Data Line
› Amount of data bits carried
› Type of microprocessor
 Address Line
› Amount of memory space present (2k)
 Example:
 8086 has 16 bit data lines – 16 bit μP
 8086 has 20 bit address lines – 220=1048576 (1 MB)

i. 8086 – 16 bit μP
ii. 8086 – 16 bit data bus
iii. 8086 – 20 bit address bus {220=1048576 (1 MB)}
iv. 8086 generate 16 bit I/O address. Hence access 216=65536
I/O ports at a time.
v. 8086 has fourteen 16-bit registers.
vi. Address and data buses are multiplexed. Thus reduces
pins but slow data transfer.
vii. 8086 requires one phase clock with 33% duty cycle.

viii. 8086 perform bit, byte, word and block operations.
ix. 8086 operates in two different modes:
› Minimum mode
› Maximum mode
x. 8086 supports multiprogramming.
xi. 8086 fetch upto 6 instructions from memory at a same
time and execute using pipeling.
xii. 8086 provides powerful instructions

AH AL
BH BL
CH CL
DH DL
STACK POINTER (SP)
BASE POINTER (BP)
SOURCE INDEX (SI)
DESTINATION INDEX (DI)
EXTRA SEGMENT (ES)
CODE SEGMENT (CS)
STACK SEGMENT (SS)
DATA SEGMENT (DS)
INSTRUCTION POINTER (IP)
6 5 4 3 2 1
CONTROL
SYSTEM
ARITHMETIC
LOGIC UNIT
FLAGS
Instruction Queue
OPERANDS
∑
Memory
Interface
EU
BIU
Instruction
Decoder
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 8086 is internally divided into two
units.
› Bus Interface Unit (BIU)
› Execution Unit (EU)
 BIU and EU works simultaneously.
 Hence instruction processing time
reduced

Sends out addresses for memory locations
Fetches Instructions from memory
Reads/Writes data to memory
Sends out addresses for I/O ports
Reads/Writes data to Input/Output ports
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Main Components are
Instruction Queue
Segment Registers
Instruction Pointer
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 8086 employs parallel processing
 When EU is busy decoding or executing current instruction, the buses of
8086 may not be in use.
 At that time, BIU can use buses to fetch upto six instruction bytes for the
following instructions
 BIU stores these pre-fetched bytes in a FIFO register called Instruction
Queue
 When EU is ready for its next instruction, it simply reads the instruction from
the queue in BIU
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EU of 8086 does not have to wait in between for BIU to
fetch next instruction byte from memory
So the presence of a queue in 8086 speeds up the
processing
Fetching the next instruction while the current instruction
executes is called pipelining 16

Tells BIU (addresses) where to fetch
instructions or data
Decodes & Executes instructions
Dividing the work between BIU & EU speeds
up processing
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Main components are
› Instruction Decoder
› Control System
› Arithmetic Logic Unit
› General Purpose Registers
› Flag Register
› Pointer & Index registers
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 Translates instructions fetched from memory into a
series of actions which EU carries out
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Control System
 Generates timing and control signals to perform the
internal operations of the microprocessor
Arithmetic Logic Unit
 EU has a 16-bit ALU which can ADD, SUBTRACT, AND,
OR, increment, decrement, complement or shift binary
numbers

 EU has 8 general purpose
registers
 Can be individually used for
storing 8-bit data
 AL register is also called
Accumulator
 Two registers can also be
combined to form 16-bit
registers
 The valid register pairs are –
AX, BX, CX, DX 20
AH AL
BH BL
CH CL
DH DL
AH AL AX
BH BL BX
CH CL CX
DH DL DX

8086 has a 16-bit flag register
Contains 9 active flags
There are two types of flags in 8086
Conditional flags – six flags, set or reset by EU
on the basis of results of some arithmetic
operations
Control flags – three flags, used to control certain
operations of the processor
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U U U U OF DF IF TF SF ZF U AF U PF U CF
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1. CF CARRY FLAG
Conditional Flags
(Compatible with 8085,
except OF)
2. PF PARITY FLAG
3. AF AUXILIARY CARRY
4. ZF ZERO FLAG
5. SF SIGN FLAG
6. OF OVERFLOW FLAG
7. TF TRAP FLAG
Control Flags
8. IF INTERRUPT FLAG
9. DF DIRECTION FLAG

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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Carry Flag
This flag is set, when there is
a carry out of MSB in case of
addition or a borrow in case
of subtraction.
Parity Flag
This flag is set to 1, if the lower
byte of the result contains even
number of 1’s ; for odd number
of 1’s set to zero.
Auxiliary Carry Flag
This is set, if there is a carry from the
lowest nibble, i.e, bit three during
addition, or borrow for the lowest
nibble, i.e, bit three, during
subtraction.
Zero Flag
This flag is set, if the result of
the computation or comparison
performed by an instruction is
zero
Sign Flag
This flag is set, when the
result of any computation
is negative
Tarp Flag
If this flag is set, the processor
enters the single step execution
mode by generating internal
interrupts after the execution of
each instruction
Interrupt Flag
Causes the 8086 to recognize
external mask interrupts; clearing IF
disables these interrupts.
Direction Flag
This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest
address to the highest address, i.e., auto incrementing mode.
Otherwise, the string is processed from the highest address
towards the lowest address, i.e., auto incrementing mode.
Over flow Flag
This flag is set, if an overflow occurs, i.e, if the result of a signed
operation is large enough to accommodate in a destination
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit
sign operations, then the overflow will be set.

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Registers, Flag
Sl.No. Type Register width Name of register
1 General purpose
register
16 bit AX, BX, CX, DX
8 bit AL, AH, BL, BH, CL, CH, DL, DH
2 Pointer register 16 bit SP, BP
3 Index register 16 bit SI, DI
4 Instruction Pointer 16 bit IP
5 Segment register 16 bit CS, DS, SS, ES
6 Flag (PSW) 16 bit Flag register
8086 registers
categorized
into 4 groups
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF

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Register Name of the Register Special Function
AX 16-bit Accumulator Stores the 16-bit results of arithmetic and logic operations
AL 8-bit Accumulator Stores the 8-bit results of arithmetic and logic operations
BX Base register Used to hold base value in base addressing mode to access
memory data
CX Count Register Used to hold the count value in SHIFT, ROTATE and LOOP
instructions
DX Data Register Used to hold data for multiplication and division operations
SP Stack Pointer Used to hold the offset address of top stack memory
BP Base Pointer Used to hold the base value in base addressing using SS
register to access data from stack memory
SI Source Index Used to hold index value of source operand (data) for string
instructions
DI Data Index Used to hold the index value of destination operand (data)
for string operations
Registers and Special
Functions

8086 microprocessor

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