SlideShare a Scribd company logo
Sept to Dec 2022 Wednesday, January 22, 2025
1
MICROPROCESSOR
SYSTEMS DESIGN
COMP 413
Wednesday, January 22, 2025
Sept to Dec 2022
2
.
 At the end of this course Comp 413 you should be
able to;
 Discuss the basic function a microprocessor in any system
 Describe the benefits that microprocessor controlled
designs have over hard-wired IC logic designs,
 Discuss the functional blocks of a microprocessor-based
system having basic input/output capability
 Describe the function of the address, data, and control bus
 Describe the flow of data through the Internal parts of an
8085 microprocessor
Wednesday, January 22, 2025
Sept to Dec 2022
3
.
Cont.,
 Discuss the function of the I/O ports in any microprocessor
controlled system
 Design and implement a microprocessor/microcontroller
controlled system
Wednesday, January 22, 2025
Sept to Dec 2022
4
Introduction
 Design applications previously studied involved
Combinational and Sequential logic ICs (Comp 211 & Comp
312).
 Combinational circuits;circuits realized by combination of
logic gates(AND,OR,NOT etc)
 Sequential circuits;combinational logic circuits with memory
 A complete design could be within the realm of Small Scale
Integration (SSI) and Medium Scale Integration (MSI)
 An example is that of a traffic light controller that goes through
the sequence; green-yellow-red.
 To implement this logic , some counter ICs are used for timing, shift register
ICs for sequencing the lights, and a D- Flip Flop to interrupt the sequence
with a crosswalk push button for pedestrian crossing
Wednesday, January 22, 2025
Sept to Dec 2022
5
.
 When it comes to modern complexity of electronic
controls for example in the modern automobiles,
there exists several analog quantities to monitor
such as;
 engine speed,
 manifold pressure (inlet and exhaust pipes ),
 coolant temperature
 there are also digital control functions to spark plug timing,
fuel mixture control, and radiator circulation control.
 It means therefore that there are calculations and
decision making continuously taking place. This
therefore makes it an application for a
microprocessor.
Wednesday, January 22, 2025
Sept to Dec 2022
6
.
 A microprocessor based design is therefore
convenient whenever an application involves;
 Making calculations
 Making decisions based on external stimulus
 Maintaining memory of past events
Wednesday, January 22, 2025
Sept to Dec 2022
7
.
 A microprocessor therefore has more advantages
over the hard-wired SSI/MSI IC approach;
 It is a general purpose device
 Performs any function depending on the control
program
 Making changes is done by changing instructions in
the program. Hard-wired will be redesigned and
reconstructed
 New microprocessors come to the market every
year to meet needs of designers, however the
theory behind this technology remains basically the
same.
Wednesday, January 22, 2025
Sept to Dec 2022
8
 A microprocessor is a general purpose device that
is driven by software instructions and communicates
with several external support chips to perform
input/output of a specific task.
 A microprocessor is also referred to as a CPU
 This course will be based on the 8085
microprocessor that runs at a frequency of either
3.03MHZ(8085A) or 5MHZ maximum(8085A-2).
 16 bit address and 8 bit data bus
Wednesday, January 22, 2025
Sept to Dec 2022
9
An 8085A Microprocessor
Wednesday, January 22, 2025
Sept to Dec 2022
10
Pin Arrangement
 The pins on the chip can be grouped into six groups:
 Address Bus
 Data Bus
 Power supply and clock signals
 Serial I/O ports(SID,SOD)
 Control and Status signals
 Externally initiated signals
Wednesday, January 22, 2025
Sept to Dec 2022
11
Address and Data Bus(lines)
 Address bus has 8 lines A8 – A15 which are unidirectional.
The remaining 8 bits address are multiplexed (time shared)
with the 8 data bit lines.
 AD0 – AD7 serve both as bi-directional data bus D0 – D7 and
A0 – A7 for address lines to make 16-bits with A8 – A15
 During the execution of the instruction, the lines will carry
the address bits and during execution will carry the 8 bit data.
 Addresses originate from the microprocessor and so are
unidirectional and data lines are bidirectional since data
flows in and out of the processor.
Wednesday, January 22, 2025
Sept to Dec 2022
12
Cont.
 Latches can be used to save/hold the information
before the function of the bits change.
Wednesday, January 22, 2025
Sept to Dec 2022
13
Clock signals
 X1 and X2 are the inputs from the crystal oscillator or
clock generating circuit.
 Clk out pin: An output clocking pin to drive the rest
of the system.
Wednesday, January 22, 2025
Sept to Dec 2022
14
Control and Status signals
 ALE: Address Latch Enable. Set to 1 by the
system when AD0 – AD7 lines have an address on
them. It changes back to 0 thereafter. This signal can
be used to save the address bits from the AD lines.
 RD: Read. Active Low signal to enable a read from
a memory location.
 WR: Write. Active Low signal to enable a write to a
memory location.
Wednesday, January 22, 2025
Sept to Dec 2022
15
Cont.
 IO/M:Input,Output/Memory. This signal specifies
whether the operation is a memory operation(IO/M
= 0) or an I/O operation (IO/M =1).
 S1 and S2 : Status signals to specify the kind of
operation being performed.
Wednesday, January 22, 2025
Sept to Dec 2022
16
Fetching an Instruction
 Assume the processor is fetching an instruction from
address 8400H. That means the Program
Counter(PC) is loaded with this value.
 The PC places the address value on the address bus and the
controller issues a RD signal.
 The memory’s address decoder gets the value and determines
which memory location is being accessed.
Wednesday, January 22, 2025
Sept to Dec 2022
17
Cont.
 The value on the memory location is placed on the
data bus.
 The value on the data bus is read into the Instruction
Register(IR) inside the microprocessor.
 Then transferred to the Instruction Decoder(ID)
inside the microprocessor for decoding.
 After decoding the instruction, the control unit
issues control signals to perform the operation.
Wednesday, January 22, 2025
Sept to Dec 2022
18
 All instruction would go through Fetch, Decode , and
Execution cycle
Wednesday, January 22, 2025
Sept to Dec 2022
19
Wednesday, January 22, 2025
Sept to Dec 2022
20
8085 Features
 The ALU
 In addition to the arithmetic & Logic circuits, the ALU includes
the accumulator, which is part of every arithmetic and logic
operation.
 The ALU also includes a temporary register that is used for
temporary data storage during the execution of an operation.
The temporary register is not accessible by the programmer.
Wednesday, January 22, 2025
Sept to Dec 2022
21
Cont.
 The Flag Register(program status word)
 The flag register consists of five status flags
 The sign flag(S): This is set to the value of the most significant
bit of the accumulator after an arithmetic or logic operation (0
for positive and 1 for negative).
 The zero flag(Z) is set to a 1 whenever an arithmetic or logic
operation produces a result of zero. A nonzero result sets it to 0.
Wednesday, January 22, 2025
Sept to Dec 2022
22
Cont.
 The auxiliary carry flag(Ac): Reflects any carry from bit 3 to
bit 4(assuming an 8-bit data with bit 0 as the LSB and bit 7 as the
MSB).
 The parity status flag(P): is set to 1 if an operation produces an
answer with even parity.
 The carry flag(Cy): Reflects the final carry out of the most
significant bit of any arithmetic operation. The flag is also used for
the shift and rotate instructions.
Wednesday, January 22, 2025
Sept to Dec 2022
23
Register Structure
The Accumulator:
 The accumulator(A) is an 8-bit register.
 Most arithmetic and logic operations are performed
using the accumulator.
 All I/O operations are performed via the
accumulator
Wednesday, January 22, 2025
Sept to Dec 2022
24
Cont.
General purpose registers:
 The B,C,D,E,H and L registers are 8-bits long and
are used for moving data between themselves, the
accumulator and the memory.
 There are a number of instructions that combine two
of these 8-bit registers to form 16-bit register pair.
Wednesday, January 22, 2025
Sept to Dec 2022
25
Cont.
 Arithmetic operations use B and C, or D and E, or H
and L as 16-bit data registers.
 Register HL is the memory address register or data
counter. The register pair stores the 16-bit address
of an 8-bit data being accessed from memory.

More Related Content

PDF
IEEE_Calculator_Verilog2020.pdf
PDF
Ijet12 04-04-020
PDF
IC Layout Design of 4-bit Magnitude Comparator using Electric VLSI Design System
PDF
Interfacing Of PIC 18F252 Microcontroller with Real Time Clock via I2C Protocol
PDF
IMPLEMENTATION OF USER INTERFACE FOR MICROPROCESSOR TRAINER
PPTX
BCD Counter
PPTX
Bidirect visitor counter
PDF
Pi Day 2022 - from IoT to MySQL HeatWave Database Service
IEEE_Calculator_Verilog2020.pdf
Ijet12 04-04-020
IC Layout Design of 4-bit Magnitude Comparator using Electric VLSI Design System
Interfacing Of PIC 18F252 Microcontroller with Real Time Clock via I2C Protocol
IMPLEMENTATION OF USER INTERFACE FOR MICROPROCESSOR TRAINER
BCD Counter
Bidirect visitor counter
Pi Day 2022 - from IoT to MySQL HeatWave Database Service

Similar to Microprocessor design and Lecture One.pptx (20)

PPTX
PLC Basics Last version standardeg .pptx
PDF
Design, Construction and Operation of a 4-Bit Counting Circuit
PDF
K010137378
PPTX
Digital VLSI Design and FPGA Implementation
DOCX
Wireless led notice board
PPTX
C10ComputerEngg.pptx
PDF
A REVIEW ON ANALYSIS OF 32-BIT AND 64-BIT RISC PROCESSORS
PDF
A STUDY OF AN ENTRENCHED SYSTEM USING INTERNET OF THINGS
PDF
Portfolio - Muhammad Ismail Sheikh
PDF
Bharat gargi final project report
PDF
Bds lab 4
PPTX
Absolute
PPTX
appu.pptxpaga of the plchduddddrrhddjdidu
PDF
IRJET - Automatic Mechanism for LED Parameters Testing & Checking
DOCX
project 3 full report
PDF
Implementation of sign board dot matrix display with 8051
PDF
An Implementation of I2C Slave Interface using Verilog HDL
PDF
IRJET- Braille Oriented Classroom
PDF
Mobile robotic platform to gathering real time sensory data in wireless perso...
PLC Basics Last version standardeg .pptx
Design, Construction and Operation of a 4-Bit Counting Circuit
K010137378
Digital VLSI Design and FPGA Implementation
Wireless led notice board
C10ComputerEngg.pptx
A REVIEW ON ANALYSIS OF 32-BIT AND 64-BIT RISC PROCESSORS
A STUDY OF AN ENTRENCHED SYSTEM USING INTERNET OF THINGS
Portfolio - Muhammad Ismail Sheikh
Bharat gargi final project report
Bds lab 4
Absolute
appu.pptxpaga of the plchduddddrrhddjdidu
IRJET - Automatic Mechanism for LED Parameters Testing & Checking
project 3 full report
Implementation of sign board dot matrix display with 8051
An Implementation of I2C Slave Interface using Verilog HDL
IRJET- Braille Oriented Classroom
Mobile robotic platform to gathering real time sensory data in wireless perso...
Ad

Recently uploaded (20)

PDF
Mushroom cultivation and it's methods.pdf
PDF
ENT215_Completing-a-large-scale-migration-and-modernization-with-AWS.pdf
PDF
Building Integrated photovoltaic BIPV_UPV.pdf
PDF
WOOl fibre morphology and structure.pdf for textiles
PDF
DASA ADMISSION 2024_FirstRound_FirstRank_LastRank.pdf
PDF
Approach and Philosophy of On baking technology
PDF
Zenith AI: Advanced Artificial Intelligence
PDF
MIND Revenue Release Quarter 2 2025 Press Release
PPTX
Digital-Transformation-Roadmap-for-Companies.pptx
PDF
A comparative study of natural language inference in Swahili using monolingua...
PDF
Transform Your ITIL® 4 & ITSM Strategy with AI in 2025.pdf
PDF
Microsoft Solutions Partner Drive Digital Transformation with D365.pdf
PPTX
Programs and apps: productivity, graphics, security and other tools
PDF
Heart disease approach using modified random forest and particle swarm optimi...
PDF
Hindi spoken digit analysis for native and non-native speakers
PDF
Univ-Connecticut-ChatGPT-Presentaion.pdf
PPTX
cloud_computing_Infrastucture_as_cloud_p
PPTX
KOM of Painting work and Equipment Insulation REV00 update 25-dec.pptx
PDF
Agricultural_Statistics_at_a_Glance_2022_0.pdf
PDF
Unlocking AI with Model Context Protocol (MCP)
Mushroom cultivation and it's methods.pdf
ENT215_Completing-a-large-scale-migration-and-modernization-with-AWS.pdf
Building Integrated photovoltaic BIPV_UPV.pdf
WOOl fibre morphology and structure.pdf for textiles
DASA ADMISSION 2024_FirstRound_FirstRank_LastRank.pdf
Approach and Philosophy of On baking technology
Zenith AI: Advanced Artificial Intelligence
MIND Revenue Release Quarter 2 2025 Press Release
Digital-Transformation-Roadmap-for-Companies.pptx
A comparative study of natural language inference in Swahili using monolingua...
Transform Your ITIL® 4 & ITSM Strategy with AI in 2025.pdf
Microsoft Solutions Partner Drive Digital Transformation with D365.pdf
Programs and apps: productivity, graphics, security and other tools
Heart disease approach using modified random forest and particle swarm optimi...
Hindi spoken digit analysis for native and non-native speakers
Univ-Connecticut-ChatGPT-Presentaion.pdf
cloud_computing_Infrastucture_as_cloud_p
KOM of Painting work and Equipment Insulation REV00 update 25-dec.pptx
Agricultural_Statistics_at_a_Glance_2022_0.pdf
Unlocking AI with Model Context Protocol (MCP)
Ad

Microprocessor design and Lecture One.pptx

  • 1. Sept to Dec 2022 Wednesday, January 22, 2025 1 MICROPROCESSOR SYSTEMS DESIGN COMP 413
  • 2. Wednesday, January 22, 2025 Sept to Dec 2022 2 .  At the end of this course Comp 413 you should be able to;  Discuss the basic function a microprocessor in any system  Describe the benefits that microprocessor controlled designs have over hard-wired IC logic designs,  Discuss the functional blocks of a microprocessor-based system having basic input/output capability  Describe the function of the address, data, and control bus  Describe the flow of data through the Internal parts of an 8085 microprocessor
  • 3. Wednesday, January 22, 2025 Sept to Dec 2022 3 . Cont.,  Discuss the function of the I/O ports in any microprocessor controlled system  Design and implement a microprocessor/microcontroller controlled system
  • 4. Wednesday, January 22, 2025 Sept to Dec 2022 4 Introduction  Design applications previously studied involved Combinational and Sequential logic ICs (Comp 211 & Comp 312).  Combinational circuits;circuits realized by combination of logic gates(AND,OR,NOT etc)  Sequential circuits;combinational logic circuits with memory  A complete design could be within the realm of Small Scale Integration (SSI) and Medium Scale Integration (MSI)  An example is that of a traffic light controller that goes through the sequence; green-yellow-red.  To implement this logic , some counter ICs are used for timing, shift register ICs for sequencing the lights, and a D- Flip Flop to interrupt the sequence with a crosswalk push button for pedestrian crossing
  • 5. Wednesday, January 22, 2025 Sept to Dec 2022 5 .  When it comes to modern complexity of electronic controls for example in the modern automobiles, there exists several analog quantities to monitor such as;  engine speed,  manifold pressure (inlet and exhaust pipes ),  coolant temperature  there are also digital control functions to spark plug timing, fuel mixture control, and radiator circulation control.  It means therefore that there are calculations and decision making continuously taking place. This therefore makes it an application for a microprocessor.
  • 6. Wednesday, January 22, 2025 Sept to Dec 2022 6 .  A microprocessor based design is therefore convenient whenever an application involves;  Making calculations  Making decisions based on external stimulus  Maintaining memory of past events
  • 7. Wednesday, January 22, 2025 Sept to Dec 2022 7 .  A microprocessor therefore has more advantages over the hard-wired SSI/MSI IC approach;  It is a general purpose device  Performs any function depending on the control program  Making changes is done by changing instructions in the program. Hard-wired will be redesigned and reconstructed  New microprocessors come to the market every year to meet needs of designers, however the theory behind this technology remains basically the same.
  • 8. Wednesday, January 22, 2025 Sept to Dec 2022 8  A microprocessor is a general purpose device that is driven by software instructions and communicates with several external support chips to perform input/output of a specific task.  A microprocessor is also referred to as a CPU  This course will be based on the 8085 microprocessor that runs at a frequency of either 3.03MHZ(8085A) or 5MHZ maximum(8085A-2).  16 bit address and 8 bit data bus
  • 9. Wednesday, January 22, 2025 Sept to Dec 2022 9 An 8085A Microprocessor
  • 10. Wednesday, January 22, 2025 Sept to Dec 2022 10 Pin Arrangement  The pins on the chip can be grouped into six groups:  Address Bus  Data Bus  Power supply and clock signals  Serial I/O ports(SID,SOD)  Control and Status signals  Externally initiated signals
  • 11. Wednesday, January 22, 2025 Sept to Dec 2022 11 Address and Data Bus(lines)  Address bus has 8 lines A8 – A15 which are unidirectional. The remaining 8 bits address are multiplexed (time shared) with the 8 data bit lines.  AD0 – AD7 serve both as bi-directional data bus D0 – D7 and A0 – A7 for address lines to make 16-bits with A8 – A15  During the execution of the instruction, the lines will carry the address bits and during execution will carry the 8 bit data.  Addresses originate from the microprocessor and so are unidirectional and data lines are bidirectional since data flows in and out of the processor.
  • 12. Wednesday, January 22, 2025 Sept to Dec 2022 12 Cont.  Latches can be used to save/hold the information before the function of the bits change.
  • 13. Wednesday, January 22, 2025 Sept to Dec 2022 13 Clock signals  X1 and X2 are the inputs from the crystal oscillator or clock generating circuit.  Clk out pin: An output clocking pin to drive the rest of the system.
  • 14. Wednesday, January 22, 2025 Sept to Dec 2022 14 Control and Status signals  ALE: Address Latch Enable. Set to 1 by the system when AD0 – AD7 lines have an address on them. It changes back to 0 thereafter. This signal can be used to save the address bits from the AD lines.  RD: Read. Active Low signal to enable a read from a memory location.  WR: Write. Active Low signal to enable a write to a memory location.
  • 15. Wednesday, January 22, 2025 Sept to Dec 2022 15 Cont.  IO/M:Input,Output/Memory. This signal specifies whether the operation is a memory operation(IO/M = 0) or an I/O operation (IO/M =1).  S1 and S2 : Status signals to specify the kind of operation being performed.
  • 16. Wednesday, January 22, 2025 Sept to Dec 2022 16 Fetching an Instruction  Assume the processor is fetching an instruction from address 8400H. That means the Program Counter(PC) is loaded with this value.  The PC places the address value on the address bus and the controller issues a RD signal.  The memory’s address decoder gets the value and determines which memory location is being accessed.
  • 17. Wednesday, January 22, 2025 Sept to Dec 2022 17 Cont.  The value on the memory location is placed on the data bus.  The value on the data bus is read into the Instruction Register(IR) inside the microprocessor.  Then transferred to the Instruction Decoder(ID) inside the microprocessor for decoding.  After decoding the instruction, the control unit issues control signals to perform the operation.
  • 18. Wednesday, January 22, 2025 Sept to Dec 2022 18  All instruction would go through Fetch, Decode , and Execution cycle
  • 19. Wednesday, January 22, 2025 Sept to Dec 2022 19
  • 20. Wednesday, January 22, 2025 Sept to Dec 2022 20 8085 Features  The ALU  In addition to the arithmetic & Logic circuits, the ALU includes the accumulator, which is part of every arithmetic and logic operation.  The ALU also includes a temporary register that is used for temporary data storage during the execution of an operation. The temporary register is not accessible by the programmer.
  • 21. Wednesday, January 22, 2025 Sept to Dec 2022 21 Cont.  The Flag Register(program status word)  The flag register consists of five status flags  The sign flag(S): This is set to the value of the most significant bit of the accumulator after an arithmetic or logic operation (0 for positive and 1 for negative).  The zero flag(Z) is set to a 1 whenever an arithmetic or logic operation produces a result of zero. A nonzero result sets it to 0.
  • 22. Wednesday, January 22, 2025 Sept to Dec 2022 22 Cont.  The auxiliary carry flag(Ac): Reflects any carry from bit 3 to bit 4(assuming an 8-bit data with bit 0 as the LSB and bit 7 as the MSB).  The parity status flag(P): is set to 1 if an operation produces an answer with even parity.  The carry flag(Cy): Reflects the final carry out of the most significant bit of any arithmetic operation. The flag is also used for the shift and rotate instructions.
  • 23. Wednesday, January 22, 2025 Sept to Dec 2022 23 Register Structure The Accumulator:  The accumulator(A) is an 8-bit register.  Most arithmetic and logic operations are performed using the accumulator.  All I/O operations are performed via the accumulator
  • 24. Wednesday, January 22, 2025 Sept to Dec 2022 24 Cont. General purpose registers:  The B,C,D,E,H and L registers are 8-bits long and are used for moving data between themselves, the accumulator and the memory.  There are a number of instructions that combine two of these 8-bit registers to form 16-bit register pair.
  • 25. Wednesday, January 22, 2025 Sept to Dec 2022 25 Cont.  Arithmetic operations use B and C, or D and E, or H and L as 16-bit data registers.  Register HL is the memory address register or data counter. The register pair stores the 16-bit address of an 8-bit data being accessed from memory.