The document describes a new asymmetrical single-phase multilevel inverter topology that produces nine-level output voltage while reducing device counts, costs, and size. The proposed inverter, modeled and simulated using MATLAB/Simulink, demonstrates acceptable harmonic distortion and lower component requirements compared to traditional topologies. A detailed analysis of its performance in various operational modes and THD of 8.95% is presented, supporting its application in medium and high power scenarios.
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