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WORKSHOP ON
MSP430- ARCHITECTURE AND PROGRAMMING
23.12.2022
Image Courtesy of
Recording Connection of Canada
Mrs. R. Kiruthikaa
Assistant Professor
Department of ECE
Karpagam Institute of Technology
Coimbatore
OVERVIEW
THE MSP430
• Low Power Microcontroller
• Released in 1990s
• 16 bit, RISC based, mixed signal processor
• Intelligent peripherals
• Ease of use
• Low cost and Low power consumption for
several applications
THE MSP430
• It is flexible for ultra power saving applications.
• Clocking system, multiple low power modes, instant wakeup
• and intelligent autonomous peripherals enable true ultra low
power optimization.
Key features
Ultra low power architecture
Flexible clock system and extended battery life time
Low operating voltage : 1.8 V to 3.6 V
Interconnects MAB and MDB
CHAPTER : THE MSP430
EMBEDDED SYSTEMS DESIGN
MSP430 HARDWARE OVERVIEW
Computer Overview
Image Courtesy of
Recording Connection of Canada
LaunchPad
MSP430 FAMILY (MSP = MIXED SIGNAL PROCESSOR)
THE MSP430
• Produced by Texas Instruments.
• Low-power signal processing.
• Low cost.
• Based on 16-bit CPU.
• ROM and R/W memory.
• Abundant suite of peripherals.
Texas Instruments logo
http://www.ti.com/legal/trademarks/signature-and-logo.html
BYTE MEMORY ACCESS VS. WORD MEMORY ACCESS
THE MSP430
• Bytes are located at even or odd
address.
• Words are located in the
ascending memory locations
aligned to even addresses with
the low byte (LB) at the even
address, followed by the high
byte (HB) at the next odd.
.address
Image Courtesy of
Recording Connection of Canada
PROGRAM MEMORY
THE MSP430
• Non-volatile memory sizes
range from 0 to 512 kB.
• Include MROM, Flash, and
FRAM.
• FRAM-based devices have
regions of the non-volatile
memory that can be written
to by the program for
storage of data when power
is removed. Image Courtesy of
Recording Connection of Canada
DATA MEMORY
THE MSP430
• R/W, volatile memory is also
known as RAM.
• RAM ranges from 125 bytes
to 66 kB.
• Implemented with SRAM
technology; some MCUs may
also contain a small amount of
FRAM for data memory.
Image Courtesy of
Recording Connection of Canada
CENTRAL PROCESSING UNIT
THE MSP430
REGISTERS
• The MSP430 CPU has 16
registers that are 20-bits wide.
• Registers are operated on as 16-
bit words.
• Register Names - R0, R1, R2,
R3, …, R15.
• R0 – R3 are special purpose
registers (cannot be manipulated
directly by the software).
• R4 – R15 are general-purpose
registers (can be used in any
manner by the program).
CENTRAL PROCESSING UNIT
THE MSP430
4.1.4.1 REGISTERS
• R0: Program Counter (PC) –
holds the address of the next
instruction in program memory
to execute; provides access to
220
= 1,048,576 address
locations in the memory
system.
• R1: Stack Pointer (SP) –
provides a way to dynamically
allocate variable space in the
data memory without having to
keep track of specific
addresses.
Image Courtesy of
Recording Connection of Canada
CENTRAL PROCESSING UNIT
THE MSP430
REGISTERS
• R2: Status Register (SR) – contains status bits, or flags, that
are asserted when various conditions occur during the execution.
Image Courtesy of
Recording Connection of Canada
CENTRAL PROCESSING UNIT
THE MSP430
REGISTERS
• R3: Constant Generator (GC)
– used by the CPU to speed
up the instruction execution.
• R4 – R15: General-Purpose
Registers – can be used for
anything the programmer
wants.
Image Courtesy of
Recording Connection of Canada
CENTRAL PROCESSING UNIT
THE MSP430
ALU
• Performs all mathematical and
logical operations.
• Operates on data being held in
CPU registers.
• Contains logic to produce
status bits (VNZC) that are
latched into the status register
for specific instructions.
• Only operates on the lower 16-
bits of the CPU registers.
Image Courtesy of
Recording Connection of Canada
INPUT / OUTPUT PORTS & PERIPHERALS
THE MSP430
Image Courtesy of
Recording Connection of Canada
MSP430FR2355
THE MSP430
Image Courtesy of
Recording Connection of Canada
MSP430FR2355TPT
THE MSP430
• MCLK = 1MHz
• 64k memory system (16-bit MAB)
• 32k FRAM program memory
• 4k (SRAM) + 512 (FRAM) data memory
• 6x digital I/O ports
- P1 (8-bit)  PA = P1:P2
- P2 (8-bit)
- P3 (8-bit)  PB = P3:P4
- P4 (8-bit)
- P5 (5-bit)  PC = P5:P6
- P6 (7-bit)
• 4x eUSCI’s
- 2x switchable between UART & SPI
- 2x switchable between SPI & I2C
Image courtesy of Texas Instruments
• 4x timers
• RTC
• Watchdog timer
• 12-bit ADC
• 4x SACs
MSP430FR2355TPT
THE MSP430
LAUNCHPAD DOCUMENTATION
THE MSP430
• MSP430FR4xx and MSP430FR2xx Family User's Guide
(Rev. I)
(http://www.ti.com/lit/ug/slau445i/slau445i.pdf)
• MSP430FR235x, MSP430FR215x Mixed-Signal
Microcontrollers datasheet (Rev. D)
(http://www.ti.com/lit/ds/slasec4d/slasec4d.pdf)
• MSP430FR2355 LaunchPad™ Development Kit (MSP-
EXP430FR2355) User's Guide
(http://www.ti.com/lit/ug/slau680/slau680.pdf)
THANK YOU !!!
Image Courtesy of
Recording Connection of Canada

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The_MSP430_Slides.pptx

  • 1. WORKSHOP ON MSP430- ARCHITECTURE AND PROGRAMMING 23.12.2022 Image Courtesy of Recording Connection of Canada Mrs. R. Kiruthikaa Assistant Professor Department of ECE Karpagam Institute of Technology Coimbatore
  • 2. OVERVIEW THE MSP430 • Low Power Microcontroller • Released in 1990s • 16 bit, RISC based, mixed signal processor • Intelligent peripherals • Ease of use • Low cost and Low power consumption for several applications
  • 3. THE MSP430 • It is flexible for ultra power saving applications. • Clocking system, multiple low power modes, instant wakeup • and intelligent autonomous peripherals enable true ultra low power optimization. Key features Ultra low power architecture Flexible clock system and extended battery life time Low operating voltage : 1.8 V to 3.6 V Interconnects MAB and MDB
  • 4. CHAPTER : THE MSP430 EMBEDDED SYSTEMS DESIGN MSP430 HARDWARE OVERVIEW Computer Overview Image Courtesy of Recording Connection of Canada LaunchPad
  • 5. MSP430 FAMILY (MSP = MIXED SIGNAL PROCESSOR) THE MSP430 • Produced by Texas Instruments. • Low-power signal processing. • Low cost. • Based on 16-bit CPU. • ROM and R/W memory. • Abundant suite of peripherals. Texas Instruments logo http://www.ti.com/legal/trademarks/signature-and-logo.html
  • 6. BYTE MEMORY ACCESS VS. WORD MEMORY ACCESS THE MSP430 • Bytes are located at even or odd address. • Words are located in the ascending memory locations aligned to even addresses with the low byte (LB) at the even address, followed by the high byte (HB) at the next odd. .address Image Courtesy of Recording Connection of Canada
  • 7. PROGRAM MEMORY THE MSP430 • Non-volatile memory sizes range from 0 to 512 kB. • Include MROM, Flash, and FRAM. • FRAM-based devices have regions of the non-volatile memory that can be written to by the program for storage of data when power is removed. Image Courtesy of Recording Connection of Canada
  • 8. DATA MEMORY THE MSP430 • R/W, volatile memory is also known as RAM. • RAM ranges from 125 bytes to 66 kB. • Implemented with SRAM technology; some MCUs may also contain a small amount of FRAM for data memory. Image Courtesy of Recording Connection of Canada
  • 9. CENTRAL PROCESSING UNIT THE MSP430 REGISTERS • The MSP430 CPU has 16 registers that are 20-bits wide. • Registers are operated on as 16- bit words. • Register Names - R0, R1, R2, R3, …, R15. • R0 – R3 are special purpose registers (cannot be manipulated directly by the software). • R4 – R15 are general-purpose registers (can be used in any manner by the program).
  • 10. CENTRAL PROCESSING UNIT THE MSP430 4.1.4.1 REGISTERS • R0: Program Counter (PC) – holds the address of the next instruction in program memory to execute; provides access to 220 = 1,048,576 address locations in the memory system. • R1: Stack Pointer (SP) – provides a way to dynamically allocate variable space in the data memory without having to keep track of specific addresses. Image Courtesy of Recording Connection of Canada
  • 11. CENTRAL PROCESSING UNIT THE MSP430 REGISTERS • R2: Status Register (SR) – contains status bits, or flags, that are asserted when various conditions occur during the execution. Image Courtesy of Recording Connection of Canada
  • 12. CENTRAL PROCESSING UNIT THE MSP430 REGISTERS • R3: Constant Generator (GC) – used by the CPU to speed up the instruction execution. • R4 – R15: General-Purpose Registers – can be used for anything the programmer wants. Image Courtesy of Recording Connection of Canada
  • 13. CENTRAL PROCESSING UNIT THE MSP430 ALU • Performs all mathematical and logical operations. • Operates on data being held in CPU registers. • Contains logic to produce status bits (VNZC) that are latched into the status register for specific instructions. • Only operates on the lower 16- bits of the CPU registers. Image Courtesy of Recording Connection of Canada
  • 14. INPUT / OUTPUT PORTS & PERIPHERALS THE MSP430 Image Courtesy of Recording Connection of Canada
  • 15. MSP430FR2355 THE MSP430 Image Courtesy of Recording Connection of Canada
  • 16. MSP430FR2355TPT THE MSP430 • MCLK = 1MHz • 64k memory system (16-bit MAB) • 32k FRAM program memory • 4k (SRAM) + 512 (FRAM) data memory • 6x digital I/O ports - P1 (8-bit)  PA = P1:P2 - P2 (8-bit) - P3 (8-bit)  PB = P3:P4 - P4 (8-bit) - P5 (5-bit)  PC = P5:P6 - P6 (7-bit) • 4x eUSCI’s - 2x switchable between UART & SPI - 2x switchable between SPI & I2C Image courtesy of Texas Instruments • 4x timers • RTC • Watchdog timer • 12-bit ADC • 4x SACs
  • 18. LAUNCHPAD DOCUMENTATION THE MSP430 • MSP430FR4xx and MSP430FR2xx Family User's Guide (Rev. I) (http://www.ti.com/lit/ug/slau445i/slau445i.pdf) • MSP430FR235x, MSP430FR215x Mixed-Signal Microcontrollers datasheet (Rev. D) (http://www.ti.com/lit/ds/slasec4d/slasec4d.pdf) • MSP430FR2355 LaunchPad™ Development Kit (MSP- EXP430FR2355) User's Guide (http://www.ti.com/lit/ug/slau680/slau680.pdf)
  • 19. THANK YOU !!! Image Courtesy of Recording Connection of Canada